公开(公告)号：US20090033377A1

公开(公告)日：2009-02-05

申请号：US12170472

申请日：2008-07-10

申请人： Takayuki Hashimoto ,  Takashi Hirao ,  Masaki Shiraishi

发明人： Takayuki Hashimoto ,  Takashi Hirao ,  Masaki Shiraishi

IPC分类号： H03K3/012

CPC分类号： H02M3/07 ,  H02M1/08 ,  H02M7/5387 ,  H02M2003/071

摘要： A drive circuit for driving a semiconductor element is equipped with: a first switch connected to a positive side of a DC power supply; a second switch connected to the other terminal of the first switch and to a negative side of the DC power supply; a third switch connected to the positive side of the DC power supply; a fourth switch connected to the other terminal of the third switch; a fifth switch connected to the other terminal of the fourth switch and to the negative side of the DC power supply; and a capacitor connected to the other terminal of the first switch and to the other terminal of the fourth switch. A gate of the semiconductor element is connected to the other terminal of said third switch; and a source of the semiconductor element is connected to the negative side of the DC power supply.

摘要翻译： 用于驱动半导体元件的驱动电路配备有：连接到直流电源的正侧的第一开关; 连接到第一开关的另一个端子和直流电源的负极的第二开关; 连接到直流电源的正极的第三开关; 连接到第三开关的另一个端子的第四开关; 连接到第四开关的另一个端子和直流电源的负极的第五开关; 以及电容器，连接到第一开关的另一端子和第四开关的另一端子。 半导体元件的栅极连接到所述第三开关的另一个端子; 并且半导体元件的源极连接到直流电源的负极侧。

公开(公告)号：US20090015224A1

公开(公告)日：2009-01-15

申请号：US12171347

申请日：2008-07-11

申请人： Takashi Hirao ,  Takayuki Hashimoto ,  Masaki Shiraishi

发明人： Takashi Hirao ,  Takayuki Hashimoto ,  Masaki Shiraishi

IPC分类号： H02M3/156

CPC分类号： H02M3/158 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/49175 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/30107 ,  H03K17/162 ,  H03K17/6871 ,  H03K19/018521 ,  H03K2217/0081 ,  H01L2924/00

摘要： A DC-DC converter that prevents self turn-on and improves the power efficiency is provided. In a non-insulated DC-DC converter, self turn-on is prevented by applying a negative voltage between a gate and a source of a low side MOSFET by the use of a capacitor for generating negative voltage when the low side MOSFET is in an OFF state. Also, when the low side MOSFET is in an ON state due to the capacitor for generating negative voltage, a positive voltage applied between the gate and the source of the low side MOSFET does not drop from a voltage of a gate driving DC power source that is supplied from a gate power input terminal. Therefore, the power efficiency is improved.

摘要翻译： 提供了防止自身接通并提高功率效率的DC-DC转换器。 在非绝缘DC-DC转换器中，通过在低侧MOSFET处于低压MOSFET的栅极和源极之间通过使用用于产生负电压的电容器施加负电压来防止自身接通 OFF状态。 此外，由于用于产生负电压的电容器，当低端MOSFET处于导通状态时，施加在低侧MOSFET的栅极和源极之间的正电压不会从栅极驱动DC电源的电压下降， 由栅极电源输入端子提供。 因此，功率效率得到提高。

公开(公告)号：US07782098B2

公开(公告)日：2010-08-24

申请号：US12170472

申请日：2008-07-10

申请人： Takayuki Hashimoto ,  Takashi Hirao ,  Masaki Shiraishi

发明人： Takayuki Hashimoto ,  Takashi Hirao ,  Masaki Shiraishi

IPC分类号： H03K3/00

CPC分类号： H02M3/07 ,  H02M1/08 ,  H02M7/5387 ,  H02M2003/071

摘要： A drive circuit for driving a semiconductor element is equipped with: a first switch connected to a positive side of a DC power supply; a second switch connected to the other terminal of the first switch and to a negative side of the DC power supply; a third switch connected to the positive side of the DC power supply; a fourth switch connected to the other terminal of the third switch; a fifth switch connected to the other terminal of the fourth switch and to the negative side of the DC power supply; and a capacitor connected to the other terminal of the first switch and to the other terminal of the fourth switch. A gate of the semiconductor element is connected to the other terminal of said third switch; and a source of the semiconductor element is connected to the negative side of the DC power supply.

摘要翻译： 用于驱动半导体元件的驱动电路配备有：连接到直流电源的正侧的第一开关; 连接到第一开关的另一个端子和直流电源的负极的第二开关; 连接到直流电源的正极的第三开关; 连接到第三开关的另一个端子的第四开关; 连接到第四开关的另一个端子和直流电源的负极的第五开关; 以及电容器，连接到第一开关的另一端子和第四开关的另一端子。 半导体元件的栅极连接到所述第三开关的另一个端子; 并且半导体元件的源极连接到直流电源的负极侧。

公开(公告)号：US20080217684A1

公开(公告)日：2008-09-11

申请号：US12011286

申请日：2008-01-25

申请人： Takayuki Hashimoto ,  Takashi Hirao ,  Masaki Shiraishi

发明人： Takayuki Hashimoto ,  Takashi Hirao ,  Masaki Shiraishi

IPC分类号： H01L27/088 ,  H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7813 ,  H01L21/823437 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/1095 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66727 ,  H01L29/66734

摘要： A semiconductor device comprises a trench-gate type field-effect transistor on a semiconductor substrate having a first main surface and a second main surface oppositely positioned in a thickness direction, wherein the trench-gate type field-effect transistor comprises a first semiconductor region at the first main surface side; a second semiconductor region at the second main surface; a semiconductor well region between the first semiconductor region and the second semiconductor region; a trench formed so as to protrude in a first direction intersecting the second main surface; a gate electrode formed on an inner surface of the trench via a gate insulating film, and a bottom of the gate electrode is in the first semiconductor region, and a well bottom has a well deep portion and a well shallow portion, and the well deep portion is in a region more distant from the gate insulating film compared to the well shallow portion.

摘要翻译： 半导体器件包括在半导体衬底上的沟槽栅型场效应晶体管，其具有在厚度方向上相对定位的第一主表面和第二主表面，其中沟槽栅型场效应晶体管包括第一半导体区， 第一主表面; 在第二主表面处的第二半导体区域; 在所述第一半导体区域和所述第二半导体区域之间的半导体阱区域; 形成为沿与第二主表面相交的第一方向突出的沟槽; 经由栅极绝缘膜形成在沟槽的内表面上的栅极电极和栅电极的底部位于第一半导体区域中，阱底部具有阱深部和浅部，阱深 与较浅的部分相比，部分位于比栅极绝缘膜更远的区域。

公开(公告)号：US08018255B2

公开(公告)日：2011-09-13

申请号：US12171347

申请日：2008-07-11

申请人： Takashi Hirao ,  Takayuki Hashimoto ,  Masaki Shiraishi

发明人： Takashi Hirao ,  Takayuki Hashimoto ,  Masaki Shiraishi

IPC分类号： H03K3/00

CPC分类号： H02M3/158 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/49175 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/30107 ,  H03K17/162 ,  H03K17/6871 ,  H03K19/018521 ,  H03K2217/0081 ,  H01L2924/00

摘要： A DC-DC converter in which self turn-on can be prevented and can improve power efficiency. In a non-insulated DC-DC converter, self turn-on is prevented by applying a negative voltage between a gate and a source of a low side MOSFET by the use of a capacitor for generating negative voltage when the low side MOSFET is in an OFF state. Also, when the low side MOSFET is in an ON state due to the capacitor for generating negative voltage, a positive voltage applied between the gate and the source of the low side MOSFET does not drop from a voltage of a gate driving DC power source that is supplied from a gate power input terminal. Therefore, the power efficiency is improved.

摘要翻译： 可以防止自我接通并可提高功率效率的DC-DC转换器。 在非绝缘DC-DC转换器中，通过在低侧MOSFET处于低压MOSFET的栅极和源极之间通过使用用于产生负电压的电容器施加负电压来防止自身接通 OFF状态。 此外，由于用于产生负电压的电容器，当低端MOSFET处于导通状态时，施加在低侧MOSFET的栅极和源极之间的正电压不会从栅极驱动DC电源的电压下降， 由栅极电源输入端子提供。 因此，功率效率得到提高。

公开(公告)号：US08638577B2

公开(公告)日：2014-01-28

申请号：US13230947

申请日：2011-09-13

申请人： Masaki Shiraishi ,  Takayuki Hashimoto ,  Noboru Akiyama

发明人： Masaki Shiraishi ,  Takayuki Hashimoto ,  Noboru Akiyama

IPC分类号： H02M1/38 ,  H02M3/155

CPC分类号： H02M1/08 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/30107 ,  H03K17/0822 ,  H03K17/165 ,  H03K17/166 ,  H03K17/6871 ,  H01L2924/00 ,  H01L2224/45099

摘要： In a non-isolated DC/DC converter, a reference potential for a low-side pre-driver which drives a gate of a low-side MOSFET is applied from a portion except for a main circuit passing through a high-side MOSFET and the low-side MOSFET so that a parasitic inductance between a source of the low-side MOSFET and the pre-driver is increased without increasing the sum of parasitic inductances in the main circuit and negative potential driving of the gate of the low-side MOSFET can be performed and a self turn-on phenomenon can be prevented without adding any member and changing drive system.

摘要翻译： 在非隔离型DC / DC转换器中，从通过高侧MOSFET的主电路以外的部分施加驱动低侧MOSFET的栅极的低侧预驱动器的基准电位， 低侧MOSFET，使得低侧MOSFET的源极与预驱动器之间的寄生电感增加，而不增加主电路中的寄生电感的和，并且低侧MOSFET的栅极的负电位驱动 并且可以防止在不添加任何构件和改变驱动系统的情况下自启闭现象。

公开(公告)号：US08237493B2

公开(公告)日：2012-08-07

申请号：US13243642

申请日：2011-09-23

申请人： Takayuki Hashimoto ,  Nobuyoshi Matsuura ,  Masaki Shiraishi ,  Yukihiro Satou ,  Tetsuya Kawashima

发明人： Takayuki Hashimoto ,  Nobuyoshi Matsuura ,  Masaki Shiraishi ,  Yukihiro Satou ,  Tetsuya Kawashima

IPC分类号： H01L25/00

CPC分类号： H01L25/16 ,  H01L25/074 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/4903 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/12032 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H02M3/1588 ,  Y02B70/1466 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

摘要： A semiconductor device capable of reducing an inductance is provided. In the semiconductor device in which a rectification MOSFET, a commutation MOSFET, and a driving IC that drives these MOSFETs are mounted on one package, the rectification MOSFET, a metal plate, and the commutation MOSFET are laminated. A current of a main circuit flows from a back surface of the package to a front surface thereof. The metal plate is connected to an output terminal via a wiring in the package. Wire bondings are used for wirings for connecting the driving IC, the rectification MOSFET, and the commutation MOSFET, all terminals being placed on the same plane. For this reason, the inductance becomes small and also a power source loss and a spike voltage are reduced.

摘要翻译： 提供能够减小电感的半导体器件。 在其中将整流MOSFET，换向MOSFET和驱动这些MOSFET的驱动IC安装在一个封装上的半导体器件中，整流MOSFET，金属板和换向MOSFET被层压。 主电路的电流从封装的后表面流向其前表面。 金属板通过封装中的布线连接到输出端子。 引线键合用于连接驱动IC，整流MOSFET和换向MOSFET，所有端子都放置在同一平面上。 因此，电感变小，电源损耗和尖峰电压也降低。

公开(公告)号：US08044520B2

公开(公告)日：2011-10-25

申请号：US11624767

申请日：2007-01-19

申请人： Noboru Akiyama ,  Takayuki Hashimoto ,  Masaki Shiraishi ,  Tetsuya Kawashima ,  Koji Tateno ,  Nobuyoshi Matsuura

发明人： Noboru Akiyama ,  Takayuki Hashimoto ,  Masaki Shiraishi ,  Tetsuya Kawashima ,  Koji Tateno ,  Nobuyoshi Matsuura

IPC分类号： H01L23/52 ,  H01L29/40

CPC分类号： H01L25/16 ,  H01L24/37 ,  H01L24/40 ,  H01L2224/05554 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73221 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/30107 ,  H02M3/1588 ,  H03K17/08142 ,  H03K17/162 ,  H03K17/6871 ,  H03K2217/0036 ,  Y02B70/1466 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A power supply capable of reducing loss of large current and high frequency. In an MCM for power supply in which a high-side power MOSFET chip, a low-side power MOSFET chip and a driver IC chip driving them are sealed in one sealing material (a capsulating insulation resin), a wiring length of a wiring DL connecting an output terminal of the driver IC chip to a gate terminal of the low-side power MOSFET chip or a source terminal is made shorter than a wiring length of a wiring DH connecting the output terminal of the driver IC chip to a gate terminal of the high-side power MOSFET chip or a source terminal. Further, the number of the wiring DL is made larger than the number of the wiring DH.

摘要翻译： 一种能够减少大电流和高频损耗的电源。 在用于电源的MCM中，高边功率MOSFET芯片，低边功率MOSFET芯片和驱动IC芯片驱动它们被密封在一个密封材料（封装绝缘树脂）中，布线DL的布线长度 将驱动IC芯片的输出端子与低边功率MOSFET芯片的栅极端子或源极端子连接的时间短于连接驱动器IC芯片的输出端子与栅极端子的布线DH的布线长度 高端功率MOSFET芯片或源极端子。 此外，使布线数量DL大于布线数量DH。

公开(公告)号：US07821243B2

公开(公告)日：2010-10-26

申请号：US11624837

申请日：2007-01-19

申请人： Masaki Shiraishi ,  Takayuki Hashimoto ,  Noboru Akiyama

发明人： Masaki Shiraishi ,  Takayuki Hashimoto ,  Noboru Akiyama

IPC分类号： G05F1/595

CPC分类号： H02M1/08 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/30107 ,  H03K17/0822 ,  H03K17/165 ,  H03K17/166 ,  H03K17/6871 ,  H01L2924/00 ,  H01L2224/45099

摘要： In a non-isolated DC/DC converter, a reference potential for a low-side pre-driver which drives a gate of a low-side MOSFET is applied from a portion except for a main circuit passing through a high-side MOSFET and the low-side MOSFET so that a parasitic inductance between a source of the low-side MOSFET and the pre-driver is increased without increasing the sum of parasitic inductances in the main circuit and negative potential driving of the gate of the low-side MOSFET can be performed and a self turn-on phenomenon can be prevented without adding any member and changing drive system.

摘要翻译： 在非隔离型DC / DC转换器中，从通过高侧MOSFET的主电路以外的部分施加驱动低侧MOSFET的栅极的低侧预驱动器的基准电位， 低侧MOSFET，使得低侧MOSFET的源极与预驱动器之间的寄生电感增加，而不增加主电路中的寄生电感的和，并且低侧MOSFET的栅极的负电位驱动 并且可以防止在不添加任何构件和改变驱动系统的情况下自启闭现象。

公开(公告)号：US20070278516A1

公开(公告)日：2007-12-06

申请号：US11809023

申请日：2007-05-30

申请人： Takayuki Hashimoto ,  Noboru Akiyama ,  Masaki Shiraishi ,  Tetsuya Kawashima

发明人： Takayuki Hashimoto ,  Noboru Akiyama ,  Masaki Shiraishi ,  Tetsuya Kawashima

IPC分类号： H01L31/111

CPC分类号： H01L25/16 ,  G06F1/26 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/0603 ,  H01L2224/40 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： The present invention provides a technology for reducing the parasitic inductance of the main circuit of a power source unit. In a non-insulated DC-DC converter having a circuit in which a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the power MOSFET for high side switch and the power MOSFET for low side switch are formed of n-channel vertical MOSFETS, and a source electrode of the power MOSFET for high side switch and a drain electrode of the power MOSFET for low side switch are electrically connected via the same die pad.

摘要翻译： 本发明提供一种降低电源单元的主电路的寄生电感的技术。 在具有用于高侧开关的功率MOSFET和低侧开关的功率MOSFET串联的电路的非绝缘DC-DC转换器中，用于高侧开关的功率MOSFET和用于低侧开关的功率MOSFET是 由n沟道垂直MOSFETS形成，并且用于高侧开关的功率MOSFET的源极和用于低侧开关的功率MOSFET的漏电极经由相同的管芯焊盘电连接。