公开(公告)号：US5024910A

公开(公告)日：1991-06-18

申请号：US378521

申请日：1989-06-21

申请人： Takeo Ohta ,  Masami Uchida ,  Koichi Kotera ,  Kunihiro Matsubara

发明人： Takeo Ohta ,  Masami Uchida ,  Koichi Kotera ,  Kunihiro Matsubara

IPC分类号： B41M5/26 ,  G11B7/0055 ,  G11B7/24 ,  G11B7/243

CPC分类号： G11B7/243 ,  G11B7/00557 ,  G11B2007/24312 ,  G11B2007/24314 ,  G11B2007/24316 ,  Y10S430/146 ,  Y10S430/165

摘要： This invention provides an optical information recording medium whose recording thin film is made of three components of GeTe, Sb.sub.2 Te.sub.3 and Sb derived from a GeTe alloy, an Sb.sub.2 Te.sub.3 alloy and excess Sb and which is capable of recording, reproduction and erasure. By this, optical disk files which have a stable cycle characteristic and are practically useful can be realized.

公开(公告)号：US4457794A

公开(公告)日：1984-07-03

申请号：US507155

申请日：1983-06-23

申请人： Koichi Kotera ,  Takeo Ohta

发明人： Koichi Kotera ,  Takeo Ohta

IPC分类号： G11B7/243 ,  G11B7/26 ,  G01D15/34

CPC分类号： G11B7/266 ,  G11B7/243 ,  G11B2007/24316 ,  G11B2007/2432 ,  G11B7/00454 ,  G11B7/2533

摘要： Proposed is a method for manufacturing an optical memory disc having a pregrooved substrate and a recording film on the pregrooved substrate. In the step of depositing the recording film on the pregrooved substrate, light is incident on the pregrooved substrate, and at least one of exposure amounts of light reflected by and light transmitted through the pregrooved substrate and the recording film while the recording film is being deposited on the pregrooved substrate is measured. When one of the exposure amounts of light reflected by and light transmitted through the pregrooved substrate and the recording film has reached the corresponding preset exposure amount, the deposition of the recording film is stopped.

摘要翻译： 提出了一种用于制造在预浸基底上具有预浸渍基底和记录膜的光学存储盘的方法。 在将记录膜沉积在预先浸渍的基板上的步骤中，光入射到预加深的基板上，并且在记录膜被沉积的同时，透过预浸渍的基板和记录膜的光的反射光和光的曝光量中的至少一种 在预先浸渍的基材上测量。 当通过预先浸渍的基板和记录膜透射的光的反射光和曝光量之一达到相应的预设曝光量时，停止记录膜的沉积。

公开(公告)号：US07161297B2

公开(公告)日：2007-01-09

申请号：US10275795

申请日：2001-05-11

申请人： Koichi Kotera ,  Yoshinao Ooe ,  Hiroki Kono ,  Hiroyosi Tanaka

发明人： Koichi Kotera ,  Yoshinao Ooe ,  Hiroki Kono ,  Hiroyosi Tanaka

IPC分类号： H01J17/49 ,  H01J1/14 ,  H01J9/12 ,  H01J9/14

CPC分类号： H01J11/40 ,  H01J11/12

摘要： An electron emission thin-film with improved secondary electron emission characteristics compared with conventional ones, a plasma display panel including the electron emission thin-film, and their manufacturing methods. Using a vacuum deposition system, a protective layer that is an MgO thin-film is formed on a dielectric layer formed on a front glass substrate. At the time of deposition, angles that lines linking the central point of a target material for the protective layer respectively with the central point and both ends points of the front glass substrate form with the front glass substrate are exclusively in a range of 30 to 80 °. This enables at least some of MgO columnar crystals constituting the protective layer to have flat planes that are inclined with respect to the surface of the thinfilm.

摘要翻译： 与常规的二次电子发射特性相比具有改进的电子发射薄膜，包括电子发射薄膜的等离子体显示面板及其制造方法。 使用真空沉积系统，在形成在前玻璃基板上的电介质层上形成作为MgO薄膜的保护层。 在沉积时，将用于保护层的目标材料的中心点与前玻璃基板形成的前玻璃基板的中心点和两端点的线连接的角度仅在30至80的范围内 °。 这使得构成保护层的至少一些MgO柱状晶体具有相对于薄膜表面倾斜的平面。

公开(公告)号：US06731263B2

公开(公告)日：2004-05-04

申请号：US10143796

申请日：2002-05-14

申请人： Mitsuru Goto ,  Hiroshi Katayanagi ,  Yukihide Ode ,  Yoshiyuki Saitou ,  Koichi Kotera

发明人： Mitsuru Goto ,  Hiroshi Katayanagi ,  Yukihide Ode ,  Yoshiyuki Saitou ,  Koichi Kotera

IPC分类号： G09G336

CPC分类号： G09G3/3696 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0289

摘要： Each video signal driver circuit in a liquid crystal display device includes a first amplifier circuit with a first output terminal and first and second input terminals; a second amplifier circuit with a second output terminal and third and fourth input terminals; a first connecting circuit switchable between a first connection wherein an output voltage from the first output terminal is input to the first input terminal as a reference voltage, and a second connection wherein the output voltage from the first output terminal is input to the second input terminal as a reference voltage; and a second connecting circuit switchable between a third connection wherein an output voltage from the second output terminal is input to the third input terminal as a reference voltage, and a fourth connection wherein the output voltage from the second output terminal is input to the fourth input terminal as a reference voltage.

摘要翻译： 液晶显示装置中的每个视频信号驱动电路包括具有第一输出端和第一和第二输入端的第一放大电路; 具有第二输出端子和第三和第四输入端子的第二放大器电路; 第一连接电路，其可以在第一连接之间切换，其中来自第一输出端子的输出电压被输入到第一输入端子作为参考电压;以及第二连接，其中来自第一输出端子的输出电压被输入到第二输入端子 作为参考电压; 以及第二连接电路，其可在第三连接之间切换，其中来自第二输出端子的输出电压作为参考电压输入到第三输入端子;以及第四连接，其中来自第二输出端子的输出电压被输入到第四输入端 端子作为参考电压。

公开(公告)号：US06535189B1

公开(公告)日：2003-03-18

申请号：US09621699

申请日：2000-07-21

申请人： Kenichi Akiyama ,  Yuji Yamashita ,  Hironobu Isami ,  Mitsuru Goto ,  Shinji Yasukawa ,  Koichi Kotera

发明人： Kenichi Akiyama ,  Yuji Yamashita ,  Hironobu Isami ,  Mitsuru Goto ,  Shinji Yasukawa ,  Koichi Kotera

IPC分类号： G09G336

CPC分类号： G09G3/2011 ,  G09G3/3688 ,  G09G2310/0297

摘要： A liquid crystal display device includes a liquid crystal panel having plural pixels and a video signal line driver circuit for supplying a video signal voltage to each of the pixels via a corresponding one of plural video lines in accordance with a P-bit display data. The video signal line driver circuit includes a power supply circuit for supplying Q different gray-scale voltages, plural selector circuits corresponding to the video lines, each of the selector circuits for outputting one of first and second pairs of voltages in accordance with the display data, the first pair being two voltages equal to a same one selected from among the Q different gray-scale voltages, the second pair being two different voltages selected from among the Q different gray-scale voltages, and plural amplifiers corresponding to the video lines, each of the amplifiers for outputting the video signal voltage to a corresponding one of the video lines based upon one of the first and second pairs of voltages or a voltage intermediate between the second pair of voltages and produced from the second pair of voltages in the amplifiers.

摘要翻译： 液晶显示装置包括具有多个像素的液晶面板和视频信号线驱动电路，用于根据P位显示数据经由多个视频行中的相应一个视频信号电压向每个像素提供视频信号电压。 视频信号线驱动电路包括用于提供Q个不同灰度电压的电源电路，对应于视频线的多个选择器电路，每个选择器电路用于根据显示数据输出第一和第二对电压中的一个 所述第一对是等于从所述Q个不同灰度级电压中选择的相同的两个电压，所述第二对是从所述Q个不同的灰度级电压中选出的两个不同的电压，以及对应于所述视频线的多个放大器， 每个放大器用于基于第一和第二对电压中的一个或者在第二对电压之间的电压之间输出视频信号电压到相应的一条视频线，并且由放大器中的第二对电压产生 。

公开(公告)号：US20110043550A1

公开(公告)日：2011-02-24

申请号：US12938736

申请日：2010-11-03

申请人： Mitsuro Goto ,  Hiroshi Katayanagi ,  Yukihide Ode ,  Yoshiyuki Saitou ,  Koichi Kotera

发明人： Mitsuro Goto ,  Hiroshi Katayanagi ,  Yukihide Ode ,  Yoshiyuki Saitou ,  Koichi Kotera

IPC分类号： G09G5/10 ,  G09G3/36

CPC分类号： G09G3/3696 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0289

摘要： A semiconductor integrated circuit includes a first register, a second register, a gray scale voltage generator which outputs a plurality of gray scale voltages, a decoder which selects a gray scale voltage, and an amplifier including a first transistor, a second transistor, a third transistor, and a fourth transistor. A first terminal of the first transistor and a first terminal of the second transistors are connected to a first voltage line, a first terminal of the third transistor and a first terminal of the fourth transistor are connected to a second voltage line, a second terminal of the first transistor is connected to a second terminal of the third transistor, and a second terminal of the second transistor is connected to a second terminal of the fourth transistor.

摘要翻译： 半导体集成电路包括第一寄存器，第二寄存器，输出多个灰度级电压的灰度级电压发生器，选择灰度级电压的解码器，以及包括第一晶体管，第二晶体管，第三晶体管的放大器 晶体管和第四晶体管。 第一晶体管的第一端子和第二晶体管的第一端子连接到第一电压线，第三晶体管的第一端子和第四晶体管的第一端子连接到第二电压线，第二端子 第一晶体管连接到第三晶体管的第二端子，第二晶体管的第二端子连接到第四晶体管的第二端子。

公开(公告)号：US07235928B2

公开(公告)日：2007-06-26

申请号：US10472406

申请日：2002-05-31

申请人： Akira Shiokawa ,  Koji Akiyama ,  Tetsuya Imai ,  Katsutoshi Shindo ,  Hidetaka Higashino ,  Koichi Kotera ,  Kanako Miyashita

发明人： Akira Shiokawa ,  Koji Akiyama ,  Tetsuya Imai ,  Katsutoshi Shindo ,  Hidetaka Higashino ,  Koichi Kotera ,  Kanako Miyashita

IPC分类号： H01J17/20

CPC分类号： H01J11/50 ,  H01J11/12

摘要： A gas discharge panel capable of high-speed driving at a low drive voltage, while suppressing the occurrence of write errors in a write period, and a manufacturing method for the same. To achieve this, in the gas discharge panel of the present invention, a secondary gas formed from at least one of carbon dioxide, water vapor, oxygen and nitrogen is induced into discharge spaces 30 evacuated until the residual gas pressure is 0.02 mPa or less, and an He—Xe or Ne—Xe rare gas (discharge gas) is induced into discharge spaces 30. The amount of the secondary gas included within discharge spaces 30 when, for example, carbon dioxide is included therein, is suitably set in terms of both a discharge starting voltage and an electron emission ability, so that the partial pressure of the carbon dioxide is in a range of 0.05 mPa to 0.5 mPa inclusive.

摘要翻译： 一种能够在低驱动电压下高速驱动的气体放电面板及其制造方法，同时抑制写入期间的写入错误的发生。 为此，在本发明的气体放电面板中，将由二氧化碳，水蒸气，氧气和氮气中的至少一种形成的二次气体引入排气空间30中，直至残留气体压力为0.02mPa以下， 并且将He-Xe或Ne-Xe稀有气体（放电气体）引入放电空间30。 包括在放电空间30内的二次气体的量例如在其中包含二氧化碳时，根据放电起始电压和电子发射能力来适当地设定，使得二氧化碳的分压为 0.05mPa〜0.5mPa的范围。

公开(公告)号：US5984752A

公开(公告)日：1999-11-16

申请号：US47131

申请日：1998-03-24

申请人： Hiroyoshi Tanaka ,  Koichi Kotera ,  Masao Uchida

发明人： Hiroyoshi Tanaka ,  Koichi Kotera ,  Masao Uchida

IPC分类号： H01J1/304 ,  H01J9/02

CPC分类号： B82Y10/00 ,  H01J1/3042 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2329/00

摘要： An electron emission cathode includes: an n-type semiconductor film including diamond particles partially projecting from a surface of the n-type semiconductor film; and an anode opposing the n-type semiconductor film with a vacuum interposed therebetween. Electrons are emitted by applying a voltage between the anode and the n-type semiconductor film.

摘要翻译： 电子发射阴极包括：n型半导体膜，包括从n型半导体膜的表面部分地突出的金刚石颗粒; 以及与之间的真空相对的n型半导体膜的阳极。 通过在阳极和n型半导体膜之间施加电压来发射电子。

公开(公告)号：US08159437B2

公开(公告)日：2012-04-17

申请号：US13176993

申请日：2011-07-06

申请人： Mitsuru Goto ,  Hiroshi Katayanagi ,  Yukihide Ode ,  Yoshiyuki Saitou ,  Koichi Kotera

发明人： Mitsuru Goto ,  Hiroshi Katayanagi ,  Yukihide Ode ,  Yoshiyuki Saitou ,  Koichi Kotera

IPC分类号： G09G3/36

CPC分类号： G09G3/3696 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0289

摘要： A semiconductor integrated circuit includes a first register which latches display data, a second register which latches the display data of the first register in accordance with a first clock, a gray scale voltage generator which outputs a plurality of gray scale voltages, a decoder which selects a gray scale voltage in accordance with the display data of the second register from the plurality of gray scale voltages, and an amplifier including a first transistor, and a second transistor. A first terminal of the first transistor and a first terminal of the second transistor are connected to a first voltage line, and the gray scale voltage outputted from the decoder is supplied to one of input terminals of the first transistor and the second transistor in accordance with a control signal. A phase of the control signal is reversed at intervals of two frame periods.

摘要翻译： 半导体集成电路包括锁存显示数据的第一寄存器，根据第一时钟锁存第一寄存器的显示数据的第二寄存器，输出多个灰度级电压的灰度级电压发生器，选择 根据来自多个灰度级电压的第二寄存器的显示数据的灰度级电压，以及包括第一晶体管和第二晶体管的放大器。 第一晶体管的第一端子和第二晶体管的第一端子连接到第一电压线，并且从解码器输出的灰度电压根据第一晶体管的第一端子被提供给第一晶体管和第二晶体管的输入端 一个控制信号。 控制信号的相位以两帧周期的间隔反转。

公开(公告)号：US06761608B2

公开(公告)日：2004-07-13

申请号：US09964837

申请日：2001-09-26

申请人： Hiroyoshi Tanaka ,  Ryuichi Murai ,  Hideaki Yasui ,  Yoshiki Sasaki ,  Akira Shiokawa ,  Masatoshi Kudoh ,  Koichi Kotera ,  Masaki Aoki ,  Mitsuhiro Ohtani ,  Shigeo Suzuki ,  Kinzou Nonomura

发明人： Hiroyoshi Tanaka ,  Ryuichi Murai ,  Hideaki Yasui ,  Yoshiki Sasaki ,  Akira Shiokawa ,  Masatoshi Kudoh ,  Koichi Kotera ,  Masaki Aoki ,  Mitsuhiro Ohtani ,  Shigeo Suzuki ,  Kinzou Nonomura

IPC分类号： H01J926

CPC分类号： H01J11/12 ,  H01J9/02 ,  H01J11/38

摘要： A PDP does not suffer from dielectric breakdown even though a dielectric layer is thin, with the problems of conventional PDPs, such as cracks appearing in the glass substrates during the production of the PDP being avoided. To do so, the surface of silver electrodes of the PDP is coated with a 0.1-10 &mgr;m layer of a metallic oxide, on whose surface OH groups exist, such as ZnO, ZrO2, MgO, TiO2, Al2O3, and Cr2O3. The metallic oxide layer is then coated with the dielectric layer. It is preferable to form the metallic oxide layer with the CVD method. The surface of a metallic electrode can be coated with a metallic oxide, which is then coated with a dielectric layer. The dielectric layer can be made of a metallic oxide with a vacuum process method or the plasma thermal spraying method. The dielectric layer formed on electrodes with the CVD method is remarkably thin and flawless. When the dielectric layer is formed with the vacuum process method or the plasma spraying method, warping and cracks conventionally caused by baking the dielectric layer are prevented. Here, borosilicate glass including 6.5% or less by weight of alkali can be used as the glass substrate.

摘要翻译： 即使电介质层较薄，PDP也不会受到电介质击穿，同时避免了在制造PDP期间在玻璃基板中出现的常规PDP的问题。 为了这样做，PDP的银电极的表面涂覆有0.1-10μm的金属氧化物层，其表面上存在OH基团，例如ZnO，ZrO 2，MgO，TiO 2，Al 2 O 3和Cr 2 O 3。 然后用电介质层涂覆金属氧化物层。 优选用CVD法形成金属氧化物层。 金属电极的表面可以涂覆有金属氧化物，然后涂覆有介电层。 电介质层可以用真空处理方法或等离子体热喷涂方法由金属氧化物制成。 用CVD法形成在电极上的电介质层非常薄且无瑕疵。 当使用真空处理方法或等离子喷涂方法形成电介质层时，防止了通常由电介质层烘烤引起的翘曲和裂纹。 这里可以使用包含6.5重量％以下的碱的硼硅酸盐玻璃作为玻璃基板。