公开(公告)号：US06156639A

公开(公告)日：2000-12-05

申请号：US116340

申请日：1998-07-16

申请人： Tetsuhiro Fukao ,  Yoshihiro Kusumi ,  Hiroshi Miyatake ,  Nobuo Fujiwara ,  Shigenori Sakamori ,  Satoshi Iida

发明人： Tetsuhiro Fukao ,  Yoshihiro Kusumi ,  Hiroshi Miyatake ,  Nobuo Fujiwara ,  Shigenori Sakamori ,  Satoshi Iida

IPC分类号： H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532 ,  H01L21/4763

CPC分类号： H01L23/53223 ,  H01L21/76838 ,  H01L23/5226 ,  H01L2924/0002

摘要： Provided are a method for manufacturing contact structure to prevent, in the wire of a borderless structure, erosion in the contact area between the wire and a conductor. An interlayer insulating film (300) having a wire burying hole is formed and a conductor (400) is buried in the hole. Then, a wire layer (500) covering the hole is formed on the interlayer insulating film (300). The wire layer (500) is made so as to have a borderless structure by using a resist (540) as a mask. A barrier metal layer (510) suppresses erosion in the contact area between the conductor (400) and the wire layer (500).

摘要翻译： 提供一种用于制造接触结构的方法，以防止无边界结构的电线在导线和导体之间的接触面积中受到侵蚀。 形成具有线掩埋孔的层间绝缘膜（300），将导体（400）埋入孔内。 然后，在层间绝缘膜（300）上形成覆盖该孔的导线层（500）。 通过使用抗蚀剂（540）作为掩模，将导线层（500）制成为具有无边界结构。 阻挡金属层（510）抑制导体（400）和导线层（500）之间的接触区域的侵蚀。

公开(公告)号：US06232209B1

公开(公告)日：2001-05-15

申请号：US09440568

申请日：1999-11-15

申请人： Nobuo Fujiwara ,  Takahiro Maruyama ,  Shigenori Sakamori ,  Akemi Teratani ,  Satoshi Ogino ,  Kazuyuki Ohmi ,  Yuzo Irie

发明人： Nobuo Fujiwara ,  Takahiro Maruyama ,  Shigenori Sakamori ,  Akemi Teratani ,  Satoshi Ogino ,  Kazuyuki Ohmi ,  Yuzo Irie

IPC分类号： H01L213205

CPC分类号： H01L21/28114 ,  H01L21/28044 ,  H01L21/32137 ,  H01L29/42376 ,  H01L29/4941

摘要： A gate electrode includes a polycrystalline silicon layer, a barrier layer and a metal layer. The metal layer and barrier layer includes for example W and RuO2 layers, respectively. In forming the gate electrode, the metal layer and barrier layer are etched using at least one of the barrier layer and polycrystalline silicon layer as an etching stopper.

摘要翻译： 栅电极包括多晶硅层，阻挡层和金属层。 金属层和阻挡层分别包括例如W和RuO 2层。 在形成栅电极时，使用阻挡层和多晶硅层中的至少一个作为蚀刻停止层蚀刻金属层和阻挡层。

公开(公告)号：US20060245603A1

公开(公告)日：2006-11-02

申请号：US11386753

申请日：2006-03-23

申请人： Nobuyuki Suzuki ,  Nobuo Fujiwara

发明人： Nobuyuki Suzuki ,  Nobuo Fujiwara

IPC分类号： H03G3/00

CPC分类号： H03G1/0088

摘要： An audio signal is input to a step-down transformer 11, where it is attenuated by voltage step-down, and then input via a select switch 12 to a variable resistor 13, where it is further attenuated by voltage division.

摘要翻译： 将音频信号输入到降压变压器11，在该降压变压器11中，通过降压降压，然后经由选择开关12输入到可变电阻器13，在该可变电阻器13中进一步被分压衰减。

公开(公告)号：US5534458A

公开(公告)日：1996-07-09

申请号：US442925

申请日：1995-05-17

申请人： Tomonori Okudaira ,  Takeharu Kuroiwa ,  Nobuo Fujiwara ,  Keiichiro Kashihara

发明人： Tomonori Okudaira ,  Takeharu Kuroiwa ,  Nobuo Fujiwara ,  Keiichiro Kashihara

IPC分类号： H01L21/28 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L23/522 ,  H01L27/04 ,  H01L27/105 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L27/10852 ,  H01L21/3205 ,  H01L28/40 ,  H01L28/55 ,  Y10S257/915 ,  Y10S438/978

摘要： According to a semiconductor device and a method of manufacturing thereof, a sidewall spacer is formed at a sidewall of a contact hole, in a recess portion defined by the sidewall of the contact hole and a buried conductive layer, having a film thickness gradually increasing from a top face corner of an interlayer insulation film to the surface of the buried conductive layer. Therefore, a semiconductor device that can achieve favorable breakdown voltage and anti-leak characteristics between a lower electrode layer and an upper electrode layer forming a capacitor of a DRAM.

摘要翻译： 根据半导体器件及其制造方法，在由接触孔的侧壁限定的凹部和埋入导电层的接触孔的侧壁处形成侧壁间隔物，其中膜厚度从 层间绝缘膜的顶面角到掩埋导电层的表面。 因此，可以在形成DRAM的电容器的下电极层和上电极层之间实现良好的击穿电压和防漏电特性的半导体装置。

公开(公告)号：US5435886A

公开(公告)日：1995-07-25

申请号：US247405

申请日：1994-05-23

申请人： Nobuo Fujiwara ,  Takahiro Maruyama ,  Kenji Kawai ,  Takahiro Hoshiko

发明人： Nobuo Fujiwara ,  Takahiro Maruyama ,  Kenji Kawai ,  Takahiro Hoshiko

IPC分类号： C23F4/00 ,  H01J37/02 ,  H01J37/32 ,  H01L21/302 ,  H01L21/3065 ,  B44C1/22

CPC分类号： H01J37/32623 ,  H01J37/026 ,  H01J37/32192 ,  H01J37/32678 ,  H01J37/32706 ,  H01J2237/0044 ,  H01J2237/3347

摘要： A method of electron cyclotron resonance plasma etching including generating a constant plasma in a gas in a chamber containing a semiconductor wafer by supplying microwave energy to the chamber continuously and applying a pulsed direct current bias to the semiconductor wafer, wherein the pulsed bias has a period substantially equal to a time constant determined by the capacitance of the semiconductor wafer and the resistance of an ion sheath at the surface of the semiconductor wafer.

摘要翻译： 一种电子回旋共振等离子体蚀刻方法，其包括通过向所述腔室连续供给微波能量并向所述半导体晶片施加脉冲直流偏压，在包含半导体晶片的腔室中的气体中产生恒定的等离子体，其中所述脉冲偏压具有周期 基本上等于由半导体晶片的电容和离子鞘在半导体晶片表面的电阻确定的时间常数。

公开(公告)号：US4982138A

公开(公告)日：1991-01-01

申请号：US277640

申请日：1988-11-29

申请人： Nobuo Fujiwara ,  Kenji Kawai ,  Moriaki Akazawa ,  Teruo Shibano ,  Tomoaki Ishida ,  Kyusaku Nishioka

发明人： Nobuo Fujiwara ,  Kenji Kawai ,  Moriaki Akazawa ,  Teruo Shibano ,  Tomoaki Ishida ,  Kyusaku Nishioka

IPC分类号： H01L21/302 ,  H01J37/32 ,  H01L21/205 ,  H01L21/3065 ,  H01L21/31 ,  H05H1/46

CPC分类号： H01J37/32678

摘要： A wafer treating device utilizing a plasma generated by a gas discharge caused by electron cyclotron resonance (ECR) includes a wafer treating chamber and a plasma generating chamber, a microwave supply for supplying microwave energy to the plasma generating chamber, and an electromagnetic coil which surrounds the plasma generating chamber to produce a minimum B-field therein. A plasma generated in the plasma generating chamber by electron cyclotron resonance is confined stably therein by the minimum B-field produced by the coil. Thus, the density and stability of the plasma in the plasma generating chamber are enhanced. The plasma in the plasma generating chamber is conveyed to a wafer in the wafer treating chamber along the diverging lines of a magnetic force. Examples of the minimum B-field producing coil include Ioffe bars, a baseball coil and an Yin-yang coil.

摘要翻译： 利用由电子回旋共振（ECR）引起的气体放电产生的等离子体的晶片处理装置包括晶片处理室和等离子体发生室，用于向等离子体发生室供给微波能量的微波电源和围绕 该等离子体产生室在其中产生最小的B场。 通过电子回旋共振在等离子体发生室中产生的等离子体由线圈产生的最小B场稳定地限制在其中。 因此，提高等离子体发生室中的等离子体的密度和稳定性。 等离子体发生室中的等离子体沿着磁力的发散线被输送到晶片处理室中的晶片。 最小B场产生线圈的实例包括Ioffe棒，棒球线圈和阴阳线圈。

公开(公告)号：US4629998A

公开(公告)日：1986-12-16

申请号：US667394

申请日：1984-11-02

申请人： Nobuo Fujiwara

发明人： Nobuo Fujiwara

IPC分类号： H03G1/04 ,  H03H11/24 ,  H03F3/04 ,  H03G3/20

CPC分类号： H03G1/04 ,  H03H11/24

摘要： A variable gain equalizer comprises an equalizing network having an impedance element coupled between an input terminal to which an input voltage is applied and an output terminal. A potentiometer is provided having first and second mutually complementarily variable resistance portions divided by a slidable tap having an inherent contact resistance connected to ground. The first and second portions of the potentiometer are coupled in the equalizing network in series with the impedance element. An inversion type current mirror curcuit causes an input alternating current to flow as a function of the input voltage in the contact resistance of the potentiometer through the first resistance portion and causes an output alternating current of equal amplitude to, but opposite phase to, the input alternating current to flow in the contact resistance through the second resistance portion and impedance element to the output terminal.

摘要翻译： 可变增益均衡器包括均衡网络，其具有耦合在施加输入电压的输入端子与输出端子之间的阻抗元件。 电位器具有第一和第二相互互补的电阻部分，由具有连接到地的固有接触电阻的可滑动的分接头分开。 电位器的第一和第二部分与均衡网络耦合，与阻抗元件串联。 反转型电流镜电路使得输入交流电流作为电位器通过第一电阻部分的接触电阻中的输入电压的函数流动，并且产生与输入相等但相反相位的输出交流电 交流电流通过第二电阻部分和阻抗元件在接触电阻中流到输出端子。

公开(公告)号：US5442213A

公开(公告)日：1995-08-15

申请号：US255854

申请日：1994-06-07

申请人： Tomonori Okudaira ,  Takeharu Kuroiwa ,  Nobuo Fujiwara ,  Keiichiro Kashihara

发明人： Tomonori Okudaira ,  Takeharu Kuroiwa ,  Nobuo Fujiwara ,  Keiichiro Kashihara

IPC分类号： H01L21/28 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L23/522 ,  H01L27/04 ,  H01L27/105 ,  G11C11/24

CPC分类号： H01L27/10852 ,  H01L21/3205 ,  H01L28/40 ,  H01L28/55 ,  Y10S257/915 ,  Y10S438/978

摘要： According to a semiconductor device and a method of manufacturing thereof, a sidewall spacer is formed at a sidewall of a contact hole, in a recess portion defined by the sidewall of the contact hole and a buried conductive layer, having a film thickness gradually increasing from a top face corner of an interlayer insulation film to the surface of the buried conductive layer. Therefore, a semiconductor device that can achieve favorable breakdown voltage and anti-leak characteristics between a lower electrode layer and an upper electrode layer forming a capacitor of a DRAM.

摘要翻译： 根据半导体器件及其制造方法，在由接触孔的侧壁限定的凹部和埋入导电层的接触孔的侧壁处形成侧壁间隔物，其中膜厚度从 层间绝缘膜的顶面角到掩埋导电层的表面。 因此，可以在形成DRAM的电容器的下电极层和上电极层之间实现良好的击穿电压和防漏电特性的半导体装置。

公开(公告)号：US5292395A

公开(公告)日：1994-03-08

申请号：US885603

申请日：1992-05-19

申请人： Nobuo Fujiwara

发明人： Nobuo Fujiwara

IPC分类号： H01L21/285 ,  H01J37/32 ,  H01L21/302 ,  H01L21/3065 ,  H05H1/18 ,  H01L21/00

CPC分类号： H01J37/32623 ,  H01J37/32678

摘要： A plasma reaction apparatus has main and auxiliary magnetic field generating coils for generating a magnetic field which has a gradient of no more than 50 gauss/cm in the axial direction and a difference between the axial magnetic field gradient and the magnetic field gradient ten centimeters from the axis of no more than 10 gauss/cm for processing a semiconductor substrate. The plasma reaction apparatus is able to generate a high density, uniform plasma so that the semiconductor substrate is uniformly processed at high speed.

摘要翻译： 等离子体反应装置具有用于产生磁场的主辅助磁场产生线圈，该磁场具有在轴向方向上不超过50高斯/厘米的梯度，并且轴向磁场梯度与距磁场梯度10厘米的磁场梯度之间的差 用于处理半导体衬底的轴线不超过10高斯/厘米。 等离子体反应装置能够产生高密度均匀的等离子体，使得半导体基板以高速均匀地加工。

公开(公告)号：US4873493A

公开(公告)日：1989-10-10

申请号：US158919

申请日：1988-02-19

申请人： Nobuo Fujiwara

发明人： Nobuo Fujiwara

IPC分类号： H03F1/02

CPC分类号： H03F1/0244

摘要： An audio amplifier whose operating point and supply voltage can be change in response to a level of an input signal. The audio amplifier includes a delay circuit for delaying an input signal, an amplifier circuit having an amplification device for amplifying an output signal of the delay circuit, the amplifier circuit having a variable operating point, a power supply circuit capable of changing a supply voltage to the amplifier circuit, and a control circuit for detecting a level of the input signal to output a control signal corresponding to the detecting level, and changing the operating point and supply voltage of the amplifier circuit, in response to a level change of the input signal.