公开(公告)号：US5895586A

公开(公告)日：1999-04-20

申请号：US737520

申请日：1996-11-12

申请人： Tetsunori Kaji ,  Saburo Kanai ,  Satoshi Ito ,  Ryoji Hamasaki ,  Tetsuo Ono ,  Tatehito Usui ,  Kazue Takahashi ,  Kazutami Tago

发明人： Tetsunori Kaji ,  Saburo Kanai ,  Satoshi Ito ,  Ryoji Hamasaki ,  Tetsuo Ono ,  Tatehito Usui ,  Kazue Takahashi ,  Kazutami Tago

IPC分类号： H01J37/32 ,  B23K10/00

CPC分类号： H01J37/32467 ,  H01J37/32477 ,  Y10S156/914

摘要： There are provided a plasma processing apparatus and a plasma processing method which are suitable for processing a processed substance using a gas plasma containing fluorine atoms.Structural materials used for a high vacuum processing chamber of a plasma processing apparatus are aluminum, aluminum having an anodic oxide coating processed surface and a material having a film of aluminum oxide or a film having aluminum oxide as a main component. A part or the whole of the inner surfaces of the processing chamber is constructed with a pre-fluorinated material.When plasma processing of a processed substance is performed using a gas plasma containing fluorine atoms in the processing chamber having the pre-fluorinated inner surfaces, time-varying processing characteristic can be suppressed.

摘要翻译： PCT No.PCT / JP95 / 00935 Sec。 371日期：1996年11月12日 102（e）日期1996年11月12日PCT提交1995年5月17日PCT公布。 出版物WO95 / 31822 日期：1995年11月23日提供了适用于使用含有氟原子的气体等离子体处理物质的等离子体处理装置和等离子体处理方法。 用于等离子体处理装置的高真空处理室的结构材料是具有阳极氧化物涂覆处理表面的铝，具有氧化铝膜或具有氧化铝作为主要成分的膜的材料。 处理室的内表面的一部分或全部由预氟化材料构成。 使用具有预氟化内表面的处理室中含有氟原子的气体等离子体进行处理物质的等离子体处理时，可以抑制时变处理特性。

公开(公告)号：US20050026424A1

公开(公告)日：2005-02-03

申请号：US10923877

申请日：2004-08-24

申请人： Hiroyuki Enomoto ,  Kazutami Tago ,  Atsushi Maekawa

发明人： Hiroyuki Enomoto ,  Kazutami Tago ,  Atsushi Maekawa

IPC分类号： H01L21/3065 ,  H01L21/311 ,  H01L21/768 ,  H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/76811 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/76813 ,  H01L21/76832

摘要： The following defects are suppressed: when an interlayer insulating film including a silicon carbide film and an organic insulating film is dry-etched to form interconnection grooves over underlying Cu interconnections, an insulating reactant adheres to the surface of the underlying Cu interconnections exposed to the bottom of the interconnection grooves, or the silicon carbide film or the organic insulating film exposed to the side walls of the interconnection grooves are side-etched. When a lamination film made of a silicon oxide film, an organic insulating film, a silicon oxide film, an organic insulating film and a silicon carbide film is dry-etched to form interconnection grooves over Cu interconnections, a mixed gas of SF6 and NH3 is used as an etching gas for the silicon carbide film to work side walls of the interconnection grooves perpendicularly and further suppress defects that a deposit or a reactant adheres to the surface of the Cu interconnections exposed to the bottom of the interconnection grooves.

摘要翻译： 抑制以下缺陷：当将包括碳化硅膜和有机绝缘膜的层间绝缘膜干蚀刻以在下面的Cu互连之上形成互连槽时，绝缘反应物粘附到暴露于底部的下面的Cu互连体的表面 的互连槽或暴露于互连槽的侧壁的碳化硅膜或有机绝缘膜被侧蚀刻。 当由氧化硅膜，有机绝缘膜，氧化硅膜，有机绝缘膜和碳化硅膜制成的层压膜被干蚀刻以在Cu互连上形成互连槽时，SF6和NH3的混合气体是 用作碳化硅膜的蚀刻气体垂直地工作互连槽的侧壁，并进一步抑制沉积物或反应物粘附到暴露于互连槽的底部的Cu互连件的表面的缺陷。

公开(公告)号：US20090011592A1

公开(公告)日：2009-01-08

申请号：US12194044

申请日：2008-08-19

申请人： Shouichi Uno ,  Atsushi Maekawa ,  Takashi Yunogami ,  Kazutami Tago ,  Kazuo Nojiri ,  Shuntaro Machida ,  Takafumi Tokunaga

发明人： Shouichi Uno ,  Atsushi Maekawa ,  Takashi Yunogami ,  Kazutami Tago ,  Kazuo Nojiri ,  Shuntaro Machida ,  Takafumi Tokunaga

IPC分类号： H01L21/768

CPC分类号： H01L21/02126 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3122 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76829 ,  H01L21/76835

摘要： In a process for the manufacture of a semiconductor integrated circuit device having an inlaid interconnect structure by embedding a conductor film in a recess, such as a trench or hole, formed in an organic insulating film which constitutes an interlevel dielectric film and includes an organosiloxane as a main component, the recess, such as a trench or hole, is formed by subjecting the organic insulating film to plasma dry etching in a CF-based gas/N2/Ar gas in order to suppress the formation of an abnormal shape on the bottom of the recess, upon formation of a photoresist film over the organic insulating film, followed by formation of the recess therein with the photoresist film as an etching mask.

摘要翻译： 在制造具有嵌入式互连结构的半导体集成电路器件的方法中，通过将导体膜嵌入形成在构成层间电介质膜的有机绝缘膜中的凹槽（例如沟槽或孔）中并且包括有机硅氧烷作为 通过在CF基气体/ N 2 / Ar气体中对有机绝缘膜进行等离子体干蚀刻来形成主要部件，凹槽，例如沟槽或孔，以抑制底部形成异常形状 在有机绝缘膜上形成光致抗蚀剂膜之后，随后用光致抗蚀剂膜作为蚀刻掩模形成凹部。

公开(公告)号：US20070134922A1

公开(公告)日：2007-06-14

申请号：US11354919

申请日：2006-02-16

申请人： Masahito Mori ,  Toshiaki Nishida ,  Naoshi Itabashi ,  Motohiko Yoshigai ,  Hideyuki Kazumi ,  Kazutami Tago

发明人： Masahito Mori ,  Toshiaki Nishida ,  Naoshi Itabashi ,  Motohiko Yoshigai ,  Hideyuki Kazumi ,  Kazutami Tago

IPC分类号： H01L21/302

CPC分类号： H01L21/32136 ,  H01L21/28123 ,  H01L21/31138 ,  H01L21/32137 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/823878 ,  H01L21/84 ,  H01L22/26 ,  H01L29/66795

摘要： An etching technique capable of applying etching at high selectivity to a transition metal element-containing electrode material layer which is formed on or above a dielectric material layer made of a high-dielectric-constant or “high-k” insulator is provided. To this end, place a workpiece on a lower electrode located within a vacuum processing vessel. The workpiece has a multilayer structure of an electrode material layer which contains therein a transition metal element and a dielectric material layer made of high-k insulator. Then, while introducing a processing gas into the vacuum processing vessel, high-frequency power is applied to inside of the vacuum processing vessel, thereby performing plasma conversion of the introduced processing gas so that the workpiece is etched at its surface. When etching the electrode material layer, an HCl gas is supplied as the processing gas.

摘要翻译： 提供一种能够以高选择性对在由高介电常数或“高k”绝缘体制成的电介质材料层上形成的含过渡金属元素的电极材料层进行蚀刻的蚀刻技术。 为此，将工件放置在位于真空处理容器内的下电极上。 工件具有电极材料层的多层结构，其中包含过渡金属元件和由高k绝缘体制成的电介质材料层。 然后，在将真空​​处理容器内的处理气体导入真空处理容器的内部的同时，向真空处理容器的内部施加高频电力，进行等离子体转换，使工件在其表面被蚀刻。 当蚀刻电极材料层时，作为处理气体供给HCl气体。

公开(公告)号：US06309980B1

公开(公告)日：2001-10-30

申请号：US09564754

申请日：2000-05-04

申请人： Takafumi Tokunaga ,  Sadayuki Okudaira ,  Tatsumi Mizutani ,  Kazutami Tago ,  Hideyuki Kazumi ,  Ken Yoshioka

发明人： Takafumi Tokunaga ,  Sadayuki Okudaira ,  Tatsumi Mizutani ,  Kazutami Tago ,  Hideyuki Kazumi ,  Ken Yoshioka

IPC分类号： H01L2100

CPC分类号： H01L21/31116 ,  H01L21/76802

摘要： To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable state in a plasma and a flon gas to interact with each other and selectively obtaining desired dissociated species.

摘要翻译： 为了在LSI的制造中以高选择率和高精度实现蚀刻，当通过使惰性气体激发成亚稳态来干法蚀刻半导体衬底上的薄膜时，反应气体的解离物质的组成被精确地控制 状态在等离子体和氟里昂气体中彼此相互作用并选择性地获得期望的解离物种。

公开(公告)号：US09640366B2

公开(公告)日：2017-05-02

申请号：US13580288

申请日：2011-02-09

申请人： Toshiyuki Yokosuka ,  Minoru Yamazaki ,  Hideyuki Kazumi ,  Kazutami Tago

发明人： Toshiyuki Yokosuka ,  Minoru Yamazaki ,  Hideyuki Kazumi ,  Kazutami Tago

IPC分类号： H01J37/28 ,  H01J37/02 ,  H01J37/26

CPC分类号： H01J37/28 ,  H01J37/026 ,  H01J37/266 ,  H01J37/268 ,  H01J2237/0048 ,  H01J2237/24564 ,  H01J2237/2594

摘要： The present invention has for its object to provide a charged particle beam irradiation method and a charged particle beam apparatus which can suppress unevenness of electrification even when a plurality of different kinds of materials are contained in a pre-dosing area or degrees of density of patterns inside the pre-dosing area differs with positions.To accomplish the above object, a charged particle beam irradiation method and a charged particle beam apparatus are provided according to which the pre-dosing area is divided into a plurality of divisional areas and electrifications are deposited to the plural divisional areas by using a beam under different beam irradiation conditions. With the above construction, the electrifications can be deposited to the pre-dosing area on the basis of such an irradiation condition that the differences in electrification at individual positions inside the pre-dosing area can be suppressed and consequently, an influence an electric field has upon the charged particle beam and electrons given off from the sample can be suppressed.

公开(公告)号：US20070072408A1

公开(公告)日：2007-03-29

申请号：US11531611

申请日：2006-09-13

申请人： Hiroyuki Enomoto ,  Kazutami Tago ,  Atsushi Maekawa

发明人： Hiroyuki Enomoto ,  Kazutami Tago ,  Atsushi Maekawa

IPC分类号： H01L21/4763

CPC分类号： H01L21/76811 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/76813 ,  H01L21/76832

摘要： The following defects are suppressed: when an interlayer insulating film including a silicon carbide film and an organic insulating film is dry-etched to form interconnection grooves over underlying Cu interconnections, an insulating reactant adheres to the surface of the underlying Cu interconnections exposed to the bottom of the interconnection grooves, or the silicon carbide film or the organic insulating film exposed to the side walls of the interconnection grooves are side-etched. When a lamination film made of a silicon oxide film, an organic insulating film, a silicon oxide film, an organic insulating film and a silicon carbide film is dry-etched to form interconnection grooves over Cu interconnections, a mixed gas of SF6 and NH3 is used as an etching gas for the silicon carbide film to work side walls of the interconnection grooves perpendicularly and further suppress defects that a deposit or a reactant adheres to the surface of the Cu interconnections exposed to the bottom of the interconnection grooves.

摘要翻译： 抑制以下缺陷：当将包括碳化硅膜和有机绝缘膜的层间绝缘膜干蚀刻以在下面的Cu互连之上形成互连槽时，绝缘反应物粘附到暴露于底部的下面的Cu互连体的表面 的互连槽或暴露于互连槽的侧壁的碳化硅膜或有机绝缘膜被侧蚀刻。 当由氧化硅膜，有机绝缘膜，氧化硅膜，有机绝缘膜和碳化硅膜制成的叠层膜被干蚀刻以在Cu互连上形成互连槽时，SF < 6和NH 3用作碳化硅膜的蚀刻气体，以垂直地对互连槽的侧壁进行加工，并进一步抑制沉积物或反应物附着在表面上的缺陷 暴露于互连槽底部的Cu互连。

公开(公告)号：US20050186801A1

公开(公告)日：2005-08-25

申请号：US11104441

申请日：2005-04-13

申请人： Shouochi Uno ,  Atsushi Maekawa ,  Takashi Yunogami ,  Kazutami Tago ,  Kazuo Nojiri ,  Shuntaro Machida ,  Takafumi Tokunaga

发明人： Shouochi Uno ,  Atsushi Maekawa ,  Takashi Yunogami ,  Kazutami Tago ,  Kazuo Nojiri ,  Shuntaro Machida ,  Takafumi Tokunaga

IPC分类号： H01L21/3065 ,  H01L21/311 ,  H01L21/312 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/02126 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3122 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76829 ,  H01L21/76835

摘要： In a process for the manufacture of a semiconductor integrated circuit device having an inlaid interconnect structure by embedding a conductor film in a recess, such as a trench or hole, formed in an organic insulating film which constitutes an interlevel dielectric film and includes an organosiloxane as a main component, the recess, such as a trench or hole, is formed by subjecting the organic insulating film to plasma dry etching in a CF-based gas/N2/Ar gas in order to suppress the formation of an abnormal shape on the bottom of the recess, upon formation of a photoresist film over the organic insulating film, followed by formation of the recess therein with the photoresist film as an etching mask.

摘要翻译： 在制造具有嵌入式互连结构的半导体集成电路器件的方法中，通过将导体膜嵌入形成在构成层间电介质膜的有机绝缘膜中的凹槽（例如沟槽或孔）中，并且包括有机硅氧烷作为 通过使有机绝缘膜在基于CF的气体/ N 2 / Ar气中进行等离子体干蚀刻来形成主要部件，凹槽，例如沟槽或孔，以便抑制 在凹陷的底部形成异常形状，在有机绝缘膜上形成光致抗蚀剂膜，然后用光致抗蚀剂膜作为蚀刻掩模形成凹部。

公开(公告)号：US07737023B2

公开(公告)日：2010-06-15

申请号：US12194044

申请日：2008-08-19

申请人： Shouochi Uno ,  Atsushi Maekawa ,  Takashi Yunogami ,  Kazutami Tago ,  Kazuo Nojiri ,  Shuntaro Machida ,  Takafumi Tokunaga

发明人： Shouochi Uno ,  Atsushi Maekawa ,  Takashi Yunogami ,  Kazutami Tago ,  Kazuo Nojiri ,  Shuntaro Machida ,  Takafumi Tokunaga

IPC分类号： H01L21/4763

CPC分类号： H01L21/02126 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3122 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76829 ,  H01L21/76835

摘要： In a process for the manufacture of a semiconductor integrated circuit device having an inlaid interconnect structure by embedding a conductor film in a recess, such as a trench or hole, formed in an organic insulating film which constitutes an interlevel dielectric film and includes an organosiloxane as a main component, the recess, such as a trench or hole, is formed by subjecting the organic insulating film to plasma dry etching in a CF-based gas/N2/Ar gas in order to suppress the formation of an abnormal shape on the bottom of the recess, upon formation of a photoresist film over the organic insulating film, followed by formation of the recess therein with the photoresist film as an etching mask.

摘要翻译： 在制造具有嵌入式互连结构的半导体集成电路器件的方法中，通过将导体膜嵌入形成在构成层间电介质膜的有机绝缘膜中的凹槽（例如沟槽或孔）中，并且包括有机硅氧烷作为 通过在CF基气体/ N 2 / Ar气体中对有机绝缘膜进行等离子体干蚀刻来形成主要部件，凹槽，例如沟槽或孔，以抑制底部形成异常形状 在有机绝缘膜上形成光致抗蚀剂膜之后，随后用光致抗蚀剂膜作为蚀刻掩模形成凹部。

公开(公告)号：US07419902B2

公开(公告)日：2008-09-02

申请号：US11104441

申请日：2005-04-13

申请人： Shouochi Uno ,  Atsushi Maekawa ,  Takashi Yunogami ,  Kazutami Tago ,  Kazuo Nojiri ,  Shuntaro Machida ,  Takafumi Tokunaga

发明人： Shouochi Uno ,  Atsushi Maekawa ,  Takashi Yunogami ,  Kazutami Tago ,  Kazuo Nojiri ,  Shuntaro Machida ,  Takafumi Tokunaga

IPC分类号： H01L21/4763

CPC分类号： H01L21/02126 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3122 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76829 ,  H01L21/76835

摘要： In a process for the manufacture of a semiconductor integrated circuit device having an inlaid interconnect structure by embedding a conductor film in a recess, such as a trench or hole, formed in an organic insulating film which constitutes an interlevel dielectric film and includes an organosiloxane as a main component, the recess, such as a trench or hole, is formed by subjecting the organic insulating film to plasma dry etching in a CF-based gas/N2/Ar gas in order to suppress the formation of an abnormal shape on the bottom of the recess, upon formation of a photoresist film over the organic insulating film, followed by formation of the recess therein with the photoresist film as an etching mask.

摘要翻译： 在制造具有嵌入式互连结构的半导体集成电路器件的方法中，通过将导体膜嵌入形成在构成层间电介质膜的有机绝缘膜中的凹槽（例如沟槽或孔）中，并且包括有机硅氧烷作为 通过使有机绝缘膜在基于CF的气体/ N 2 / Ar气中进行等离子体干蚀刻来形成主要部件，凹槽，例如沟槽或孔，以便抑制 在凹陷的底部形成异常形状，在有机绝缘膜上形成光致抗蚀剂膜，然后用光致抗蚀剂膜作为蚀刻掩模形成凹部。