公开(公告)号：US20100323643A1

公开(公告)日：2010-12-23

申请号：US12867498

申请日：2009-02-19

申请人： Timothy John Ridgers

发明人： Timothy John Ridgers

IPC分类号： H04B1/04 ,  H04B1/26 ,  H03B21/00

CPC分类号： H03L7/0994 ,  H03L7/085

摘要： A frequency synthesiser (100) has a first variable frequency oscillator (10) for generating a first oscillator signal having a frequency responsive to a first control signal, a second variable frequency oscillator (50) for generating a second oscillator signal having a frequency responsive to a second control signal, and a phase reference generator (40) for generating a phase reference signal. There is a phase difference generator (30) for generating a phase difference signal indicative of the phase difference between the sum of the phases of the first and second oscillator signals and the phase of the phase reference signal. A controller (60) responsive to the phase difference signal generates the first and second control signals. At least one of the first and second control signal are determined dependent on a value of the phase difference signal, and at least one of them are determined dependent on a further characteristic of a signal, the further characteristic being supplementary to the effect of any dithering introduced into the frequency synthesiser (100).

摘要翻译： 频率合成器（100）具有用于产生具有响应于第一控制信号的频率的第一振荡器信号的第一可变频率振荡器（10），用于产生具有响应于频率的频率的第二振荡器信号的第二可变频率振荡器（50） 第二控制信号和用于产生相位参考信号的相位基准发生器（40）。 存在用于产生表示第一和第二振荡器信号的相位之和与相位参考信号的相位之间的相位差的相位差信号的相位差发生器（30）。 响应于相位差信号的控制器（60）产生第一和第二控制信号。 第一和第二控制信号中的至少一个取决于相位差信号的值来确定，并且根据信号的另一特性来确定它们中的至少一个，另外的特征补充了任何抖动的效果 引入频率合成器（100）。

公开(公告)号：US08364098B2

公开(公告)日：2013-01-29

申请号：US12771900

申请日：2010-04-30

申请人： Timothy John Ridgers

发明人： Timothy John Ridgers

IPC分类号： H04B1/04 ,  H03C3/06 ,  H03C3/09

CPC分类号： H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0991

摘要： A method for applying a modulation signal to a phase locked loop comprises filtering the modulation signal to provide a low frequency component and a high frequency for application to respectively the feedback and feedforward paths of a phase locked loop. The high frequency component is scaled by a gain factor before being applied to the feedforward path. The low frequency component is also scaled by a gain factor and applied to the feedforward path. The energy in a common low frequency range of the modulation signal and of the loop error signal is estimated, and the gain factors are modified dependent on the measured energy.

摘要翻译： 将调制信号施加到锁相环的方法包括对调制信号进行滤波以提供低频分量和高频，以分别应用于锁相环的反馈和前馈路径。 在施加到前馈路径之前，高频分量被增益因子缩放。 低频分量也被增益因子缩放并应用于前馈路径。 估计调制信号和环路误差信号的共同低频范围内的能量，并根据测得的能量修改增益因子。

公开(公告)号：US20110227621A1

公开(公告)日：2011-09-22

申请号：US13129564

申请日：2009-11-16

申请人： Timothy John Ridgers

发明人： Timothy John Ridgers

IPC分类号： H03L7/06 ,  H03M1/50

CPC分类号： G04F10/00

摘要： The invention relates to normalisation of a TDC system (20). The TDC system (20) comprises a TDC core (21), a gain normalization circuit (22) and an adjuster (23). The TDC core (21) comprises a set of nominally identical delay elements and converts the time difference between the edges of a reference clock signal (FREF) and a controllable clock signal (CLK) into a raw TDC output code as a digital word. The adjuster (23) is configured to carry out the gain normalisation by adjusting the output code. The gain normalization circuit (22) comprises at least a processor for analyzing the occurrence probability of the output code values, and for determining the adjustment to be made by the adjuster (23) according to said occurrence probability.

摘要翻译： 本发明涉及TDC系统（20）的归一化。 TDC系统（20）包括TDC内核（21），增益归一化电路（22）和调整器（23）。 TDC核心（21）包括一组名义上相同的延迟元件，并将基准时钟信号（FREF）和可控时钟信号（CLK）的边沿之间的时间差转换为原始TDC输出代码作为数字字。 调整器（23）被配置为通过调整输出代码来执行增益归一化。 增益归一化电路（22）至少包括用于分析输出代码值的发生概率的处理器，并且用于根据所述发生概率来确定由调整器（23）进行的调整。

公开(公告)号：US5986487A

公开(公告)日：1999-11-16

申请号：US995474

申请日：1997-12-22

申请人： Timothy John Ridgers

发明人： Timothy John Ridgers

IPC分类号： H03L7/18 ,  H03K17/66 ,  H03K19/086 ,  H03L7/089 ,  H03L7/093 ,  H03L7/06

CPC分类号： H03K17/667 ,  H03K19/086 ,  H03L7/0896

摘要： This circuit includes an output stage consisting of a current source SCE 52 and a current sink SNK 51 having an identical construction. A reference signal is applied to a D-type flipflop 40A and a local oscillator signal is applied to another flipflop 40B of the same type. The output 28 (27) of the flipflop 40A (40B) triggers a control circuit 30A (30B) whose output C-SCE (C-SNK) controls the current source SCE (SNK). The inputs of a logic gate 60 are connected to the control circuits 30A, 30B, and the gate supplies an inactive state reset signal to the flipflops 40A and 40B and the control circuits 30. Bias voltages which are common for the control circuits are generated by a circuit 20 which also fixes the elementary output current of the charge pump.

摘要翻译： 该电路包括由电流源SCE 52和具有相同结构的电流接收器SNK 51组成的输出级。 参考信号被施加到D型触发器40A，并且本地振荡器信号被施加到相同类型的另一个触发器40B。 触发器40A（40B）的输出28（27）触发其输出C-SCE（C-SNK）控制电流源SCE（SNK）的控制电路30A（30B）。 逻辑门60的输入连接到控制电路30A，30B，并且门向触发器40A和40B以及控制电路30提供无效状态复位信号。控制电路公共的偏​​置电压由 电路20也固定电荷泵的基本输出电流。

公开(公告)号：US20160190992A1

公开(公告)日：2016-06-30

申请号：US14635616

申请日：2015-03-02

申请人： Timothy John Ridgers ,  Louis PRAAMSMA

发明人： Timothy John Ridgers ,  Louis PRAAMSMA

IPC分类号： H03F1/02 ,  H03F3/19

CPC分类号： H03F1/0222 ,  H03F1/302 ,  H03F3/19 ,  H03F2200/165 ,  H03F2200/18 ,  H03F2200/294 ,  H03F2200/447 ,  H03F2200/451 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2200/471

摘要： A bias circuit for a transistor amplifier, the bias circuit comprising a low-pass filter block, a reference transistor, a sum node, a reference current source, and a current difference block, wherein the low-pass filter block is configured to sense a DC bias voltage at a control terminal of the transistor amplifier and provide the DC bias voltage to a control terminal of the reference transistor; the reference transistor is configured to output a bias current in response to the DC bias voltage and provide the bias current to the sum node; the sum node is configured to receive a reference current from the reference current source and combine the reference current with the bias current from the reference transistor to provide a difference current; and the current difference block is configured to receive the difference current from the sum node and provide the difference current to the control terminal of the transistor amplifier.

摘要翻译： 一种用于晶体管放大器的偏置电路，所述偏置电路包括低通滤波器块，参考晶体管，和节点，参考电流源和电流差分块，其中所述低通滤波器块被配置为感测 DC偏置电压，并将DC偏置电压提供给参考晶体管的控制端; 参考晶体管被配置为响应于DC偏置电压输出偏置电流，并将偏置电流提供给和节点; 所述和节点被配置为从所述参考电流源接收参考电流，并且将所述参考电流与来自所述参考晶体管的所述偏置电流组合以提供差分电流; 并且电流差分块被配置为从和节点接收差分电流，并将差分电流提供给晶体管放大器的控制端子。

公开(公告)号：US08204469B2

公开(公告)日：2012-06-19

申请号：US11814562

申请日：2006-01-19

申请人： Petrus Gerardus Maria Baltus ,  Timothy John Ridgers ,  Maja Vidojkovic

发明人： Petrus Gerardus Maria Baltus ,  Timothy John Ridgers ,  Maja Vidojkovic

IPC分类号： H04B1/26

CPC分类号： H03D7/1425 ,  H03D7/1433 ,  H03D7/1458 ,  H03D7/165 ,  H03D2200/0043

摘要： The system and method of the present invention provide a single mixer (200-400) with significantly reduced noise performance at a low cost by adding a current control circuit (109) that reduces the current in at least the switching stage (103, 303, 403) during polarity changes of the local oscillator (LO) signal (104). Alternative embodiments (300-400) are provided for a single mixer having significantly reduced noise wherein the low-noise characteristic is enhanced by a further modification to the switching stage (303-403).

摘要翻译： 本发明的系统和方法通过增加一个电流控制电路（109）来提供一种以低成本显着降低噪声性能的单一混频器（200-400），该电流控制电路减少了至少在开关级（103,303， 403），在本地振荡器（LO）信号（104）的极性改变期间。 为具有显着降低的噪声的单个混频器提供替代实施例（300-400），其中通过对开关级（303-403）的进一步修改来增强低噪声特性。

公开(公告)号：US09548701B2

公开(公告)日：2017-01-17

申请号：US14635616

申请日：2015-03-02

申请人： Timothy John Ridgers ,  Louis Praamsma

发明人： Timothy John Ridgers ,  Louis Praamsma

IPC分类号： H03F3/04 ,  H03F1/02 ,  H03F1/30 ,  H03F3/19

CPC分类号： H03F1/0222 ,  H03F1/302 ,  H03F3/19 ,  H03F2200/165 ,  H03F2200/18 ,  H03F2200/294 ,  H03F2200/447 ,  H03F2200/451 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2200/471

摘要： A bias circuit for a transistor amplifier, the bias circuit comprising a low-pass filter block, a reference transistor, a sum node, a reference current source, and a current difference block, wherein the low-pass filter block is configured to sense a DC bias voltage at a control terminal of the transistor amplifier and provide the DC bias voltage to a control terminal of the reference transistor; the reference transistor is configured to output a bias current in response to the DC bias voltage and provide the bias current to the sum node; the sum node is configured to receive a reference current from the reference current source and combine the reference current with the bias current from the reference transistor to provide a difference current; and the current difference block is configured to receive the difference current from the sum node and provide the difference current to the control terminal of the transistor amplifier.

摘要翻译： 一种用于晶体管放大器（Q1）的偏置电路，所述偏置电路包括低通滤波器块（1），参考晶体管（Q2），总和节点（14），参考电流源（4）和电流 差分块（5），其中所述低通滤波器块（1）被配置为感测所述晶体管放大器（Q1）的控制端的DC偏置电压，并将所述DC偏置电压提供给所述参考晶体管的控制端（ Q2）; 参考晶体管（Q2）被配置为响应于DC偏置电压输出偏置电流，并向和节点（14）提供偏置电流; 总和节点（14）被配置为从参考电流源（4）接收参考电流，并将参考电流与来自参考晶体管（Q2）的偏置电流组合以提供差分电流; 并且电流差分块（5）被配置为从和节点（14）接收差分电流，并将差动电流提供给晶体管放大器（Q1）的控制端子。

公开(公告)号：US07949313B2

公开(公告)日：2011-05-24

申请号：US11722083

申请日：2005-12-08

申请人： Timothy John Ridgers ,  Renaud Comte

发明人： Timothy John Ridgers ,  Renaud Comte

IPC分类号： H01Q11/12 ,  H04B1/04 ,  H04B1/26 ,  H04B1/28

CPC分类号： H03C3/40

摘要： A conversion device (CD) is dedicated to conversion of baseband analog I/Q input signals into RF signals in a transmitting path of a wireless communication equipment. This device (CD) comprises i) first (PP1) and second (PP2) processing paths each comprising i1) an input node (IN1, IN2) receiving an input signal (I/Q), i2) an input path (IP1, IP2) connected to the input node and delivering an input current representative of the input signal (I/Q), i3) an amplification means (A1, A2) having first and second inputs fed with the input current and a common-mode current and outputting an amplified signal, and i4) a transconductor (T1, T2) delivering first and second currents from the amplified signal, the first current feeding a negative feedback path connected to the first input of the amplification means and being essentially equal to the input current, and the second current being a chosen scaled copy of the first current and representative of a voltage difference between the input signals (I/Q), H) a common-mode input path (CIP) connected to the input nodes (IN1, IN2) and delivering the common-mode current from the input signals (I/Q) to feed the second input of each amplification means (A1, A2), and iii) a switch core (SC) for mixing the second current delivered by a chosen one of the transconductors (T1, T2) with a local oscillator RF carrier to deliver output RF signals representative of the input signals (I/Q).

摘要翻译： 转换装置（CD）专用于在无线通信设备的发送路径中将基带模拟I / Q输入信号转换成RF信号。 该设备（CD）包括i）第一（PP1）和第二（PP2）处理路径，每个处理路径包括i1）接收输入信号（I / Q）的输入节点（IN1，IN2），i2）输入路径（IP1，IP2 ）连接到输入节点并传送代表输入信号（I / Q）的输入电流，i3）具有馈送有输入电流的第一和第二输入和共模电流的放大装置（A1，A2）和输出 放大信号，以及i4）从放大的信号传送第一和第二电流的跨导体（T1，T2），所述第一电流馈送连接到所述放大装置的第一输入端并且基本上等于所述输入电流的负反馈路径， 并且所述第二电流是所述第一电流的选择的缩放副本，并且代表连接到所述输入节点（IN1，IN2）的输入信号（I / Q），H）之间的电压差，所述共模输入路径（CIP） 以及从所述输入信号（I / Q）传送所述共模电流以馈送所述秒 每个放大装置（A1，A2）的输入端，以及iii）用于将由选定的一个跨导体（T1，T2）传送的第二电流与本地振荡器RF载波混合的开关磁芯（SC），以输出输出RF信号 代表输入信号（I / Q）。

公开(公告)号：US20100279635A1

公开(公告)日：2010-11-04

申请号：US12771900

申请日：2010-04-30

申请人： Timothy John Ridgers

发明人： Timothy John Ridgers

IPC分类号： H03L7/00 ,  H04B1/04

CPC分类号： H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0991

摘要： A method for applying a modulation signal to a phase locked loop comprises filtering the modulation signal to provide a low frequency component and a high frequency for application to respectively the feedback and feedforward paths of a phase locked loop. The high frequency component is scaled by a gain factor before being applied to the feedforward path. The low frequency component is also scaled by a gain factor and applied to the feedforward path. The energy in a common low frequency range of the modulation signal and of the loop error signal is estimated, and the gain factors are modified dependent on the measured energy.

摘要翻译： 将调制信号施加到锁相环的方法包括对调制信号进行滤波以提供低频分量和高频，以分别应用于锁相环的反馈和前馈路径。 在施加到前馈路径之前，高频分量被增益因子缩放。 低频分量也被增益因子缩放并应用于前馈路径。 估计调制信号和环路误差信号的共同低频范围内的能量，并根据测得的能量修改增益因子。