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公开(公告)号：US20220223608A1
公开(公告)日：2022-07-14
申请号：US17706958
申请日：2022-03-29
Applicant: Tokyo Electron Limited
Inventor： Steven Consiglio , Kandabara Tapily , Robert Clark , Dina Triyoso
IPC: H01L27/1159 , H01L27/11507 , H01L29/51 , H01L45/00
Abstract: Bilayer stack for a ferroelectric tunnel junction and method of forming. The method includes depositing a first metal oxide film on a substrate by performing a first plurality of cycles of atomic layer deposition, where the first metal oxide film contains hafnium oxide, zirconium oxide, or both hafnium oxide and zirconium oxide, depositing a second metal oxide film on the substrate by performing a second plurality of cycles of atomic layer deposition, where the second metal oxide film contains hafnium oxide and zirconium oxide, and has a different hafnium oxide and zirconium oxide content than the first metal oxide film, and heat-treating the substrate to form a ferroelectric phase in the second metal oxide film but not in the first metal oxide film. A ferroelectric tunnel junction includes a first metal-containing electrode, the first metal oxide film, the second metal oxide film, and a second metal-containing electrode.
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公开(公告)号：US20200381624A1
公开(公告)日：2020-12-03
申请号：US16428554
申请日：2019-05-31
Inventor： Steven Consiglio , Cory Wajda , Kandabara Tapily , Takaaki Tsunomura , Takashi Ando , Paul C. Jamison , Eduard A. Cartier , Vijay Narayanan , Marinus J.P. Hopstaken
Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
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公开(公告)号：US09607888B2
公开(公告)日：2017-03-28
申请号：US14613086
申请日：2015-02-03
Applicant: Tokyo Electron Limited
Inventor： Kai-Hung Yu , Toshio Hasegawa , Tadahiro Ishizaka , Manabu Oie , Fumitaka Amano , Steven Consiglio , Cory Wajda , Kaoru Maekawa , Gert J. Leusink
IPC: H01L21/768 , H01L21/285 , H01L23/532 , C23C16/04 , C23C16/34
CPC classification number: H01L21/76846 , C23C16/045 , C23C16/34 , H01L21/28562 , H01L21/76877 , H01L23/53238 , H01L2924/0002 , H01L2924/00
Abstract: Methods for integration of atomic layer deposition (ALD) of barrier layers and chemical vapor deposition (CVD) of Ru liners for Cu filling of narrow recessed features for semiconductor devices are disclosed in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a conformal barrier layer by ALD in the recessed feature, where the barrier layer contains TaN or TaAlN, depositing a conformal Ru liner by CVD on the barrier layer, and filling the recessed feature with Cu metal.
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Patent Agency Ranking
公开(公告)号：US20230326764A1
公开(公告)日：2023-10-12
申请号：US18295656
申请日：2023-04-04
Applicant: Tokyo Electron Limited
Inventor： Robert D. Clark , Steven Consiglio
IPC: H01L21/324 , H01L21/02 , H01L21/3205 , H01L21/3213
CPC classification number: H01L21/3245 , H01L21/02175 , H01L21/32051 , H01L21/32136 , H01L21/32134
Abstract: A method of forming a device includes providing a substrate containing an exposed semiconductor region, forming a metal oxide film over the exposed semiconductor region, and forming an oxygen-scavenging metal film over the metal oxide film. The method includes chemically reducing the metal oxide film to an elemental metal film by scavenging oxygen from the metal oxide film into the oxygen-scavenging metal film; and reacting the elemental metal film with the semiconductor region to form a metal-semiconductor layer, the metal-semiconductor layer forming a source/drain contact region of a transistor.
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公开(公告)号：US20210234096A1
公开(公告)日：2021-07-29
申请号：US17226495
申请日：2021-04-09
Inventor： Steven Consiglio , Cory Wajda , Kandabara Tapily , Takaaki Tsunomura , Takashi Ando , Paul C. Jamison , Eduard A. Cartier , Vijay Narayanan , Marinus J.P. Hopstaken
Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
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公开(公告)号：US11700778B2
公开(公告)日：2023-07-11
申请号：US17226495
申请日：2021-04-09
Inventor： Steven Consiglio , Cory Wajda , Kandabara Tapily , Takaaki Tsunomura , Takashi Ando , Paul C. Jamison , Eduard A. Cartier , Vijay Narayanan , Marinus J. P. Hopstaken
CPC classification number: H10N70/023 , H10B63/00 , H10N70/8833
Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
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公开(公告)号：US10991881B2
公开(公告)日：2021-04-27
申请号：US16428554
申请日：2019-05-31
Inventor： Steven Consiglio , Cory Wajda , Kandabara Tapily , Takaaki Tsunomura , Takashi Ando , Paul C. Jamison , Eduard A. Cartier , Vijay Narayanan , Marinus J. P. Hopstaken
Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
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8.发明申请INTEGRATION OF ALD BARRIER LAYER AND CVD Ru LINER FOR VOID-FREE Cu FILLING 有权ALD阻挡层和CVD Ru衬里的无漏铜填充的整合公开(公告)号：US20150221550A1
公开(公告)日：2015-08-06
申请号：US14613086
申请日：2015-02-03
Applicant: Tokyo Electron Limited
Inventor： Kai-Hung Yu , Toshio Hasegawa , Tadahiro Ishizaka , Manabu Oie , Fumitaka Amano , Steven Consiglio , Cory Wajda , Kaoru Maekawa , Gert J. Leusink
IPC: H01L21/768
CPC classification number: H01L21/76846 , C23C16/045 , C23C16/34 , H01L21/28562 , H01L21/76877 , H01L23/53238 , H01L2924/0002 , H01L2924/00
Abstract: Methods for integration of atomic layer deposition (ALD) of barrier layers and chemical vapor deposition (CVD) of Ru liners for Cu filling of narrow recessed features for semiconductor devices are disclosed in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a conformal barrier layer by ALD in the recessed feature, where the barrier layer contains TaN or TaAlN, depositing a conformal Ru liner by CVD on the barrier layer, and filling the recessed feature with Cu metal.
Abstract translation: 在几个实施例中公开了用于整合用于半导体器件的窄凹陷特征的Cu填充的Ru衬垫的阻挡层的原子层沉积（ALD）和化学气相沉积（CVD）的方法。 根据一个实施方案，该方法包括提供含有凹陷特征的基底，在凹陷特征中通过ALD沉积共形阻挡层，其中阻挡层包含TaN或TaAlN，通过CVD在阻挡层上沉积共形Ru衬垫;以及 用Cu金属填充凹陷特征。
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