公开(公告)号：US5105090A

公开(公告)日：1992-04-14

申请号：US443278

申请日：1989-11-28

申请人： Toshiaki Miyajima ,  Shinji Toyoyama ,  Masayoshi Koba

发明人： Toshiaki Miyajima ,  Shinji Toyoyama ,  Masayoshi Koba

IPC分类号： H01L27/14 ,  H01L27/144 ,  H01L31/12 ,  H03K17/785

CPC分类号： H03K17/785 ,  H01L27/1443

摘要： A semiconductor device is disclosed which comprises a normally-off first MOSFET, a normally-off second MOSFET connected between the gate and source of the first MOSFET, a diode connected between the gate and source of the second MOSFET, a resistor and an optoelectric transducer array, both of which are connected in parallel with each other between the gate and drain of the second MOSFET, wherein all of the components are formed on a single semiconductor chip. Also disclosed is a semiconductor device comprising a normally-off first MOSFET, a normally-on second MOSFET connected between the gate and source of the first MOSFET, a first resistor and a diode, both of which are connected in series between the source and drain of the second MOSFET, a second resistor connected between the gate and source of the second MOSFET, an optoelectric transducer array connected between the gate of the second MOSFET and the terminal which is positioned between the first resistor and the diode, wherein all of the components are formed on a single semiconductor chip.

公开(公告)号：US5223446A

公开(公告)日：1993-06-29

申请号：US777668

申请日：1991-10-16

申请人： Toshiaki Miyajima ,  Shinji Toyoyama ,  Masayoshi Koba

发明人： Toshiaki Miyajima ,  Shinji Toyoyama ,  Masayoshi Koba

IPC分类号： H01L27/144 ,  H03K17/785

CPC分类号： H01L27/1443 ,  H03K17/785

摘要： A semiconductor device is disclosed which comprises a normally-off first MOSFET, a normally-off second MOSFET connected between the gate and source of the first MOSFET, a diode connected between the gate and source of the second MOSFET, a resistor and an optoelectric transducer array, both of which are connected in parallel with each other between the gate and drain of the second MOSFET, wherein all of the components are formed on a single semiconductor chip. Also disclosed is a semiconductor device comprising a normally-off first MOSFET, a normally-on second MOSFET connected between the gate and source of the first MOSFET, a first resistor and a diode, both of which are connected in series between the source and drain of the second MOSFET, a second resistor connected between the gate and source of the second MOSFET, an optoelectric transducer array connected between the gate of the second MOSFET and the terminal which is positioned between the first resistor and the diode, wherein all of the components are formed on a single semiconductor chip.Further disclosed is a method for manufacturing a semiconductor device comprising a normally-off first MOSFET, a normally-off second MOSFET connected between the gate and source of the first MOSFET, a diode connected between the gate and source of the second MOSFET, a resistor and an optoelectric transducer array, both of which are connected in parallel with each other between the gate and drain of the second MOSFET.

摘要翻译： 公开了一种半导体器件，其包括常闭第一MOSFET，连接在第一MOSFET的栅极和源极之间的常关的第二MOSFET，连接在第二MOSFET的栅极和源极之间的二极管，电阻器和光电换能器 阵列，它们都在第二MOSFET的栅极和漏极之间彼此并联连接，其中所有的部件形成在单个半导体芯片上。 还公开了一种半导体器件，包括常闭第一MOSFET，连接在第一MOSFET的栅极和源极之间的常数第二MOSFET，第一电阻器和二极管，两者均串联连接在源极和漏极 连接在第二MOSFET的栅极和源极之间的第二电阻器，连接在第二MOSFET的栅极和位于第一电阻器和二极管之间的端子之间的光电变换器阵列，其中所有部件 形成在单个半导体芯片上。 进一步公开的是一种制造半导体器件的方法，该半导体器件包括常闭第一MOSFET，连接在第一MOSFET的栅极和源极之间的常关的第二MOSFET，连接在第二MOSFET的栅极和源极之间的二极管， 以及光电转换器阵列，它们都在第二MOSFET的栅极和漏极之间彼此并联连接。

公开(公告)号：US5298485A

公开(公告)日：1994-03-29

申请号：US983290

申请日：1992-11-30

申请人： Shoei Kataoka ,  Hiroya Sato ,  Shuhei Tsuchimoto ,  Hideo Nojima ,  Shinji Toyoyama ,  Masayoshi Koba ,  Nobuo Hashizume ,  Eizo Ohno ,  Susumu Saitoh

发明人： Shoei Kataoka ,  Hiroya Sato ,  Shuhei Tsuchimoto ,  Hideo Nojima ,  Shinji Toyoyama ,  Masayoshi Koba ,  Nobuo Hashizume ,  Eizo Ohno ,  Susumu Saitoh

IPC分类号： H01L39/18 ,  H03K19/195 ,  H03K17/92

CPC分类号： H01L39/18 ,  Y10S505/858 ,  Y10S505/86

摘要： A logic circuit device includes a superconductive body formed of a ceramic superconductive material. The ceramic superconductive material has random grain boundaries which act as weak couplings. The ceramic superconductive material also has a magneto-resistive property. There is at least one conductor arranged near the ceramic superconductive body in order to exert a magnetic field on the ceramic superconductive body. The ceramic superconductive body changes its resistance in response to the magnetic field generated by the conductor. The ceramic superconductive body can be used as part of a logic circuit.

摘要翻译： 逻辑电路器件包括由陶瓷超导材料形成的超导体。 陶瓷超导材料具有作为弱耦合的随机晶界。 陶瓷超导材料也具有磁阻特性。 至少有一个布置在陶瓷超导体附近的导体，以便在陶瓷超导体上施加磁场。 陶瓷超导体响应于导体产生的磁场而改变其电阻。 陶瓷超导体可以用作逻辑电路的一部分。

公开(公告)号：US4801351A

公开(公告)日：1989-01-31

申请号：US943428

申请日：1986-12-19

申请人： Katunobu Awane ,  Masayoshi Koba ,  Toshiaki Miyajima ,  Masashi Maekawa

发明人： Katunobu Awane ,  Masayoshi Koba ,  Toshiaki Miyajima ,  Masashi Maekawa

IPC分类号： C30B29/66 ,  H01L21/20 ,  C30B1/08

CPC分类号： H01L21/2026 ,  Y10S117/902 ,  Y10S117/904

摘要： Improvements in a method for performing a monocrystallizing operation through the application of energy beams upon a non-monocrystalline thin-film of non-crystalline or polycrystalline material formed on a non-crystalline insulating film. The resulting superior monocrystalline thin-film has a crystal direction coinciding with that of the monocrystalline silicon base-plate and is formed on the insulating film even if the insulating film is as thick as 4 .mu.m. The thin-film is sufficiently covered between the active layers of a three-dimensional circuit element on the monocrystalline silicon base plate. '

摘要翻译： 通过在非晶体绝缘膜上形成非晶或多晶材料的非单晶薄膜上施加能量束来进行单晶化操作的方法的改进。 所得到的优异的单晶薄膜的晶体方向与单晶硅基板的晶体方向一致，即使绝缘膜厚度达到4μm，也形成在绝缘膜上。 薄膜充分覆盖在单晶硅基板上的三维电路元件的有源层之间。

公开(公告)号：US5144395A

公开(公告)日：1992-09-01

申请号：US672764

申请日：1991-03-19

申请人： Toshiaki Miyajima ,  Kazumasa Kioi ,  Mituo Matunami ,  Tukasa Doi ,  Minoru Yoshioka ,  Masayoshi Koba

发明人： Toshiaki Miyajima ,  Kazumasa Kioi ,  Mituo Matunami ,  Tukasa Doi ,  Minoru Yoshioka ,  Masayoshi Koba

IPC分类号： H01L27/142 ,  H01L27/144

CPC分类号： H01L27/142 ,  H01L27/1443 ,  Y02E10/50

摘要： An optically driven semiconductor device is disclosed which comprises a semiconductor substrate, a plurality of vertical field effect transistors formed on the substrate, and a plurality of optoelectric transducers formed on an insulating film above the respective transistors, wherein the transistors have the substrate in common as a drain. Also disclosed is an optically driven semiconductor device which comprises a semiconductor substrate, a vertical field effect transistor formed on the substrate and a solar cell formed on an insulating film above the substrate, wherein the solar cell is formed with a polycrystalline silicon layer or monocrystalline silicon layer grown by the chemical vapor deposition method. Moreover, there are disclosed optically coupled semiconductor relay devices using these optically driven semiconductor devices.

摘要翻译： 公开了一种光驱动的半导体器件，其包括半导体衬底，形成在衬底上的多个垂直场效应晶体管和形成在各个晶体管上方的绝缘膜上的多个光电换能器，其中晶体管的基板共同为 排水 还公开了一种光驱动的半导体器件，其包括半导体衬底，形成在衬底上的垂直场效应晶体管和形成在衬底上的绝缘膜上的太阳能电池，其中太阳能电池形成有多晶硅层或单晶硅 通过化学气相沉积法生长的层。 此外，公开了使用这些光驱动半导体器件的光耦合半导体继电器装置。

公开(公告)号：US5998819A

公开(公告)日：1999-12-07

申请号：US132896

申请日：1998-08-12

申请人： Seiichi Yokoyama ,  Yasuyuki Ito ,  Maho Ushikubo ,  Masayoshi Koba

发明人： Seiichi Yokoyama ,  Yasuyuki Ito ,  Maho Ushikubo ,  Masayoshi Koba

IPC分类号： H01L21/8247 ,  H01L21/02 ,  H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H01L29/72

CPC分类号： H01L27/11502 ,  H01L21/28291 ,  H01L21/31691 ,  H01L27/11507 ,  H01L28/56 ,  H01L29/78391

摘要： A thin ferroelectric film element comprises upper and lower thin electrode films and a thin ferroelectric film formed on a substrate, wherein the thin ferroelectric film comprises at least three layers in which at least one layer has a composition of constituent elements different from those of the other layers and a resistivity higher than that of the other layers, and at least two layers of the others are the same composition of constituent element.

摘要翻译： 薄铁电薄膜元件包括上和下薄电极薄膜和形成在基底上的薄铁电薄膜，其中薄铁电薄膜包括至少三层，其中至少一层具有不同于其它层的构成元素组成 层和电阻率高于其它层的电阻率，并且其它层的至少两层是组成元素的相同组成。

公开(公告)号：US5262026A

公开(公告)日：1993-11-16

申请号：US908922

申请日：1992-07-02

申请人： Hideo Nojima ,  Masayoshi Koba ,  Masaya Nagata ,  Hidetaka Shintaku

发明人： Hideo Nojima ,  Masayoshi Koba ,  Masaya Nagata ,  Hidetaka Shintaku

IPC分类号： H01L39/14 ,  H01L39/24 ,  C25D13/02 ,  B05D5/12

CPC分类号： H01L39/2429 ,  H01L39/143 ,  Y10S505/741

摘要： In a method for manufacturing a device having a film of high temperature superconductor, a copper substrate is used in the electrophoretic deposition as a cathode on which fine powders of superconductor should be deposited, and the fine powders deposited on the substrate are fired in the conditions that they are sintered partially.In other methods for manufacturing such a device, a desired minute pattern of electrically conductive material as a cathode in the electrophoretic deposition is formed on a substrate, and a minute pattern of fine powders is deposited according to the pattern of the cathode. Then, the fine powders are fired to form a superconductor film. Such a desired pattern of the cathode is formed by the patterning of a film of an electrically insulating substrate. Such a desired pattern of the cathode is also formed by the patterning of an electrically insulating material, applied to an electrically conductive substrate.In a further method for manufacturing such a device, a desired minute pattern of electrically conductive material as a cathode in the electrophoretic deposition is formed on a substrate, while another pattern of electrically conductive material as an anode is formed on the same substrate near the former pattern so as to keep a constant distance. The fine powders deposited on the former pattern are fired to form a superconductor film.

摘要翻译： 在制造具有高温超导体膜的器件的方法中，在电泳沉积中使用铜衬底作为阴极，在其上沉积超导体的细粉末，并且沉积在衬底上的细粉末在条件下烧制 它们被部分烧结。 在制造这种器件的其它方法中，在基片上形成电泳沉积中作为阴极的导电材料的期望微小图案，并根据阴极的图案沉积细微粉末的微小图案。 然后，烧制细粉以形成超导膜。 通过图案化电绝缘基板的膜来形成阴极的这种期望的图案。 阴极的这种期望图案也通过施加到导电基底上的电绝缘材料的图案形成。 在制造这种器件的另一种方法中，在基片上形成作为电泳沉积中阴极的导电材料的期望的微小图案，而作为阳极的导电材料的另一图案形成在靠近前者的同一衬底上 模式，以保持恒定的距离。 将沉积在前一图案上的细粉末烧制以形成超导薄膜。

公开(公告)号：US5254945A

公开(公告)日：1993-10-19

申请号：US773765

申请日：1991-10-10

申请人： Hideo Nojima ,  Hidetaka Shintaku ,  Masayoshi Koba

发明人： Hideo Nojima ,  Hidetaka Shintaku ,  Masayoshi Koba

IPC分类号： G01R33/035 ,  G01R33/06

CPC分类号： G01R33/0352 ,  Y10S505/701 ,  Y10S505/702 ,  Y10S505/845

摘要： A method for sensing an applied magnetic field uses a superconductor element with superconductive material as a sensor. The element is cooled to its superconducting state and current is supplied to the element. An applied magnetic field is applied to the superconducting material and an output from the superconductor element is fed to a feed back power source. In the feedback power source a comparison is made between an input voltage from the superconductive element and a reference voltage. Current is applied to a coil for applying a bias magnetic field to the superconductor element based on the comparison. With this method, the input voltage and the reference voltage are made as equal as possible. A superconductive device includes a coil for applying an AC power source and a coil for applying a DC power source. The DC power source can be set at various values and the application of the DC power source, which is a bias voltage, changes the output of the superconductive element by changing the electrical wave form outputted from the superconductive element.

摘要翻译： 用于感测所施加的磁场的方法使用具有超导材料的超导体元件作为传感器。 元件被冷却到其超导状态，并且电流被供应到元件。 对超导材料施加施加的磁场，并且将来自超导体元件的输出馈送到反馈电源。 在反馈电源中，比较来自超导元件的输入电压和参考电压。 基于比较，将电流施加到用于向超导体元件施加偏置磁场的线圈。 使用该方法，使输入电压和参考电压尽可能相等。 超导装置包括用于施加AC电源的线圈和用于施加DC电源的线圈。 直流电源可以设定为各种值，并且作为偏置电压的直流电源的应用通过改变从超导元件输出的电波形来改变超导元件的输出。

公开(公告)号：US5194808A

公开(公告)日：1993-03-16

申请号：US703671

申请日：1991-05-21

申请人： Hidetaka Shintaku ,  Masayoshi Koba

发明人： Hidetaka Shintaku ,  Masayoshi Koba

IPC分类号： G01R33/035 ,  G01R33/09 ,  H01L39/00 ,  H01L39/22

CPC分类号： G01R33/0352 ,  Y10S505/845

摘要： The superconductor magneto-resistive element 14 is installed in a center portion surrounded by two coils 15 and 16 which generate A.C. and D.C. bias magnetic fields respectively. The coils 15 and 16 are respectively connected to A.C. and D.C. power sources for applying A.C. and D.C. bias magnetic field to the element 14.With the output signal of the element 14, the fundamental component having the frequency component same as that of the A.C. bias magnetic field and the quadratic harmonic component having the frequency component twice as that of the fundamental component are calculated using the Fourier transform. The calculated value of the fundamental component is divided by the value of the quadratic harmonic component, thereby removing the change of the output signal of the element 14 due to the fluctuation inherent in the element 14, enabling to measure an external magnetic field with high accuracy.

公开(公告)号：US5016065A

公开(公告)日：1991-05-14

申请号：US430268

申请日：1989-11-02

申请人： Akinori Seki ,  Fumihiro Knoushi ,  Jun Kudo ,  Masayoshi Koba

发明人： Akinori Seki ,  Fumihiro Knoushi ,  Jun Kudo ,  Masayoshi Koba

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/338 ,  H01L29/812 ,  H01L31/04 ,  H01L31/10 ,  H01L33/30 ,  H01L33/34 ,  H01S5/00

CPC分类号： H01L21/02543 ,  H01L21/02381 ,  H01L21/02461 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/02546 ,  H01L21/0262

摘要： Disclosed is a compound semiconductor substrate having a III-V group compound semiconductor layer on a IV group substrate, which has substantially no residual stress and few crystalline defects. The substrate is formed from (a) a IV group substrate, (b) a first III-V group compound semiconductor layer formed on the substrate, (c) a second compound semiconductor layer having such a lattice constant as to produce a stress in a direction opposite to the stress which occurs during the time of forming said first semiconductor layer due to a difference of thermal expansion coefficient between said substrate and said first semiconductor layer, formed on said first semiconductor layer, and (d) a third III-IV group compound semiconductor layer similar to the first semiconductor layer, formed on said second semiconductor layer.