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1.发明申请SEMICONDUCTOR INTEGRATED CIRCUIT, SEMICONDUCTOR DEVICE, AND METHOD OF DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开半导体集成电路，半导体器件和设计半导体集成电路的方法公开(公告)号：US20130222019A1
公开(公告)日：2013-08-29
申请号：US13596252
申请日：2012-08-28
CPC分类号： G06F17/5068 , G06F2217/78
摘要： An semiconductor integrated circuit has a macro cell, an initial voltage setting unit to generate initial data to be set in the macro cell, and a data wiring section connected between the macro cell and the initial voltage setting unit so that the data wiring section is at a predetermined potential level.
摘要翻译： 半导体集成电路具有宏单元，初始电压设定单元，用于生成宏单元中要设置的初始数据;以及数据布线单元，连接在宏单元和初始电压设定单元之间，使得数据布线部分处于 预定电位。
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公开(公告)号：US08170500B2
公开(公告)日：2012-05-01
申请号：US12500020
申请日：2009-07-09
IPC分类号： H04B1/44
CPC分类号： H03K17/693 , H03K2217/0036 , H03K2217/0054 , H04B1/005 , H04B1/48
摘要： A radio-frequency switch circuit of the invention includes: n-stage through FETs (field effect transistors) connected in series between the antenna terminal and each of the radio-frequency terminals, where n is a natural number; a radio-frequency leakage prevention resistor connected to a gate of the through FETs; a control signal line commonly connected to the gates of the n-stage through FETs connected to the same radio-frequency terminal; and a resistor connected to each of at least two of the control signal lines and connected to the radio-frequency leakage prevention resistor in series The two control signal lines are capacitively coupled between the resistor and the through FETs.
摘要翻译： 本发明的射频开关电路包括：天线端子和每个射频端子串联连接的n级通过FET（场效应晶体管），其中n是自然数; 连接到通过FET的栅极的射频防漏电阻器; 通常连接到连接到同一射频终端的n级通过FET的栅极的控制信号线; 和连接到至少两个控制信号线中的每一个并连接到串联的射频防漏电阻器的电阻器。两个控制信号线电容耦合在电阻器和通过FET之间。
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公开(公告)号：US20120182061A1
公开(公告)日：2012-07-19
申请号：US13432610
申请日：2012-03-28
IPC分类号： H03K17/687
CPC分类号： H03K17/693 , H03K2217/0036 , H03K2217/0054 , H04B1/005 , H04B1/48
摘要： A radio-frequency switch circuit of the invention includes: n-stage through FETs (field effect transistors) connected in series between the antenna terminal and each of the radio-frequency terminals, where n is a natural number; a radio-frequency leakage prevention resistor connected to a gate of the through FETs; a control signal line commonly connected to the gates of the n-stage through FETs connected to the same radio-frequency terminal; and a resistor connected to each of at least two of the control signal lines and connected to the radio-frequency leakage prevention resistor in series The two control signal lines are capacitively coupled between the resistor and the through FETs.
摘要翻译： 本发明的射频开关电路包括：天线端子和每个射频端子串联连接的n级通过FET（场效应晶体管），其中n是自然数; 连接到通过FET的栅极的射频防漏电阻器; 通常连接到连接到同一射频终端的n级通过FET的栅极的控制信号线; 和连接到至少两个控制信号线中的每一个并连接到串联的射频防漏电阻器的电阻器。两个控制信号线电容耦合在电阻器和通过FET之间。
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公开(公告)号：US20120038411A1
公开(公告)日：2012-02-16
申请号：US13046937
申请日：2011-03-14
申请人： Masayuki Sugiura , Noriyasu Kurihara , Toshiki Seshita , Hirotsugu Wakimoto , Yoshitomo Sagae , Toshiyuki Shimizu , Yoshio Itagaki , Masanori Ochi
发明人： Masayuki Sugiura , Noriyasu Kurihara , Toshiki Seshita , Hirotsugu Wakimoto , Yoshitomo Sagae , Toshiyuki Shimizu , Yoshio Itagaki , Masanori Ochi
IPC分类号： H03K17/56 , H03K17/687
CPC分类号： H03K17/6874 , H01L23/66 , H01L24/05 , H01L24/13 , H01L24/16 , H01L2223/6627 , H01L2224/0401 , H01L2224/05554 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/13144 , H01L2224/16157 , H01L2224/16165 , H01L2924/13091 , H01L2924/14 , H01L2924/142 , H01L2924/00
摘要： According to one embodiment, a high-frequency switch includes a high-frequency switch IC chip. The high-frequency switch IC chip has a high-frequency switching circuit section including an input terminal, a plurality of switching elements, a plurality of high-frequency signal lines, and a plurality of output terminals. The input terminal is connected to each of the plurality of output terminals via each of the plurality of switching elements with the high-frequency signal lines having the same lengths. The plurality of output terminals are arranged on a surface at an outer periphery of the high-frequency switch IC chip. The input terminal is arranged on the surface of the high-frequency switch IC chip at the center of the high-frequency switch IC circuit section.
摘要翻译： 根据一个实施例，高频开关包括高频开关IC芯片。 高频开关IC芯片具有包括输入端子，多个开关元件，多个高频信号线以及多个输出端子的高频开关电路部。 输入端子经由多个开关元件中的每一个连接到多个输出端子中的每一个，高频信号线具有相同的长度。 多个输出端子布置在高频开关IC芯片的外周的表面上。 输入端子布置在高频开关IC电路部分中心的高频开关IC芯片的表面上。
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公开(公告)号：US08698574B2
公开(公告)日：2014-04-15
申请号：US13046937
申请日：2011-03-14
申请人： Masayuki Sugiura , Noriyasu Kurihara , Toshiki Seshita , Hirotsugu Wakimoto , Yoshitomo Sagae , Toshiyuki Shimizu , Yoshio Itagaki , Masanori Ochi
发明人： Masayuki Sugiura , Noriyasu Kurihara , Toshiki Seshita , Hirotsugu Wakimoto , Yoshitomo Sagae , Toshiyuki Shimizu , Yoshio Itagaki , Masanori Ochi
CPC分类号： H03K17/6874 , H01L23/66 , H01L24/05 , H01L24/13 , H01L24/16 , H01L2223/6627 , H01L2224/0401 , H01L2224/05554 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/13144 , H01L2224/16157 , H01L2224/16165 , H01L2924/13091 , H01L2924/14 , H01L2924/142 , H01L2924/00
摘要： According to one embodiment, a high-frequency switch includes a high-frequency switch IC chip. The high-frequency switch IC chip has a high-frequency switching circuit section including an input terminal, a plurality of switching elements, a plurality of high-frequency signal lines, and a plurality of output terminals. The input terminal is connected to each of the plurality of output terminals via each of the plurality of switching elements with the high-frequency signal lines having the same lengths. The plurality of output terminals are arranged on a surface at an outer periphery of the high-frequency switch IC chip. The input terminal is arranged on the surface of the high-frequency switch IC chip at the center of the high-frequency switch IC circuit section.
摘要翻译： 根据一个实施例，高频开关包括高频开关IC芯片。 高频开关IC芯片具有包括输入端子，多个开关元件，多个高频信号线以及多个输出端子的高频开关电路部。 输入端子经由多个开关元件中的每一个连接到多个输出端子中的每一个，高频信号线具有相同的长度。 多个输出端子布置在高频开关IC芯片的外周的表面上。 输入端子布置在高频开关IC电路部分中心的高频开关IC芯片的表面上。
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公开(公告)号：US08320843B2
公开(公告)日：2012-11-27
申请号：US13432610
申请日：2012-03-28
IPC分类号： H04B1/44
CPC分类号： H03K17/693 , H03K2217/0036 , H03K2217/0054 , H04B1/005 , H04B1/48
摘要： A radio-frequency switch circuit of the invention includes: n-stage through FETs (field effect transistors) connected in series between the antenna terminal and each of the radio-frequency terminals, where n is a natural number; a radio-frequency leakage prevention resistor connected to a gate of the through FETs; a control signal line commonly connected to the gates of the n-stage through FETs connected to the same radio-frequency terminal; and a resistor connected to each of at least two of the control signal lines and connected to the radio-frequency leakage prevention resistor in series The two control signal lines are capacitively coupled between the resistor and the through FETs.
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公开(公告)号：US20100073066A1
公开(公告)日：2010-03-25
申请号：US12500020
申请日：2009-07-09
IPC分类号： H03K17/687
CPC分类号： H03K17/693 , H03K2217/0036 , H03K2217/0054 , H04B1/005 , H04B1/48
摘要： A radio-frequency switch circuit of the invention includes: n-stage through FETs (field effect transistors) connected in series between the antenna terminal and each of the radio-frequency terminals, where n is a natural number; a radio-frequency leakage prevention resistor connected to a gate of the through FETs; a control signal line commonly connected to the gates of the n-stage through FETs connected to the same radio-frequency terminal; and a resistor connected to each of at least two of the control signal lines and connected to the radio-frequency leakage prevention resistor in series The two control signal lines are capacitively coupled between the resistor and the through FETs.
摘要翻译： 本发明的射频开关电路包括：天线端子和每个射频端子串联连接的n级通过FET（场效应晶体管），其中n是自然数; 连接到通过FET的栅极的射频防漏电阻器; 通常连接到连接到同一射频终端的n级通过FET的栅极的控制信号线; 和连接到至少两个控制信号线中的每一个并连接到串联的射频防漏电阻器的电阻器。两个控制信号线电容耦合在电阻器和通过FET之间。
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公开(公告)号：US5128940A
公开(公告)日：1992-07-07
申请号：US580870
申请日：1990-09-11
申请人： Hirotsugu Wakimoto
发明人： Hirotsugu Wakimoto
CPC分类号： H04J3/047
摘要： A demultiplexer has a main circuit section obtained by connecting a plurality of 1:2 demultiplexers, each for distributing a time-divisionally multiplexed signal into tow parts, to form a tree-like arrangement, and a clock frequency divider for frequency-dividing an input clock signal to generate frequency-divided signals to be supplied to the 1:2 demultiplexers of the respective stages of the tree-like arrangement. The demultiplexer has a plurality of inverting circuits for arbitrarily inverting the frequency-divided clock signals supplied from the clock frequency divider to the respective stages of the main circuit section in units of stages.
摘要翻译： 解复用器具有通过连接多个1：2解复用器获得的主电路部分，每个解复用器用于将时分复用的信号分配成两部分，以形成树状布置;以及时钟分频器，用于对输入进行分频 产生分频信号以提供给树形布置的各个级的1：2解复用器。 解复用器具有多个反相电路，用于以分段为单位将从时钟分频器提供的分频时钟信号随意地反相到主电路部分的各个级。
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9.发明授权
公开(公告)号：US6134424A
公开(公告)日：2000-10-17
申请号：US943160
申请日：1997-10-03
申请人： Kazuya Nishihori , Yoshiaki Kitaura , Mayumi Morizuka , Atsushi Kameyama , Masami Nagaoka , Hirotsugu Wakimoto , Tadahiro Sasaki
发明人： Kazuya Nishihori , Yoshiaki Kitaura , Mayumi Morizuka , Atsushi Kameyama , Masami Nagaoka , Hirotsugu Wakimoto , Tadahiro Sasaki
IPC分类号： H03F3/60 , H01L29/08 , H01Q1/24 , H01Q11/12 , H01Q23/00 , H03F1/30 , H03F3/193 , H04B1/04 , H04B7/26 , H01L31/112
CPC分类号： H03F1/306 , H01L29/0891 , H01Q1/242 , H01Q11/12 , H01Q23/00 , H03F3/1935 , H03F2200/294 , H03F2200/372
摘要： A MESFET of a GaAs semiconductor device having a p-pocket LDD structure is used for a high-frequency power amplifier of a mobile communication device, in order to decrease current consumption and to increase the continuous operating time of a battery. The high-frequency power amplifier is provided with a gate-bias adjusting feedback element between the drain and gate of the MESFET. Thus, even if there is a great difference between the filled and terminated potentials of the discharge voltage of the battery for supplying electric power to the amplifier, electric power can be supplied near the terminated potential for a long time, so that the mobile communication device can be continuously used for a long time.
摘要翻译： 具有p口LDD结构的GaAs半导体器件的MESFET用于移动通信设备的高频功率放大器，以便降低电流消耗并增加电池的连续工作时间。 高频功率放大器在MESFET的漏极和栅极之间设有栅极偏置调整反馈元件。 因此，即使在向放大器供电的电池的放电电压的充满电位和终止电位之间存在很大差异的情况下，也可以在终止电位附近长时间地供给电力，使得移动通信装置 可以连续使用很长时间。
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10.发明授权High-speed signal transmission line path structure for semiconductor integrated circuit devices 失效半导体集成电路器件的高速信号传输线路结构
公开(公告)号：US5185650A
公开(公告)日：1993-02-09
申请号：US860272
申请日：1992-04-01
IPC分类号： H01L23/522
CPC分类号： H01L23/5225 , H01L23/5222 , H01L2924/0002 , H01L2924/3011
摘要： A high-speed semiconductor integrated circuit device has a main circuit section formed on a substrate, and a capacitance section formed on the substrate to surround the main circuit section. The capacitance section is made up of two conductive layers, an upper layer being insulatively disposed above a lower layer. These layers are applied with a power source voltage and a ground voltage, respectively. High-speed signal lines insulatively traverse the capacitance section and are connected to the main circuit section. The capacitance section is disconnected in the region where each signal transmission line passes, and defines a micro-strip type signal transmission line path structure. A "ladder"-shaped connection pattern is provided at each disconnected portion of the capacitance section, for electrically connecting a conductive layer arranged on one side of the disconnected portion to the corresponding layer arranged on the other side of the disconnected portion. The ladder-shaped connection pattern includes first and second parallel connection portions which extend at right angles to their corresponding signal transmission line. The impedance of the signal transmission line can be controlled by altering the horizontal pattern of the connection portions.
摘要翻译： 高速半导体集成电路器件具有形成在基板上的主电路部分和形成在基板上以围绕主电路部分的电容部分。 电容部由两层导电层构成，上层被绝对地设置在下层的上方。 这些层分别被施加有电源电压和接地电压。 高速信号线绝缘穿过电容部分并连接到主电路部分。 在每个信号传输线通过的区域中电容部分断开，并且限定了微带型信号传输线路径结构。 在电容部分的每个断开部分处提供“梯形”形连接图案，用于将布置在断开部分的一侧上的导电层电连接到布置在断开部分的另一侧上的相应层。 梯形连接图案包括与其对应的信号传输线成直角延伸的第一和第二平行连接部分。 可以通过改变连接部分的水平图案来控制信号传输线的阻抗。
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