Key telephone system
    1.
    发明授权
    Key telephone system 失效
    关键电话系统

    公开(公告)号:US5025441A

    公开(公告)日:1991-06-18

    申请号:US291442

    申请日:1988-12-28

    IPC分类号: H04M9/00

    CPC分类号: H04M9/008

    摘要: A key telephone system for use in PCM telecommunications includes an office line communication units, an extension interface unit, a receiving unit, an extension communication unit, and an information transmitting and receiving unit. The system further includes a timing setting unit for setting the timings for transmitting and receiving information from and to each of the office line communication unit, the extension interface unit, the receiving unit, the extension communication unit, and the information transmitting and receiving unit in which downstream information, which is applied from the extension interface unit to a plurality of terminal units, contains a start bit, bits expressive of data information, and bits expressive of parity information in each of a plurality of frames, contains bits expressive of control information in at least one of the frames, and contains frame-synchronization information for achieving the synchronization of frames in at least one of the frames, and upstream information, which is applied from the terminal units to the receiving unit, contains the bits expressive of the data information, the bits expressive of the parity information, and the bits expressive of the control information, and one of the downstream and upstream information is sent in the former half of each of the frames, and the other thereof is sent in the latter half thereof.

    摘要翻译: 用于PCM电信的密钥电话系统包括办公室通信单元,扩展接口单元,接收单元,扩展通信单元和信息发送和接收单元。 该系统还包括一个定时设置单元,用于设置从每个办公室通信单元,扩展接口单元,接收单元,扩展通信单元和信息发送和接收单元中的每一个发送和接收信息的定时 从扩展接口单元向多个终端单元应用的下行信息包含开始位,表示数据信息的比特和表示每个多个帧中的奇偶校验信息的比特,包含表示控制信息的比特 在至少一个帧中,并且包含用于实现至少一个帧中的帧的同步的帧同步信息和从终端单元应用于接收单元的上行信息包含表示第 数据信息,表示奇偶校验信息的比特以及表示控制信息的比特 并且在每个帧的前半部分中发送下游和上游信息中的一个,另一个在其后半部分中发送。

    Data circuit-terminating equipment
    2.
    发明授权
    Data circuit-terminating equipment 失效
    数据电路终端设备

    公开(公告)号:US4815099A

    公开(公告)日:1989-03-21

    申请号:US200112

    申请日:1988-05-27

    IPC分类号: H04L5/24 H04J3/22

    CPC分类号: H04L5/24

    摘要: There is disclosed a data circuit-terminating equipment (DCE) which connects an asynchronous data terminal equipment (DTE) with a PCM trnsmission line having various speeds. Further the DCE can satisfy recomendations of the V25 bis of CCITT. The DCE includes a PLL obtaining a clock from the line, a timing generator generating timings for circuits, a mapping circuit mapping to make data from the DTE match into the line speed, a sending register converting transmission speed of the mapping circuit output to send to the line at the instructed period, a receiving register receiving data from the line to deliver data with the required speed during the required period for the DTE, and a demapping circuit receiving the receiving register output to demap and send to the DTE. In the DCE satisfying the recommendations, the demapping circuit ANDs a clear-to-send signal and bits indicating the synchronized state to send the clear-to-send signal, and a short line shorting the clear-to-send signal and a carrier detect signal is employed.

    摘要翻译: 公开了一种将异步数据终端设备(DTE)与具有各种速度的PCM保护线路连接的数据电路终端设备(DCE)。 此外,DCE可以满足CCITT的V25 bis的推荐。 DCE包括从线路获得时钟的PLL,产生电路定时的定时发生器,映射电路映射以使数据从DTE匹配到线速度;发送寄存器,将映射电路输出的传输速度转换为发送到 在指令期间的线路,接收寄存器,在DTE的所需期间内接收来自该线路的数据以提供所需速度的数据;以及解映射电路,接收接收寄存器输出以解映射并发送给DTE。 在满足该建议的DCE中,解映射电路对清除发送信号和指示同步状态的比特发送清除发送信号,以及短路将清除发送信号和载波检测 信号被采用。

    Data circuit-terminating equipment
    3.
    发明授权
    Data circuit-terminating equipment 失效
    数据电路终端设备

    公开(公告)号:US4905258A

    公开(公告)日:1990-02-27

    申请号:US229558

    申请日:1988-08-08

    IPC分类号: H04J3/00 H04L12/52 H04L25/05

    CPC分类号: H04L12/52 H04L25/05

    摘要: There is disclosed a data circuit-terminating equipment (DCE) which connects a start-stop synchronous data terminal equipment (DTE) which is not synchronized with a PCM transmission line having various speeds. Further the DCE can satisfy recommendations of the V25 bis of CCITT. The DCE includes a start-stop synchronizing circuit to deliver a sampled request-to-send signal RS, a sampled send data and to transmit a clear-to-send signal CS to the DTE, a PLL obtaining a clock from the line, a timing generator generating timings for circuits, a mapping circuit mapping to make the sampled send data match into the line speed, a sending register converting transmission speed of the mapping circuit output to send to the line at the instructed period, a receiving register receiving data from the line to deliver data with the required speed during the required period for the DTE, and a demapping circuit receiving the receiving register output to demap and send to the DTE. In the DCE satisfying the recommendations, the demapping circuit ANDs a clear-to-send signal and bits indicating the synchronized state to send the clear-to-send signal, and a short line shorting the clear-to-send signal and a carrier detect signal is employed.

    摘要翻译: 公开了一种数据电路终端设备(DCE),其连接与不同速度的PCM传输线路不同步的起始停止同步数据终端设备(DTE)。 此外,DCE可以满足CCITT V25之二的建议。 DCE包括一个启动 - 停止同步电路,用于传递采样的发送请求信号RS,采样的发送数据,并向DTE发送清除发送信号CS;从该线路获取时钟的PLL, 定时发生器产生电路定时,映射电路映射以使采样的发送数据匹配到线路速度;发送寄存器,转换映射电路输出的传输速度以在指令的时间段发送到线路;接收寄存器, 在DTE所需时间内以所需速度传送数据的线路,以及接收接收寄存器输出的解映射电路,以解映射并发送给DTE。 在满足该建议的DCE中,解映射电路对清除发送信号和指示同步状态的比特发送清除发送信号,以及短路将清除发送信号和载波检测 信号被采用。

    Data transmission circuit
    4.
    发明授权
    Data transmission circuit 失效
    数据传输电路

    公开(公告)号:US4694470A

    公开(公告)日:1987-09-15

    申请号:US796554

    申请日:1985-11-08

    摘要: A data transmission circuit is disclosed which is arranged so that when transmitting data and control signals of a terminal equipment accommodated in a transmission line of 64 Kbps channels through use of a multi-frame arrangement, the data is assigned to a required number of bits in a predetermined number of frames in the multi-frame or adjacent ones of the predetermined number of bits and at least one synchronization flag bit and various control signals are assigned to the remaining bits but a request to send signal and the synchronization being assigned to one of the remaining bits according to the logic OR of their succeeding sampled values, whereby data of different transmission speeds can be transmitted by the same circuit.

    摘要翻译: 公开了一种数据传输电路,其被布置为使得通过使用多帧布置来传输容纳在64Kbps信道的传输线中的终端设备的数据和控制信号时,将数据分配给所需的位数 预定数量的位的多帧或相邻的帧中的预定数量的帧以及至少一个同步标志位和各种控制信号被分配给剩余的位,但是发送信号和同步的请求被分配给 根据其后续采样值的逻辑或其余位,由此可以通过同一电路传输不同传输速度的数据。

    Synchronizing system in digital communication line
    5.
    发明授权
    Synchronizing system in digital communication line 失效
    数字通信线路同步系统

    公开(公告)号:US5228035A

    公开(公告)日:1993-07-13

    申请号:US784588

    申请日:1991-10-29

    摘要: A synchronizing system in a digital communication line comprises a plurality of local switches for storing at least one digital line and monitoring a first piece of busy information when a clock source is already present, the local switches, if a first new clock source occurs while the first busy information is indicating no busy state, being capable of transmitting a master right request to turn the busy information to the busy state and to specify the first new clock source as a master clock and, on receiving a master right specification with respect to the master right request, being capable of outputting the first new clock source as the master clock; and a master switch connected to the plurality local switches in a star manner, by a link transmission line for transmitting control information including the master clock, master right request and master right specification, for monitoring a second piece of busy information indicating a busy state, the master switch, if a second new clock source occurs while the second busy information is indicating no busy state, being capable of transmitting the second new clock source as a master clock and, if the second new clock source competes with the first new clock source in the local switches that has output the master right request, being capable of arbitrating the competition between the first and second new clock sources and selecting one of the clock sources to turn the busy information to the busy state and, if the first clock source is selected, outputting the master right specification to the local switches that have transmitted the master right request.

    摘要翻译: 数字通信线路中的同步系统包括多个本地交换机,用于存储至少一个数字线路,并且当时钟源已经存在时监视第一条忙信息,本地交换机如果在第一新时钟源发生时 首先忙信息指示不处于忙状态,能够发送主请求以将忙信息转换到忙状态,并且将第一新时钟源指定为主时钟,并且在接收到关于第 能够将第一个新时钟源作为主时钟输出; 以及以星形方式连接到多个本地交换机的主交换机,通过用于发送包括主时钟,主权限请求和主权限规定的控制信息的链路传输线,用于监视指示忙碌状态的第二忙碌信息, 主开关,如果在第二忙信息指示无忙状态时发生第二新时钟源,则能够将第二新时钟源作为主时钟发送,并且如果第二新时钟源与第一新时钟源竞争 在输出主权请求的本地交换机中,能够对第一和第二新时钟源之间的竞争进行仲裁,并选择其中一个时钟源将繁忙信息转为忙状态,如果第一个时钟源为 选择,将主权限规范输出到已发送主权请求的本地交换机。

    Digital synchronizing circuit
    6.
    发明授权
    Digital synchronizing circuit 失效
    数字同步电路

    公开(公告)号:US4759040A

    公开(公告)日:1988-07-19

    申请号:US945858

    申请日:1986-12-23

    摘要: CMI code has many features, but the interference on a transmission line resulted from radiant noise is an unavoidable problem. In the invention, WALSH 1 code is employed to solve the problem. Clock pulses having a frequency twice that of code on a transmission line in the WALSH 1 code are extracted. The extracted clock pulses consists of zero phase clock pulses and pi phase clock pulses, wherein the zero phase clock pulses are accurately extracted. An embodiment comprises an clock extraction circuit for extracting extracted clock pulses of 2f.sub.0 from a receive pulse train of frequency f.sub.0, a latch circuit for latching the receive pulse train with the extracted clock pulses, a frame synchronizing circuit for obtaining frame pulses synchronized with the extracted clock pulses from the latched output pulses, a zero phase separation circuit for obtaining zero phase clock pulses from the extracted clock pulses and the frame pulses, and a regenerative discrimination circuit for obtaining a regenerated pulse train from the zero phase clock pulses and the latched output pulses. The regenerated pulse train has the same pattern as that of the original code from which the receive pulse train is converted by the WALSH 1 code.

    摘要翻译: CMI代码具有很多功能,但由辐射噪声引起的传输线上的干扰是不可避免的问题。 在本发明中,采用WALSH 1代码来解决问题。 提取具有WALSH 1代码中的传输线上的代码的频率的两倍的时钟脉冲。 所提取的时钟脉冲由零相位时钟脉冲和pi相位时钟脉冲组成,其中准相位提取零相位时钟脉冲。 实施例包括:时钟提取电路,用于从频率f0的接收脉冲串中提取2f0的提取时钟脉冲;锁存电路,用于以提取的时钟脉冲锁存接收脉冲串;帧同步电路,用于获得与所提取的帧同步的帧脉冲 来自锁存的输出脉冲的时钟脉冲,用于从提取的时钟脉冲和帧脉冲获得零相位时钟脉冲的零相位分离电路,以及用于从零相位时钟脉冲和锁存输出获得再生脉冲串的再生鉴别电路 脉冲。 再生脉冲串具有与通过WALSH 1码转换接收脉冲串的原始码相同的图案。

    Epoxy Resin Composition For Transparent Sheets And Cured Product Thereof
    7.
    发明申请
    Epoxy Resin Composition For Transparent Sheets And Cured Product Thereof 有权
    环氧树脂组合物透明片及其固化产品

    公开(公告)号:US20130323994A1

    公开(公告)日:2013-12-05

    申请号:US13878564

    申请日:2011-11-15

    IPC分类号: C08K5/12 D06M15/55

    摘要: To provide an epoxy resin composition that is suitable for producing optical sheets which exhibit excellent transparency, heat resistance, strength, smoothness and light resistance, and a cured product thereof.An epoxy resin composition for optical3 sheets, the composition comprising a polyvalent carboxylic acid (A) represented by formula (I): (wherein, R1's each independently represent a hydrogen atom, an alkyl group having 1 to 15 carbon atoms, or a carboxyl group; q represents the number of substituent R1's, and represents an integer from 1 to 4; and P represents any one of the following x, y and z): (wherein, there may be a plural number of R2's per ring, and R2's each independently represent a hydrogen atom or a methyl group; and * represents a bonding site linked to the oxygen atom; y. A linear alkylene linker having 6 to 20 carbon atoms, with a main chain having 3 or more carbon atoms and being substituted with an alkyl group in at least one site); (wherein, R's each independently represent a hydrogen atom, an alkyl group having 1 to 15 carbon atoms, or a carboxyl group; and * represents a bonding site linked to the oxygen atom, and an epoxy resin (B) having an aliphatic cyclic structure in the molecule).

    摘要翻译: 提供一种适用于制造透明性,耐热性,强度,光滑性,耐光性优异的光学片的环氧树脂组合物及其固化物。 用于光学3片的环氧树脂组合物,该组合物包含由式(I)表示的多价羧酸(A):(其中,R 1各自独立地表示氢原子,具有1至15个碳原子的烷基或羧基 ; q表示取代基R 1的数,表示1〜4的整数,P表示以下x,y,z中的任一个:(其中,每个环可以有多个R 2, 独立地表示氢原子或甲基; *表示与氧原子连接的键合位置; y。具有6〜20个碳原子的直链亚烷基连接体,具有3个以上碳原子的主链,并被 至少一个位点的烷基); (其中,R 3各自独立地表示氢原子,碳原子数1〜15的烷基或羧基; *表示与氧原子连接的键合位置,具有脂肪族环状结构的环氧树脂(B) 在分子中)。

    Magnetic disk device having a mechanism for removing an adhesion between
a magnetic head and a magnetic disk
    8.
    发明授权
    Magnetic disk device having a mechanism for removing an adhesion between a magnetic head and a magnetic disk 失效
    具有用于去除磁头和磁盘之间的粘附的机构的磁盘装置

    公开(公告)号:US4833550A

    公开(公告)日:1989-05-23

    申请号:US66542

    申请日:1987-06-26

    CPC分类号: G11B5/54 G11B19/20

    摘要: A magnetic disk device of the present invention is configured so that a stopper for controlling the movement of a carriage arm is adapted to give rise to play in controlling the carriage arm when the stopper is in the closed state. When a disk rotating means is actuated, the magnetic disk device permits a disk and a magnetic head in the state of fast mutual adhesion to be separated from each other by causing the carriage arm to swing with the stopper kept in the closed state, and consequently, the magnetic disk device enables the disk to rotate without fail.

    摘要翻译: 本发明的磁盘装置被构造成使得当止动器处于关闭状态时,用于控制托架臂的移动的止动件适于引起控制托架臂的弹奏。 当盘旋转装置被致动时,磁盘装置允许盘和以快速相互粘合的状态的磁头彼此分开,使得滑架臂随着止动器保持在关闭状态而摆动,因此 磁盘装置使磁盘能够不间断地旋转。

    Interlayer for laminated glass
    9.
    发明授权
    Interlayer for laminated glass 失效
    夹层玻璃夹层

    公开(公告)号:US4925725A

    公开(公告)日:1990-05-15

    申请号:US293579

    申请日:1989-01-04

    IPC分类号: B29C59/02 B29C59/04 B32B17/10

    摘要: An interlayer for a laminated glass, said interlayer being composed of a film or sheet of a thermoplastic resin, at least one surface of the film or sheet of a thermoplastic resin having numerous coarse raised and depressed portions and numerous fine raised and depressed portions existing on the surfaces of the coarse raised and depressed portions, the average distance between two adjacent coarse depressed or raised portions being about 2 to about 10 times the 10-point average roughness of the coarse raised and depressed portions measured in accordance with ISO-R468.

    摘要翻译: 夹层玻璃的中间层,所述中间层由热塑性树脂的薄膜或薄片组成,热塑性树脂薄膜或薄片的至少一个表面具有许多粗的凸起和凹陷部分,以及许多细小的凸起和凹陷部分存在于 粗凸起和凹陷部分的表面,两个相邻的粗凹陷或凸起部分之间的平均距离是根据ISO-R468测量的粗提升和凹陷部分的10点平均粗糙度的约2至约10倍。