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18 条记录 (耗时 0.019 秒)

    Structure to Reduce Etching Residue
    1.
    发明申请
    Structure to Reduce Etching Residue 有权
    减少蚀刻残渣的结构

    公开(公告)号：US20120126359A1

    公开(公告)日：2012-05-24

    申请号：US12952485

    申请日：2010-11-23

    申请人： Tsung-Yuan Yu ,  Hsien-Wei Chen ,  Chung-Ying Yang

    发明人： Tsung-Yuan Yu ,  Hsien-Wei Chen ,  Chung-Ying Yang

    IPC分类号： H01L29/06 ,  H01L21/76

    CPC分类号： H01L21/31144 ,  H01L21/32139 ,  H01L23/585 ,  H01L27/0207 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A structure for reducing partially etched materials is described. The structure includes a layout of an intersection area between two trenches. First, a large intersection area having a trapezoidal corner may be replaced with an orthogonal intersection between two trenches. The layout reduces the intersection area as well as the possibility of having partially etched materials left at the intersection area. The structure also includes an alternative way to fill the intersection area with either an un-etched small trapezoidal area or multiple un-etched square areas, so that the opening area at the intersection point is reduced and the possibility of having partially etched materials is reduced too.

    摘要翻译： 描述了用于减少部分蚀刻的材料的结构。 该结构包括两个沟槽之间的交叉区域的布局。 首先，具有梯形角的大交叉区域可以用两个沟槽之间的正交交替来代替。 布局减少了交叉区域以及在交叉区域留下部分蚀刻的材料的可能性。 该结构还包括用未蚀刻的小梯形区域或多个未蚀刻的正方形区域填充交叉区域的替代方法，使得交点处的开口面积减小，并且部分蚀刻材料的可能性降低 太。

    Structure to reduce etching residue
    4.
    发明授权
    Structure to reduce etching residue 有权
    结构减少蚀刻残留

    公开(公告)号：US08217499B2

    公开(公告)日：2012-07-10

    申请号：US12952485

    申请日：2010-11-23

    申请人： Tsung-Yuan Yu ,  Hsien-Wei Chen ,  Chung-Ying Yang

    发明人： Tsung-Yuan Yu ,  Hsien-Wei Chen ,  Chung-Ying Yang

    IPC分类号： H01L23/544

    CPC分类号： H01L21/31144 ,  H01L21/32139 ,  H01L23/585 ,  H01L27/0207 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A structure for reducing partially etched materials is described. The structure includes a layout of an intersection area between two trenches. First, a large intersection area having a trapezoidal corner may be replaced with an orthogonal intersection between two trenches. The layout reduces the intersection area as well as the possibility of having partially etched materials left at the intersection area. The structure also includes an alternative way to fill the intersection area with either an un-etched small trapezoidal area or multiple un-etched square areas, so that the opening area at the intersection point is reduced and the possibility of having partially etched materials is reduced too.

    摘要翻译： 描述了用于减少部分蚀刻的材料的结构。 该结构包括两个沟槽之间的交叉区域的布局。 首先，具有梯形角的大交叉区域可以用两个沟槽之间的正交交替来代替。 布局减少了交叉区域以及在交叉区域留下部分蚀刻的材料的可能性。 该结构还包括用未蚀刻的小梯形区域或多个未蚀刻的正方形区域填充交叉区域的替代方法，使得交点处的开口面积减小，并且部分蚀刻材料的可能性降低 太。

    METHODS AND APPARATUS FOR HEAT SPREADER ON SILICON
    5.
    发明申请
    METHODS AND APPARATUS FOR HEAT SPREADER ON SILICON 有权
    有机硅热交换器的方法与装置

    公开(公告)号：US20130270686A1

    公开(公告)日：2013-10-17

    申请号：US13444558

    申请日：2012-04-11

    申请人： Hsien-Wei Chen ,  Chung-Ying Yang ,  Chao-Wen Shih ,  Kai-Chiang Wu

    发明人： Hsien-Wei Chen ,  Chung-Ying Yang ,  Chao-Wen Shih ,  Kai-Chiang Wu

    IPC分类号： H01L23/34 ,  H01L21/60

    CPC分类号： H01L23/367 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/81424 ,  H01L2924/014 ,  H01L2924/00014

    摘要： Apparatus and methods for forming a heat spreader on a substrate to release heat for a semi-conductor package are disclosed. The apparatus comprises a substrate. A dielectric layer is formed next to the substrate and in contact with a surface of the substrate. A heat spreader is formed next to the substrate and in contact with another surface of the substrate. A passivation layer is formed next to the dielectric layer. A connection pad is placed on top of the passivation layer. The substrate may comprise additional through-silicon-vias. The contact surface between the substrate and the heat spreader may be a scraggy surface. The packaging method further proceeds to connect a chip to the connection pad by way of a connection device such as a solder ball or a bump.

    摘要翻译： 公开了一种用于在基板上形成散热器以释放用于半导体封装的热量的装置和方法。 该装置包括基板。 在基板的旁边形成介电层，与基板的表面接触。 散热器形成在基板的旁边并与基板的另一个表面接触。 在电介质层的旁边形成钝化层。 连接焊盘放置在钝化层的顶部。 衬底可以包括另外的通硅通孔。 基板和散热器之间的接触表面可能是肮脏的表面。 包装方法还进一步通过诸如焊球或凸块的连接装置将芯片连接到连接焊盘。

    Guard ring design structure for semiconductor devices
    6.
    发明授权
    Guard ring design structure for semiconductor devices 有权
    半导体器件的保护环设计结构

    公开(公告)号：US09478505B2

    公开(公告)日：2016-10-25

    申请号：US13445229

    申请日：2012-04-12

    申请人： Hsien-Wei Chen ,  Chung-Ying Yang

    发明人： Hsien-Wei Chen ,  Chung-Ying Yang

    IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L23/58 ,  H01L23/528 ,  H01L23/31

    CPC分类号： H01L23/585 ,  H01L23/3171 ,  H01L23/5283 ,  H01L23/562 ,  H01L23/564 ,  H01L2224/02165 ,  H01L2224/02166 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A customized seal ring for a semiconductor device is formed of multiple seal ring cells that are selected and arranged to produce a seal ring design. The cells include first cells that are coupled to ground and second cells that are not coupled to ground. The second cells that are not coupled to ground, include a higher density of metal features in an inner portion thereof, than the first seal ring cells. Dummy metal vias and other metal features that may be present in the inner portion of the second seal ring cells are absent from the inner portion of the first seal ring cells that are coupled to ground. The seal ring design may include various arrangements, including alternating and repeating sequences of the different seal ring cells.

    摘要翻译： 用于半导体器件的定制密封环由多个密封环电池形成，所述多个密封环电池被选择和布置以产生密封环设计。 这些电池包括耦合到地的第一个电池和不耦合到地的第二个电池。 与第一密封环电池相比，没有耦合到地面的第二电池在其内部包括更高密度的金属特征。 可能存在于第二密封环单元的内部的虚拟金属通孔和其它金属特征不存在于耦合到地的第一密封环单元的内部。 密封环设计可以包括各种布置，包括不同密封环单元的交替和重复序列。

    Methods and apparatus for heat spreader on silicon
    7.
    发明授权
    Methods and apparatus for heat spreader on silicon 有权
    散热器在硅上的方法和装置

    公开(公告)号：US09236322B2

    公开(公告)日：2016-01-12

    申请号：US13444558

    申请日：2012-04-11

    申请人： Hsien-Wei Chen ,  Chung-Ying Yang ,  Chao-Wen Shih ,  Kai-Chiang Wu

    发明人： Hsien-Wei Chen ,  Chung-Ying Yang ,  Chao-Wen Shih ,  Kai-Chiang Wu

    IPC分类号： H01L23/34 ,  H01L23/367

    CPC分类号： H01L23/367 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/81424 ,  H01L2924/014 ,  H01L2924/00014

    摘要： Apparatus and methods for forming a heat spreader on a substrate to release heat for a semi-conductor package are disclosed. The apparatus comprises a substrate. A dielectric layer is formed next to the substrate and in contact with a surface of the substrate. A heat spreader is formed next to the substrate and in contact with another surface of the substrate. A passivation layer is formed next to the dielectric layer. A connection pad is placed on top of the passivation layer. The substrate may comprise additional through-silicon-vias. The contact surface between the substrate and the heat spreader may be a scraggy surface. The packaging method further proceeds to connect a chip to the connection pad by way of a connection device such as a solder ball or a bump.

    摘要翻译： 公开了一种用于在基板上形成散热器以释放用于半导体封装的热量的装置和方法。 该装置包括基板。 在基板的旁边形成介电层，与基板的表面接触。 散热器形成在基板的旁边并与基板的另一个表面接触。 在电介质层的旁边形成钝化层。 连接焊盘放置在钝化层的顶部。 衬底可以包括另外的通硅通孔。 基板和散热器之间的接触表面可能是肮脏的表面。 包装方法还进一步通过诸如焊球或凸块的连接装置将芯片连接到连接焊盘。

    Seal ring structure in semiconductor devices
    9.
    发明授权
    Seal ring structure in semiconductor devices 有权
    半导体器件中的密封圈结构

    公开(公告)号：US08253217B2

    公开(公告)日：2012-08-28

    申请号：US12816454

    申请日：2010-06-16

    申请人： Hsien-Wei Chen ,  Chung-Ying Yang

    发明人： Hsien-Wei Chen ,  Chung-Ying Yang

    IPC分类号： H01L23/52 ,  H01L21/76

    CPC分类号： H01L23/585 ,  H01L23/3157 ,  H01L27/0207 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/00

    摘要： The present disclosure provides a semiconductor device that includes a substrate having a seal ring region and a circuit region, a plurality of dummy gates disposed over the seal ring region of the substrate, and a seal ring structure disposed over the plurality of dummy gates in the seal ring region. A method of fabricating a semiconductor device is also provided, the method including providing a substrate having a seal ring region and a circuit region, forming a plurality of dummy gates over the seal ring region of the substrate, and forming a seal ring structure over the plurality of dummy gates over the seal ring region.

    摘要翻译： 本公开提供一种半导体器件，其包括具有密封环区域和电路区域的衬底，设置在衬底的密封环区域上方的多个虚拟栅极以及设置在多个虚拟栅极中的密封环结构 密封圈区域。 还提供了制造半导体器件的方法，所述方法包括提供具有密封环区域和电路区域的衬底，在衬底的密封环区域上形成多个虚拟栅极，并在衬底上形成密封环结构 在密封圈区域上的多个虚拟门。