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公开(公告)号:US09406711B2
公开(公告)日:2016-08-02
申请号:US13524757
申请日:2012-06-15
申请人: Szu-Ying Chen , Tzu-Jui Wang , Jen-Cheng Liu , Dun-Nian Yaung , Ping-Yin Liu , Lan-Lin Chao
发明人: Szu-Ying Chen , Tzu-Jui Wang , Jen-Cheng Liu , Dun-Nian Yaung , Ping-Yin Liu , Lan-Lin Chao
IPC分类号: H01L31/00 , H01L27/146
CPC分类号: H01L27/14634 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/1464 , H01L27/1469
摘要: A backside illuminated image sensor comprises a photodiode and a first transistor located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked on the first substrate and the logic circuit are coupled to the first transistor through a plurality of bonding pads.
摘要翻译: 背面照明图像传感器包括光电二极管和位于第一衬底中的第一晶体管,其中第一晶体管电耦合到光电二极管。 背面照明图像传感器还包括形成在第二基板中的多个逻辑电路,其中第二基板堆叠在第一基板上,并且逻辑电路通过多个接合焊盘耦合到第一晶体管。
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公开(公告)号:US09379093B2
公开(公告)日:2016-06-28
申请号:US13457637
申请日:2012-04-27
申请人: Szu-Ying Chen , Ping-Yin Liu , Calvin Yi-Ping Chao , Tzu-Jui Wang , Jen-Cheng Liu , Dun-Nian Yaung , Lan-Lin Chao
发明人: Szu-Ying Chen , Ping-Yin Liu , Calvin Yi-Ping Chao , Tzu-Jui Wang , Jen-Cheng Liu , Dun-Nian Yaung , Lan-Lin Chao
IPC分类号: H01L27/00 , H01L25/16 , H01L27/146
摘要: Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a sensor device with an application specific integrated circuit (ASIC) are disclosed. According to an embodiment, a sensor device may be bonded together face-to-face with an ASIC without using a carrier wafer, where corresponding bond pads of the sensor are aligned with bond pads of the ASIC and bonded together, in a one-to-one fashion. A column of pixels of the sensor may share a bond bad connected by a shared inter-metal line. The bond pads may be of different sizes and configured in different rows to be disjoint from each other. Additional dummy pads may be added to increase the bonding between the sensor and the ASIC.
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3.
公开(公告)号:US08629524B2
公开(公告)日:2014-01-14
申请号:US13458812
申请日:2012-04-27
申请人: Tzu-Jui Wang , Szu-Ying Chen , Jen-Cheng Liu , Dun-Nian Yaung , Ping-Yin Liu , Lan-Lin Chao
发明人: Tzu-Jui Wang , Szu-Ying Chen , Jen-Cheng Liu , Dun-Nian Yaung , Ping-Yin Liu , Lan-Lin Chao
IPC分类号: H01L31/0232
CPC分类号: H01L27/14683 , H01L27/14618 , H01L27/14634 , H01L27/1469 , H01L2924/0002 , H01L2924/00
摘要: A backside illuminated image sensor comprises a photodiode and a first transistor located in a first chip, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a second transistor formed in a second chip and a plurality of logic circuits formed in a third chip, wherein the second chip is stacked on the first chip and the third chip is stacked on the second chip. The logic circuit, the second transistor and the first transistor are coupled to each other through a plurality of boding pads and through vias.
摘要翻译: 背面照明图像传感器包括光电二极管和位于第一芯片中的第一晶体管,其中第一晶体管电耦合到光电二极管。 背面照明图像传感器还包括形成在第二芯片中的第二晶体管和形成在第三芯片中的多个逻辑电路,其中第二芯片堆叠在第一芯片上,第三芯片堆叠在第二芯片上。 逻辑电路,第二晶体管和第一晶体管通过多个焊盘和通孔彼此耦合。
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公开(公告)号:US09412725B2
公开(公告)日:2016-08-09
申请号:US13457637
申请日:2012-04-27
申请人: Szu-Ying Chen , Ping-Yin Liu , Calvin Yi-Ping Chao , Tzu-Jui Wang , Jen-Cheng Liu , Dun-Nian Yaung , Lan-Lin Chao
发明人: Szu-Ying Chen , Ping-Yin Liu , Calvin Yi-Ping Chao , Tzu-Jui Wang , Jen-Cheng Liu , Dun-Nian Yaung , Lan-Lin Chao
IPC分类号: H01L27/00 , H01L25/16 , H01L27/146
CPC分类号: H01L27/1469 , H01L25/16 , H01L27/14618 , H01L27/14621 , H01L27/14627 , H01L27/14632 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L27/14643 , H01L27/14683 , H01L2924/0002 , H01L2924/00
摘要: Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a sensor device with an application specific integrated circuit (ASIC) are disclosed. According to an embodiment, a sensor device may be bonded together face-to-face with an ASIC without using a carrier wafer, where corresponding bond pads of the sensor are aligned with bond pads of the ASIC and bonded together, in a one-to-one fashion. A column of pixels of the sensor may share a bond bad connected by a shared inter-metal line. The bond pads may be of different sizes and configured in different rows to be disjoint from each other. Additional dummy pads may be added to increase the bonding between the sensor and the ASIC.
摘要翻译: 公开了用于封装具有专用集成电路(ASIC)的背面照明(BSI)图像传感器或传感器装置的方法和装置。 根据实施例,传感器装置可以与ASIC面对面地结合在一起,而不使用载体晶片,其中传感器的相应接合焊盘与ASIC的接合焊盘对准并且结合在一起,以一对一 一个时尚。 传感器的像素列可以共享由共享的金属间线路连接不良的键。 接合焊盘可以具有不同的尺寸并且被配置成不同的行以彼此不相交。 可以添加附加的虚拟焊盘以增加传感器和ASIC之间的接合。
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公开(公告)号:US20130334638A1
公开(公告)日:2013-12-19
申请号:US13524757
申请日:2012-06-15
申请人: Szu-Ying Chen , Tzu-Jui Wang , Jen-Cheng Liu , Dun-Nian Yaung , Ping-Yin Liu , Lan-Lin Chao
发明人: Szu-Ying Chen , Tzu-Jui Wang , Jen-Cheng Liu , Dun-Nian Yaung , Ping-Yin Liu , Lan-Lin Chao
IPC分类号: H01L31/0232 , H01L31/02
CPC分类号: H01L27/14634 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/1464 , H01L27/1469
摘要: A backside illuminated image sensor comprises a photodiode and a first transistor located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked on the first substrate and the logic circuit are coupled to the first transistor through a plurality of bonding pads.
摘要翻译: 背面照明图像传感器包括光电二极管和位于第一衬底中的第一晶体管,其中第一晶体管电耦合到光电二极管。 背面照明图像传感器还包括形成在第二基板中的多个逻辑电路,其中第二基板堆叠在第一基板上,并且逻辑电路通过多个接合焊盘耦合到第一晶体管。
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6.
公开(公告)号:US20130285180A1
公开(公告)日:2013-10-31
申请号:US13458812
申请日:2012-04-27
申请人: Tzu-Jui Wang , Szu-Ying Chen , Jen-Cheng Liu , Dun-Nian Yaung , Ping-Yin Liu , Lan-Lin Chao
发明人: Tzu-Jui Wang , Szu-Ying Chen , Jen-Cheng Liu , Dun-Nian Yaung , Ping-Yin Liu , Lan-Lin Chao
IPC分类号: H01L31/0232 , H01L27/146 , H01L31/18
CPC分类号: H01L27/14683 , H01L27/14618 , H01L27/14634 , H01L27/1469 , H01L2924/0002 , H01L2924/00
摘要: A backside illuminated image sensor comprises a photodiode and a first transistor located in a first chip, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a second transistor formed in a second chip and a plurality of logic circuits formed in a third chip, wherein the second chip is stacked on the first chip and the third chip is stacked on the second chip. The logic circuit, the second transistor and the first transistor are coupled to each other through a plurality of boding pads and through vias.
摘要翻译: 背面照明图像传感器包括光电二极管和位于第一芯片中的第一晶体管,其中第一晶体管电耦合到光电二极管。 背面照明图像传感器还包括形成在第二芯片中的第二晶体管和形成在第三芯片中的多个逻辑电路,其中第二芯片堆叠在第一芯片上,第三芯片堆叠在第二芯片上。 逻辑电路,第二晶体管和第一晶体管通过多个焊盘和通孔彼此耦合。
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公开(公告)号:US20130284885A1
公开(公告)日:2013-10-31
申请号:US13457637
申请日:2012-04-27
申请人: Szu-Ying Chen , Ping-Yin Liu , Calvin Yi-Ping Chao , Tzu-Jui Wang , Jen-Cheng Liu , Dun-Nian Yaung , Lan-Lin Chao
发明人: Szu-Ying Chen , Ping-Yin Liu , Calvin Yi-Ping Chao , Tzu-Jui Wang , Jen-Cheng Liu , Dun-Nian Yaung , Lan-Lin Chao
IPC分类号: H01L27/146
CPC分类号: H01L27/1469 , H01L25/16 , H01L27/14618 , H01L27/14621 , H01L27/14627 , H01L27/14632 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L27/14643 , H01L27/14683 , H01L2924/0002 , H01L2924/00
摘要: Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a sensor device with an application specific integrated circuit (ASIC) are disclosed. According to an embodiment, a sensor device may be bonded together face-to-face with an ASIC without using a carrier wafer, where corresponding bond pads of the sensor are aligned with bond pads of the ASIC and bonded together, in a one-to-one fashion. A column of pixels of the sensor may share a bond bad connected by a shared inter-metal line. The bond pads may be of different sizes and configured in different rows to be disjoint from each other. Additional dummy pads may be added to increase the bonding between the sensor and the ASIC.
摘要翻译: 公开了用于封装具有专用集成电路(ASIC)的背面照明(BSI)图像传感器或传感器装置的方法和装置。 根据实施例,传感器设备可以与ASIC面对面地结合在一起,而不使用载体晶片,其中传感器的相应接合焊盘与ASIC的接合焊盘对准并且结合在一起,以一对一 一个时尚。 传感器的像素列可以共享由共享的金属间线路连接不良的键。 接合焊盘可以具有不同的尺寸并且被配置成不同的行以彼此不相交。 可以添加附加的虚拟焊盘以增加传感器和ASIC之间的接合。
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公开(公告)号:US20130203199A1
公开(公告)日:2013-08-08
申请号:US13365043
申请日:2012-02-02
申请人: Xin-Hua Huang , Ping-Yin Liu , Li-Cheng Chu , Yuan-Chih Hsieh , Lan-Lin Chao , Chun-Wen Cheng , Chia-Shiung Tsai
发明人: Xin-Hua Huang , Ping-Yin Liu , Li-Cheng Chu , Yuan-Chih Hsieh , Lan-Lin Chao , Chun-Wen Cheng , Chia-Shiung Tsai
CPC分类号: B23K20/002 , B23K20/023
摘要: A method includes bonding a first bond layer to a second bond layer through eutectic bonding. The step of bonding includes heating the first bond layer and the second bond layer to a temperature higher than a eutectic temperature of the first bond layer and the second bond layer, and performing a pumping cycle. The pumping cycle includes applying a first force to press the first bond layer and the second bond layer against each other. After the step of applying the first force, a second force lower than the first force is applied to press the first bond layer and the second bond layer against each other. After the step of applying the second force, a third force higher than the second force is applied to press the first bond layer and the second bond layer against each other.
摘要翻译: 一种方法包括通过共晶接合将第一接合层结合到第二接合层。 接合步骤包括将第一接合层和第二接合层加热至高于第一接合层和第二接合层的共晶温度的温度,并进行泵送循环。 泵送循环包括施加第一力以将第一接合层和第二接合层相互挤压。 在施加第一力的步骤之后,施加比第一力小的第二力以将第一接合层和第二接合层相互挤压。 在施加第二力的步骤之后,施加比第二力高的第三力以将第一接合层和第二接合层相互挤压。
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公开(公告)号:US20130099355A1
公开(公告)日:2013-04-25
申请号:US13280075
申请日:2011-10-24
申请人: Ping-Yin Liu , Xin-Hua Huang , Hsin-Ting Huang , Yuan-Chih Hsieh , Jung-Huei Peng , Lan-Lin Chao , Chia-Shiung Tsai , Chun-Wen Cheng
发明人: Ping-Yin Liu , Xin-Hua Huang , Hsin-Ting Huang , Yuan-Chih Hsieh , Jung-Huei Peng , Lan-Lin Chao , Chia-Shiung Tsai , Chun-Wen Cheng
CPC分类号: B81B7/0058 , B81B3/0005 , B81B3/0021 , B81C1/00269 , B81C1/00793 , B81C2201/053 , B81C2203/0109 , H01G5/16 , H01L28/60
摘要: A method includes forming a MEMS device, forming a bond layer adjacent the MEMS device, and forming a protection layer over the bond layer. The steps of forming the bond layer and the protection layer include in-situ deposition of the bond layer and the protection layer
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公开(公告)号:US09048283B2
公开(公告)日:2015-06-02
申请号:US13542507
申请日:2012-07-05
申请人: Ping-Yin Liu , Shih-Wei Lin , Xin-Hua Huang , Lan-Lin Chao , Chia-Shiung Tsai
发明人: Ping-Yin Liu , Shih-Wei Lin , Xin-Hua Huang , Lan-Lin Chao , Chia-Shiung Tsai
CPC分类号: H01L24/80 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/27 , H01L24/74 , H01L24/94 , H01L2224/02215 , H01L2224/0361 , H01L2224/03616 , H01L2224/0381 , H01L2224/05647 , H01L2224/05687 , H01L2224/08145 , H01L2224/74 , H01L2224/7501 , H01L2224/75101 , H01L2224/7565 , H01L2224/75753 , H01L2224/75824 , H01L2224/80004 , H01L2224/80007 , H01L2224/8001 , H01L2224/80011 , H01L2224/80013 , H01L2224/80014 , H01L2224/80065 , H01L2224/80075 , H01L2224/80097 , H01L2224/80121 , H01L2224/80136 , H01L2224/80203 , H01L2224/80895 , H01L2224/80896 , H01L2224/83889 , H01L2224/94 , H01L2924/00014 , H01L2924/1461 , H01L2924/351 , Y10T156/15 , Y10T156/1744 , H01L2924/00012 , H01L2224/80 , H01L2924/05442 , H01L2924/00
摘要: Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.
摘要翻译: 公开了用于半导体晶片的混合键合系统和方法。 在一个实施例中,用于半导体晶片的混合键合系统包括腔室和设置在腔室内的多个子腔室。 机器人处理器设置在腔室内,其适于移动多个子室内的室内的多个半导体晶片。 多个子室包括适于从多个半导体晶片去除保护层的第一子室,以及适于在混合结合多个半导体之前激活多个半导体晶片的顶表面的第二子室 晶圆在一起 多个子室还包括适于对准多个半导体晶片并将多个半导体晶片混合地结合在一起的第三子室。
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