公开(公告)号：US20240304593A1

公开(公告)日：2024-09-12

申请号：US18179126

申请日：2023-03-06

申请人： ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/80 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/08145 ,  H01L2224/80009 ,  H01L2224/80013 ,  H01L2224/80357 ,  H01L2224/80379 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80906 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06565 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/04642 ,  H01L2924/0504 ,  H01L2924/0544 ,  H01L2924/05494 ,  H01L2924/059

摘要： Disclosed herein are processes and methods for direct bonding. In some embodiments, the process includes providing an element having a dielectric bonding surface and one or more conductive features exposed at the dielectric bonding surface, where the dielectric bonding surface has a planarity suitable for direct bonding. The process also includes, after providing the element, exposing the dielectric bonding surface to the products of a water vapor plasma prior to direct bonding the element.

公开(公告)号：US20240170474A1

公开(公告)日：2024-05-23

申请号：US18425205

申请日：2024-01-29

申请人： EV Group E. Thallner GmbH

发明人： Markus Wimplinger

IPC分类号： H01L25/00 ,  H01L23/00 ,  H01L25/065 ,  H05K13/04

CPC分类号： H01L25/50 ,  H01L24/74 ,  H01L24/75 ,  H01L24/80 ,  H01L25/0652 ,  H05K13/0404 ,  H01L2224/80003 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80894

摘要： A method and device for bonding chips onto a substrate or onto further chips. The chips are bonded onto the substrate or the further chips by means of a direct bond.

公开(公告)号：US20240107740A1

公开(公告)日：2024-03-28

申请号：US18531765

申请日：2023-12-07

申请人： CHANGXIN MEMORY TECHNOLOGIES, INC.

发明人： Huihui GUI

IPC分类号： H10B12/00 ,  H01L23/00

CPC分类号： H10B12/02 ,  H01L24/08 ,  H01L24/80 ,  H10B12/315 ,  H10B12/482 ,  H01L2224/08145 ,  H01L2224/80013 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/1436

摘要： A method for manufacturing a semiconductor structure includes: forming first base which includes first substrate and active areas arranged in an array along first direction and second direction in first substrate, word lines being disposed in first base, extending along second direction and covering at least opposite sides of each active area; forming charge storage structures electrically connected with first ends of active areas on first base; forming second base which includes second substrate and bit lines disposed in second substrate, bit lines extending along first direction; connecting first base and second base by using a first surface of first base away from charge storage structures and a second surface of second base having structures of bit lines as connection surfaces, bit lines being electrically connected with second ends of active areas, and each first end being disposed opposite to a corresponding second end.

公开(公告)号：US11932534B2

公开(公告)日：2024-03-19

申请号：US17696299

申请日：2022-03-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hung-Hua Lin ,  Chang-Ming Wu ,  Chung-Yi Yu ,  Ping-Yin Liu ,  Jung-Huei Peng

IPC分类号： B81C1/00 ,  B81B7/00 ,  H01L23/00

CPC分类号： B81C1/00238 ,  B81B7/008 ,  B81C1/00333 ,  H01L24/09 ,  H01L24/89 ,  B81B2207/07 ,  B81C2201/0132 ,  B81C2203/0109 ,  B81C2203/0785 ,  B81C2203/0792 ,  H01L2224/091 ,  H01L2224/80013 ,  H01L2224/80895

摘要： A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.

公开(公告)号：US11916031B2

公开(公告)日：2024-02-27

申请号：US17745225

申请日：2022-05-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih-Chia Hu ,  Ching-Pin Yuan ,  Sung-Feng Yeh ,  Sen-Bor Jan ,  Ming-Fa Chen

IPC分类号： H01L23/00 ,  H01L23/544 ,  H01L25/065 ,  H01L23/522

CPC分类号： H01L24/06 ,  H01L23/522 ,  H01L23/544 ,  H01L24/05 ,  H01L24/08 ,  H01L24/09 ,  H01L24/80 ,  H01L25/0657 ,  H01L2223/54426 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05569 ,  H01L2224/0603 ,  H01L2224/0612 ,  H01L2224/06051 ,  H01L2224/06132 ,  H01L2224/08121 ,  H01L2224/08145 ,  H01L2224/091 ,  H01L2224/0913 ,  H01L2224/09051 ,  H01L2224/8001 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80203 ,  H01L2224/80357 ,  H01L2224/80815 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80905 ,  H01L2224/80986 ,  H01L2924/3511 ,  H01L2224/091 ,  H01L2924/00012 ,  H01L2224/05555 ,  H01L2924/00012 ,  H01L2924/3511 ,  H01L2924/00

摘要： A semiconductor device including a first die and a second die bonded to one another. The first die includes a first passivation layer over a substrate, and first bond pads in the first passivation layer. The second die includes a second passivation layer, which may be bonded to the first passivation layer, and second bond pads in the second passivation layer, which may be bonded to the first bond pads. The second bond pads include inner bond pads and outer bond pads. The outer bond pads may have a greater diameter than the inner bond pads as well as the first bond pads.

公开(公告)号：US20230343740A1

公开(公告)日：2023-10-26

申请号：US17726487

申请日：2022-04-21

申请人： SEMES CO., LTD.

发明人： Min Young KIM ,  Hang Lim LEE ,  Ji Hoon PARK

IPC分类号： H01L23/00 ,  H05H1/24

CPC分类号： H01L24/74 ,  H05H1/24 ,  H01L24/05 ,  H01L2224/05647 ,  H01L2224/05541 ,  H01L24/80 ,  H01L2224/80013 ,  H01L2224/80395 ,  H05H2245/40

摘要： There are provided a die surface treatment apparatus capable of sequentially performing reduction and activation processes on dies in a dual zone and a die bonding system including the die surface treatment apparatus. The die surface treatment apparatus includes: a stage supporting dies, a first plasma generator installed on a moving path of the dies, the first plasma generator performing a reduction process on surfaces of the dies, in a first plasma area; and a second plasma generator installed on the moving path of the dies, the second plasma generator performing a hydrophilization process on the surfaces of the dies, in a second plasma area.

公开(公告)号：US11742315B2

公开(公告)日：2023-08-29

申请号：US17231965

申请日：2021-04-15

申请人： ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES, INC.

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L23/00 ,  H01L21/67 ,  H01L23/48 ,  H01L25/065 ,  H01L21/683 ,  H01L21/78 ,  H01L25/00

CPC分类号： H01L24/80 ,  H01L21/67046 ,  H01L21/67051 ,  H01L21/67132 ,  H01L21/67253 ,  H01L21/6836 ,  H01L21/6838 ,  H01L21/78 ,  H01L23/48 ,  H01L24/97 ,  H01L25/065 ,  H01L25/50 ,  H01L21/67144 ,  H01L24/81 ,  H01L2221/68322 ,  H01L2221/68336 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/80006 ,  H01L2224/80011 ,  H01L2224/80012 ,  H01L2224/80013 ,  H01L2224/80019 ,  H01L2224/80031 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81005 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2224/97 ,  H01L2224/81 ,  H01L2224/97 ,  H01L2224/80001 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2224/80895 ,  H01L2924/00014 ,  H01L2224/80896 ,  H01L2924/00014

摘要： Representative implementations provide techniques and systems for processing integrated circuit (IC) dies. Dies being prepared for intimate surface bonding (to other dies, to substrates, to another surface, etc.) may be processed with a minimum of handling, to prevent contamination of the surfaces or the edges of the dies. The techniques include processing dies while the dies are on a dicing sheet or other device processing film or surface. Systems include integrated cleaning components arranged to perform multiple cleaning processes simultaneously.

公开(公告)号：US20180144999A1

公开(公告)日：2018-05-24

申请号：US15356368

申请日：2016-11-18

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： KUAN-LIANG LU ,  XIN-HUA HUANG ,  YEUR-LUEN TU

IPC分类号： H01L21/66 ,  H01L25/00 ,  H01L25/065 ,  H01L23/00 ,  H01L23/544 ,  H01L21/67

CPC分类号： H01L21/67288 ,  H01L22/12 ,  H01L22/20 ,  H01L23/544 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/50 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2224/80013 ,  H01L2224/80052 ,  H01L2224/8013 ,  H01L2224/80894 ,  H01L2225/06524 ,  H01L2225/06593

摘要： A method of semiconductor wafer bonding and system thereof are proposed. A first alignment mark of a first semiconductor wafer is aligned with a second alignment mark of a second semiconductor wafer. A partial attachment is performed between the first semiconductor wafer and the second semiconductor wafer. A scanning is performed along a direction substantially parallel to a surface of the first semiconductor wafer. It is determined if a bonding defect of the partially attached first semiconductor wafer and the second semiconductor wafer exists.

公开(公告)号：US20180068965A1

公开(公告)日：2018-03-08

申请号：US15800491

申请日：2017-11-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sheng-Chau Chen ,  Shih Pei Chou ,  Yen-Chang Chu ,  Cheng-Hsien Chou ,  Chih-Hui Huang ,  Yeur-Luen Tu

IPC分类号： H01L23/00 ,  H01L21/321 ,  H01L21/324 ,  H01L21/311 ,  H01L25/065 ,  H01L27/146

CPC分类号： H01L24/08 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/324 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/80 ,  H01L25/0657 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/1469 ,  H01L2224/02321 ,  H01L2224/0235 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03614 ,  H01L2224/03845 ,  H01L2224/039 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08057 ,  H01L2224/08145 ,  H01L2224/08147 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80121 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80906 ,  H01L2224/80948 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/04642

摘要： A representative device includes a patterned opening through a layer at a surface of a device die. A liner is disposed on sidewalls of the opening and the device die is patterned to extend the opening further into the device die. After patterning, the liner is removed. A conductive pad is formed in the device die by filling the opening with a conductive material.

公开(公告)号：US20180040547A1

公开(公告)日：2018-02-08

申请号：US15231512

申请日：2016-08-08

申请人： QUALCOMM Incorporated

发明人： Chengjie Zuo ,  Changhan Hobie Yun ,  David Francis Berdy ,  Niranjan Sunil Mudakatte ,  Mario Francisco Velez ,  Shiqun Gu ,  Jonghae Kim

IPC分类号： H01L23/498 ,  H01L27/092 ,  H01L49/02

CPC分类号： H01L23/49827 ,  H01L21/76264 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/5384 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/32 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/117 ,  H01L25/50 ,  H01L27/092 ,  H01L28/10 ,  H01L28/40 ,  H01L2224/06181 ,  H01L2224/06182 ,  H01L2224/08146 ,  H01L2224/08237 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/80013 ,  H01L2224/80047 ,  H01L2224/80201 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/8285 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2225/06572 ,  H01L2224/80001 ,  H01L2924/00014 ,  H01L21/76898

摘要： In a particular aspect, a device includes a substrate including at least one through-substrate via. A metal structure is disposed on a surface of the substrate. The device further includes a semiconductor layer bonded to the substrate. The semiconductor layer includes at least one complimentary metal-oxide-semiconductor (CMOS) transistor and a metal disposed within a second via. The metal is in direct contact with the metal structure.