CMOS compatible BioFET
    1.
    发明授权
    CMOS compatible BioFET 有权
    CMOS兼容的BioFET

    公开(公告)号:US09459234B2

    公开(公告)日:2016-10-04

    申请号:US13480161

    申请日:2012-05-24

    摘要: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.

    摘要翻译: 本公开提供了生物场效应晶体管(BioFET)和制造BioFET器件的方法。 该方法包括使用与互补金属氧化物半导体(CMOS)工艺兼容或典型的一个或多个工艺步骤形成BioFET。 BioFET器件可以包括衬底; 设置在基板的第一表面上的栅极结构和形成在基板的第二表面上的界面层。 界面层可以允许将受体置于界面层上以检测生物分子或生物实体的存在。

    MEMS Device with Release Aperture
    3.
    发明申请
    MEMS Device with Release Aperture 有权
    具有释放孔径的MEMS器件

    公开(公告)号:US20140287548A1

    公开(公告)日:2014-09-25

    申请号:US14225733

    申请日:2014-03-26

    IPC分类号: B81C1/00

    摘要: The present disclosure provides a method of fabricating a micro-electro-mechanical systems (MEMS) device. In an embodiment, a method includes providing a substrate including a first sacrificial layer, forming a micro-electro-mechanical systems (MEMS) structure above the first sacrificial layer, and forming a release aperture at substantially a same level above the first sacrificial layer as the MEMS structure. The method further includes forming a second sacrificial layer above the MEMS structure and within the release aperture, and forming a first cap over the second sacrificial layer and the MEMS structure, wherein a leg of the first cap is disposed between the MEMS structure and the release aperture. The method further includes removing the first sacrificial layer, removing the second sacrificial layer through the release aperture, and plugging the release aperture. A MEMS device formed by such a method is also provided.

    摘要翻译: 本公开提供了一种制造微机电系统(MEMS)装置的方法。 在一个实施例中,一种方法包括提供包括第一牺牲层的衬底,在第一牺牲层之上形成微电子机械系统(MEMS)结构,以及在第一牺牲层之上的基本上相同的水平面上形成释放孔, MEMS结构。 该方法还包括在MEMS结构之上和释放孔内形成第二牺牲层,以及在第二牺牲层和MEMS结构之上形成第一帽,其中第一帽的腿设置在MEMS结构和释放之间 光圈。 该方法还包括去除第一牺牲层,通过释放孔去除第二牺牲层并堵塞释放孔。 还提供了通过这种方法形成的MEMS器件。

    Bond ring for a first and second substrate
    4.
    发明授权
    Bond ring for a first and second substrate 有权
    用于第一和第二衬底的结合环

    公开(公告)号:US08810027B2

    公开(公告)日:2014-08-19

    申请号:US12891062

    申请日:2010-09-27

    IPC分类号: H01L23/34 H01L21/30 H01L21/46

    摘要: The present disclosure provides a device having a plurality of bonded substrates. The substrates are bonded by a first bond ring and a second bond ring. In an embodiment, the first bond ring is a eutectic bond and the second bond ring is at least one of an organic material and a eutectic bond. The second bond ring encircles the first bond ring. The first bond ring provides a hermetic region of the device. In a further embodiment, a plurality of wafers are bonded which include a third bond ring disposed at the periphery of the wafers.

    摘要翻译: 本公开提供了一种具有多个键合衬底的器件。 基板通过第一键环和第二键环键合。 在一个实施方案中,第一键环是共晶键,第二键环是有机材料和共晶键中的至少一种。 第二个键环围绕第一个结合环。 第一粘结环提供该装置的密封区域。 在另一实施例中,多个晶片被结合,其包括设置在晶片周边的第三接合环。

    MULTIPLE BONDING IN WAFER LEVEL PACKAGING
    7.
    发明申请
    MULTIPLE BONDING IN WAFER LEVEL PACKAGING 有权
    多级捆绑在水平包装中

    公开(公告)号:US20120074590A1

    公开(公告)日:2012-03-29

    申请号:US12892003

    申请日:2010-09-28

    IPC分类号: H01L23/488 H01L21/768

    摘要: The present disclosure provides a method for fabricating a MEMS device including multiple bonding of substrates. In an embodiment, a method includes providing a micro-electro-mechanical systems (MEMS) substrate including a first bonding layer, providing a semiconductor substrate including a second bonding layer, and providing a cap including a third bonding layer. The method further includes bonding the MEMS substrate to the semiconductor substrate at the first and second bonding layers, and bonding the cap to the semiconductor substrate at the second and third bonding layers to hermetically seal the MEMS substrate between the cap and the semiconductor substrate. A MEMS device fabricated by the above method is also provided.

    摘要翻译: 本公开提供了一种用于制造包括多个基板结合的MEMS装置的方法。 在一个实施例中,一种方法包括提供包括第一结合层的微电子机械系统(MEMS)衬底,提供包括第二接合层的半导体衬底,以及提供包括第三接合层的帽。 该方法还包括在第一和第二接合层处将MEMS衬底接合到半导体衬底,并且在第二和第三接合层处将盖接合到半导体衬底上,以密封MEMS衬底在盖和半导体衬底之间。 还提供了通过上述方法制造的MEMS器件。

    MICROSTRUCTURE DEVICE WITH AN IMPROVED ANCHOR
    8.
    发明申请
    MICROSTRUCTURE DEVICE WITH AN IMPROVED ANCHOR 有权
    具有改进锚杆的微结构装置

    公开(公告)号:US20120043626A1

    公开(公告)日:2012-02-23

    申请号:US12858202

    申请日:2010-08-17

    IPC分类号: H01L29/84 H01L21/50

    摘要: The present disclosure provides a system of fabricating a microstructure device with an improved anchor. A method of fabricating a microstructure device with an improved anchor includes providing a substrate and forming an oxide layer on the substrate. Then, a cavity is etched in the oxide layer, such that the cavity includes a sidewall in the oxide layer. A microstructure device layer is then bonded to the oxide layer over the cavity. Forming a microstructure device, a trench is etched in the device layer to define an outer boundary of the microstructure device. In an embodiment, the outer boundary is substantially outside of the sidewall of the cavity. Then, the sidewall of the cavity is etched away through the trench in the device layer, to thereby suspend the microstructure device over the cavity.

    摘要翻译: 本公开提供了一种制造具有改进的锚的微结构装置的系统。 利用改进的锚固件制造微结构器件的方法包括提供衬底并在衬底上形成氧化物层。 然后,在氧化物层中蚀刻空腔,使得空腔包括在氧化物层中的侧壁。 然后将微结构器件层与空腔上的氧化物层结合。 形成微结构器件,在器件层中蚀刻沟槽以限定微结构器件的外边界。 在一个实施例中,外部边界基本上在空腔的侧壁的外侧。 然后,通过器件层中的沟槽蚀刻空腔的侧壁,从而将微结构器件悬浮在空腔上。

    Triple-axis MEMS accelerometer having a bottom capacitor
    9.
    发明授权
    Triple-axis MEMS accelerometer having a bottom capacitor 有权
    具有底部电容器的三轴MEMS加速度计

    公开(公告)号:US08106470B2

    公开(公告)日:2012-01-31

    申请号:US12751633

    申请日:2010-03-31

    IPC分类号: H01L21/32

    摘要: An integrated circuit structure includes a substrate having a top surface; a first conductive layer over and contacting the top surface of the substrate; a dielectric layer over and contacting the first conductive layer, wherein the dielectric layer includes an opening exposing a portion of the first conductive layer; and a proof-mass in the opening and including a second conductive layer at a bottom of the proof-mass. The second conductive layer is spaced apart from the portion of the first conductive layer by an air space. Springs anchor the proof-mass to portions of the dielectric layer encircling the opening. The springs are configured to allow the proof-mass to make three-dimensional movements.

    摘要翻译: 集成电路结构包括具有顶表面的基板; 在衬底的顶表面上方并接触第一导电层; 电介质层,其与所述第一导电层接触并接触,其中所述电介质层包括露出所述第一导电层的一部分的开口; 并且在开口中具有证明质量,并且包括在质量块的底部的第二导电层。 第二导电层通过空气间隔与第一导电层的部分间隔开。 弹簧将证明质量锚定到围绕开口的介电层的部分。 弹簧被配置为允许证明物质进行三维运动。