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公开(公告)号：US08420542B2
公开(公告)日：2013-04-16
申请号：US13117208
申请日：2011-05-27
IPC分类号： H01L21/311
CPC分类号： H01L21/0337
摘要： A method of forming a reverse image pattern on a semiconductor base layer is disclosed. The method comprises depositing a transfer layer of amorphous carbon on the semiconductor base layer, depositing a resist layer on the transfer layer, creating a first pattern in the resist layer, creating the first pattern in the transfer layer, removing the resist layer, depositing a reverse mask layer, planarizing the reverse mask layer, and removing the transfer layer, thus forming a second pattern that is a reverse image of the first pattern.
摘要翻译： 公开了一种在半导体基底层上形成反向图案的方法。 该方法包括在半导体基底层上沉积无定形碳的转移层，在转移层上沉积抗蚀剂层，在抗蚀剂层中产生第一图案，在转移层中产生第一图案，去除抗蚀剂层，沉积 反面掩模层，平面化反掩膜层，以及去除转印层，从而形成作为第一图案的反转图像的第二图案。
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公开(公告)号：US20120302069A1
公开(公告)日：2012-11-29
申请号：US13117208
申请日：2011-05-27
IPC分类号： H01L21/311 , B82Y40/00
CPC分类号： H01L21/0337
摘要： A method of forming a reverse image pattern on a semiconductor base layer is disclosed. The method comprises depositing a transfer layer of amorphous carbon on the semiconductor base layer, depositing a resist layer on the transfer layer, creating a first pattern in the resist layer, creating the first pattern in the transfer layer, removing the resist layer, depositing a reverse mask layer, planarizing the reverse mask layer, and removing the transfer layer, thus forming a second pattern that is a reverse image of the first pattern.
摘要翻译： 公开了一种在半导体基底层上形成反向图案的方法。 该方法包括在半导体基底层上沉积无定形碳的转移层，在转移层上沉积抗蚀剂层，在抗蚀剂层中产生第一图案，在转移层中产生第一图案，去除抗蚀剂层，沉积 反面掩模层，平面化反掩膜层，以及去除转印层，从而形成作为第一图案的反转图像的第二图案。
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3.发明授权Method of forming silicide contacts of different shapes selectively on regions of a semiconductor device 有权在半导体器件的区域上选择性地形成不同形状的硅化物触点的方法公开(公告)号：US08415250B2
公开(公告)日：2013-04-09
申请号：US13097459
申请日：2011-04-29
申请人： Emre Alptekin , Dong-Ick Lee , Viraj Yashawant Sardesai , Cung Do Tran , Jian Yu , Reinaldo Ariel Vega , Rajasekhar Venigalla
发明人： Emre Alptekin , Dong-Ick Lee , Viraj Yashawant Sardesai , Cung Do Tran , Jian Yu , Reinaldo Ariel Vega , Rajasekhar Venigalla
IPC分类号： H01L29/417
CPC分类号： H01L29/7833 , H01L21/28518 , H01L21/76805 , H01L21/76843 , H01L21/76855 , H01L23/485 , H01L29/0847 , H01L29/66636 , H01L29/7834 , H01L2924/0002 , H01L2924/00
摘要： A structure and method for fabricating silicide contacts for semiconductor devices is provided. Specifically, the structure and method involves utilizing chemical vapor deposition (CVD) and annealing to form silicide contacts of different shapes, selectively on regions of a semiconductor field effect transistor (FET), such as on source and drain regions. The shape of silicide contacts is a critical factor that can be manipulated to reduce contact resistance. Thus, the structure and method provide silicide contacts of different shapes with low contact resistance, wherein the silicide contacts also mitigate leakage current to enhance the utility and performance of FETs in low power applications.
摘要翻译： 提供了一种用于制造用于半导体器件的硅化物触点的结构和方法。 具体地，该结构和方法涉及利用化学气相沉积（CVD）和退火以在半导体场效应晶体管（FET）（例如源极和漏极区域）的区域上选择性地形成不同形状的硅化物接触。 硅化物触点的形状是可以被操纵以降低接触电阻的关键因素。 因此，该结构和方法提供具有低接触电阻的不同形状的硅化物触点，其中硅化物触点还减轻漏电流以增强低功率应用中的FET的效用和性能。
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公开(公告)号：US20120112290A1
公开(公告)日：2012-05-10
申请号：US12942097
申请日：2010-11-09
申请人： Henry K. Utomo , Unoh Kwon , Dimitri Anastassios Levedakis , Ravikumar Ramachandran , Viraj Yashawant Sardesai , Rajasekhar Venigalla
发明人： Henry K. Utomo , Unoh Kwon , Dimitri Anastassios Levedakis , Ravikumar Ramachandran , Viraj Yashawant Sardesai , Rajasekhar Venigalla
IPC分类号： H01L27/088 , H01L21/336
CPC分类号： H01L21/823807 , H01L21/28518 , H01L21/823814 , H01L21/823842 , H01L21/823871 , H01L29/165 , H01L29/665 , H01L29/6653 , H01L29/66545 , H01L29/66575 , H01L29/66628 , H01L29/66636 , H01L29/7848
摘要： A structure and method for replacement metal gate (RMG) field effect transistors is disclosed. Silicide regions are formed on a raised source-drain (RSD) structure. The silicide regions form a chemical mechanical polish (CMP) stopping layer during a CMP process used to expose the gates prior to replacement. Protective layers are then applied and etched in the formation of metal contacts.
摘要翻译： 公开了一种替代金属栅极（RMG）场效应晶体管的结构和方法。 硅化物区域形成在升高的源极 - 漏极（RSD）结构上。 硅化物区域在用于在更换之前暴露栅极的CMP工艺期间形成化学机械抛光（CMP）停止层。 然后在金属触点的形成中施加和蚀刻保护层。
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5.发明授权公开(公告)号：US08420491B2
公开(公告)日：2013-04-16
申请号：US12942097
申请日：2010-11-09
申请人： Henry K. Utomo , Unoh Kwon , Dimitri Anastassios Levedakis , Ravikumar Ramachandran , Viraj Yashawant Sardesai , Rajasekhar Venigalla
发明人： Henry K. Utomo , Unoh Kwon , Dimitri Anastassios Levedakis , Ravikumar Ramachandran , Viraj Yashawant Sardesai , Rajasekhar Venigalla
IPC分类号： H01L21/336
CPC分类号： H01L21/823807 , H01L21/28518 , H01L21/823814 , H01L21/823842 , H01L21/823871 , H01L29/165 , H01L29/665 , H01L29/6653 , H01L29/66545 , H01L29/66575 , H01L29/66628 , H01L29/66636 , H01L29/7848
摘要： A structure and method for replacement metal gate (RMG) field effect transistors is disclosed. Silicide regions are formed on a raised source-drain (RSD) structure. The silicide regions form a chemical mechanical polish (CMP) stopping layer during a CMP process used to expose the gates prior to replacement. Protective layers are then applied and etched in the formation of metal contacts.
摘要翻译： 公开了一种替代金属栅极（RMG）场效应晶体管的结构和方法。 硅化物区域形成在升高的源极 - 漏极（RSD）结构上。 硅化物区域在用于在更换之前暴露栅极的CMP工艺期间形成化学机械抛光（CMP）停止层。 然后在金属触点的形成中施加和蚀刻保护层。
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6.发明申请METHOD OF FORMING SILICIDE CONTACTS OF DIFFERENT SHAPES SELECTIVELY ON REGIONS OF A SEMICONDUCTOR DEVICE 有权在半导体器件领域中选择形成不同形状的硅氧烷接触的方法公开(公告)号：US20120273798A1
公开(公告)日：2012-11-01
申请号：US13097459
申请日：2011-04-29
申请人： Emre Alptekin , Dong-Ick Lee , Viraj Yashawant Sardesai , Cung Do Tran , Jian Yu , Reinaldo Ariel Vega , Rajasekhar Venigalla
发明人： Emre Alptekin , Dong-Ick Lee , Viraj Yashawant Sardesai , Cung Do Tran , Jian Yu , Reinaldo Ariel Vega , Rajasekhar Venigalla
IPC分类号： H01L29/772
CPC分类号： H01L29/7833 , H01L21/28518 , H01L21/76805 , H01L21/76843 , H01L21/76855 , H01L23/485 , H01L29/0847 , H01L29/66636 , H01L29/7834 , H01L2924/0002 , H01L2924/00
摘要： A structure and method for fabricating silicide contacts for semiconductor devices is provided. Specifically, the structure and method involves utilizing chemical vapor deposition (CVD) and annealing to form silicide contacts of different shapes, selectively on regions of a semiconductor field effect transistor (FET), such as on source and drain regions. The shape of silicide contacts is a critical factor that can be manipulated to reduce contact resistance. Thus, the structure and method provide silicide contacts of different shapes with low contact resistance, wherein the silicide contacts also mitigate leakage current to enhance the utility and performance of FETs in low power applications.
摘要翻译： 提供了一种用于制造用于半导体器件的硅化物触点的结构和方法。 具体地，该结构和方法涉及利用化学气相沉积（CVD）和退火以在半导体场效应晶体管（FET）（例如源极和漏极区域）的区域上选择性地形成不同形状的硅化物接触。 硅化物触点的形状是可以被操纵以降低接触电阻的关键因素。 因此，该结构和方法提供具有低接触电阻的不同形状的硅化物触点，其中硅化物触点还减轻漏电流以增强低功率应用中的FET的效用和性能。
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公开(公告)号：US08557649B2
公开(公告)日：2013-10-15
申请号：US13278301
申请日：2011-10-21
申请人： Rajasekhar Venigalla , Michael Vincent Aquilino , Massud A. Aminpur , Michael P. Belyansky , Unoh Kwon , Christopher Duncan Sheraw , Daewon Yang
发明人： Rajasekhar Venigalla , Michael Vincent Aquilino , Massud A. Aminpur , Michael P. Belyansky , Unoh Kwon , Christopher Duncan Sheraw , Daewon Yang
IPC分类号： H01L21/8238
CPC分类号： H01L29/66545 , H01L21/3081 , H01L21/3086 , H01L21/31053 , H01L21/76283
摘要： Methods for controlling the height of semiconductor structures are disclosed. Amorphous carbon is used as a stopping layer for controlling height variability. In one embodiment, the height of replacement metal gates for transistors is controlled. In another embodiment, the step height of a shallow trench isolation region is controlled.
摘要翻译： 公开了用于控制半导体结构的高度的方法。 无定形碳被用作控制高度变异性的停止层。 在一个实施例中，控制用于晶体管的替换金属栅极的高度。 在另一个实施例中，控制浅沟槽隔离区的台阶高度。
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公开(公告)号：US20130102125A1
公开(公告)日：2013-04-25
申请号：US13278301
申请日：2011-10-21
申请人： Rajasekhar Venigalla , Michael Vincent Aquilino , Massud A. Aminpur , Michael P. Belyansky , Unoh Kwon , Christopher Duncan Sheraw , Daewon Yang
发明人： Rajasekhar Venigalla , Michael Vincent Aquilino , Massud A. Aminpur , Michael P. Belyansky , Unoh Kwon , Christopher Duncan Sheraw , Daewon Yang
IPC分类号： H01L21/762 , H01L21/28
CPC分类号： H01L29/66545 , H01L21/3081 , H01L21/3086 , H01L21/31053 , H01L21/76283
摘要： Methods for controlling the height of semiconductor structures are disclosed. Amorphous carbon is used as a stopping layer for controlling height variability. In one embodiment, the height of replacement metal gates for transistors is controlled. In another embodiment, the step height of a shallow trench isolation region is controlled.
摘要翻译： 公开了用于控制半导体结构的高度的方法。 无定形碳被用作控制高度变异性的停止层。 在一个实施例中，控制用于晶体管的替换金属栅极的高度。 在另一个实施例中，控制浅沟槽隔离区的台阶高度。
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9.发明申请公开(公告)号：US20110195640A1
公开(公告)日：2011-08-11
申请号：US12702333
申请日：2010-02-09
CPC分类号： B24B37/16 , B24B37/22 , B24B37/245
摘要： A chemical mechanical polishing (CMP) system includes a rotating polishing table including a platen providing at least two pressure zones having different pressures; a sub-pad positioned on the platen, the sub-pad including a plurality of openings allowing for transmission of the different pressures therethrough; a fixed abrasive pad positioned on the sub-pad; and a pressure-creating system sealingly coupled to the platen for creating a different pressure in the at least two pressure zones, wherein the different pressures create topography on the fixed abrasive pad. A sub-pad and related method are also provided.
摘要翻译： 化学机械抛光（CMP）系统包括旋转抛光台，其包括提供具有不同压力的至少两个压力区的压板; 位于所述压板上的子垫，所述子垫包括允许通过其传递不同压力的多个开口; 定位在子垫上的固定磨料垫; 以及密封地联接到所述压板的压力产生系统，用于在所述至少两个压力区域中产生不同的压力，其中所述不同压力在所述固定磨料垫上产生形貌。 还提供了一个子垫和相关方法。
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公开(公告)号：US07056192B2
公开(公告)日：2006-06-06
申请号：US10711369
申请日：2004-09-14
IPC分类号： B24D3/00
CPC分类号： C09K3/1463 , C09G1/02 , H01L21/31053
摘要： By adding silica to ceria-based CMP slurries the polish process starts much faster than without silica thereby eliminating dead time in the polish process and eliminating process instability caused by changes in the dead time with operating conditions. A slurry for performing chemical mechanical polishing (CMP) of patterned oxides (e.g., STI, PMD, ILD) on a substrate, comprises: ceria particles having a concentration of 1.0–5.0 wt % and silica particles having a concentration of 0.1–5.0 wt %. A ratio of ceria concentration to silica concentration (ceria:silica) is from approximately 10:1 to nearly 1:1 by weight. The ceria particles have a particle size of 150–250 nm, and the silica particles have a particle size of greater than 100 nm. The silica may be fumed or colloidal. The slurry has a pH of approximately 9.0.
摘要翻译： 通过向二氧化铈基CMP浆料中添加二氧化硅，抛光过程比无二氧化硅快得多，从而消除抛光过程中的死区，并消除由于操作条件下死区时间变化引起的过程不稳定性。 用于在基材上进行图案化氧化物（例如STI，PMD，ILD）的化学机械抛光（CMP）的浆料包括：浓度为1.0-5.0重量％的二氧化铈颗粒和浓度为0.1-5.0重量％的二氧化硅颗粒 ％。 二氧化铈浓度与二氧化硅浓度（二氧化铈：二氧化硅）的比率为约10:1至约1:1重量比。 二氧化铈粒子的粒径为150〜250nm，二氧化硅粒子的粒径大于100nm。 二氧化硅可以是热解或胶体的。 浆液的pH值约为9.0。
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