Electronic carrier board applicable to surface mount technology
    3.
    发明授权
    Electronic carrier board applicable to surface mount technology 有权
    电子载板适用于表面贴装技术

    公开(公告)号:US07889511B2

    公开(公告)日:2011-02-15

    申请号:US12535397

    申请日:2009-08-04

    IPC分类号: H05K7/10

    摘要: An electronic carrier board is provided, including a carrier, at least two paired bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings corresponding in position to the two bond pads. The openings are aligned in the same direction and expose at least a first sidewall and a second sidewall of each of the two bond pads. The first sidewall is perpendicular to an alignment direction of the bond pads and the second sidewall is parallel to the alignment direction of the bond pads. A distance between the first sidewall of at least one of the bond pads and a corresponding side of a corresponding one of the openings is at least about 50 μm greater than a distance between the second sidewall of the at least one bond pad and a corresponding side of the corresponding opening.

    摘要翻译: 提供一种电子载体板,包括载体,形成在载体上的至少两个成对的接合焊盘和覆盖载体的保护层。 保护层形成有与两个接合焊盘相对应的开口。 开口沿相同方向排列,并暴露两个接合焊盘中的每一个的至少第一侧壁和第二侧壁。 第一侧壁垂直于接合焊盘的对准方向,第二侧壁平行于接合焊盘的对准方向。 至少一个接合焊盘的第一侧壁和对应的一个开口的对应侧之间的距离比至少一个接合焊盘的第二侧壁和相应的侧面之间的距离大至少约50μm 的相应开口。

    Electronic carrier board applicable to surface mounted technology (SMT)
    4.
    发明授权
    Electronic carrier board applicable to surface mounted technology (SMT) 有权
    电子载板适用于表面贴装技术(SMT)

    公开(公告)号:US07573722B2

    公开(公告)日:2009-08-11

    申请号:US11654273

    申请日:2007-01-16

    IPC分类号: H05K7/10

    摘要: An electronic carrier board is provided, including a carrier, at least two paired bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings corresponding in position to the two bond pads. The openings are aligned in the same direction and expose at least a first sidewall and a fourth sidewall of each of the two bond pads. The first sidewall and the fourth sidewall are both perpendicular to an alignment direction of the bond pads. A distance between the first sidewall of at least one of the bond pads and a corresponding side of a corresponding one of the openings is at least about 50 μm greater than a distance between the fourth sidewall of the at least one bond pad and a corresponding side of the corresponding opening.

    摘要翻译: 提供一种电子载体板,包括载体,形成在载体上的至少两个成对的接合焊盘和覆盖载体的保护层。 保护层形成有与两个接合焊盘相对应的开口。 开口沿相同的方向排列,并暴露两个接合焊盘中的每一个的至少第一侧壁和第四侧壁。 第一侧壁和第四侧壁都垂直于接合焊盘的对准方向。 至少一个接合焊盘的第一侧壁与对应的一个开口的对应侧之间的距离比至少一个接合焊盘的第四侧壁与相应的侧面之间的距离大至少约50微米 的相应开口。

    Electronic carrier board
    5.
    发明申请
    Electronic carrier board 有权
    电子载板

    公开(公告)号:US20070164084A1

    公开(公告)日:2007-07-19

    申请号:US11654273

    申请日:2007-01-16

    IPC分类号: A47J36/02

    摘要: An electronic carrier board is provided, including a carrier, at least two paired bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings corresponding in position to the two bond pads. The openings are aligned in the same direction and expose at least a first sidewall and a second sidewall of each of the two bond pads. The first sidewall is perpendicular to an alignment direction of the bond pads and the second sidewall is parallel to the alignment direction of the bond pads. A distance between the first sidewall of at least one of the bond pads and a corresponding side of a corresponding one of the openings is at least about 50 μm greater than a distance between the second sidewall of the at least one bond pad and a corresponding side of the corresponding opening.

    摘要翻译: 提供一种电子载体板,包括载体,形成在载体上的至少两个成对的接合焊盘和覆盖载体的保护层。 保护层形成有与两个接合焊盘相对应的开口。 开口沿相同方向排列,并暴露两个接合焊盘中的每一个的至少第一侧壁和第二侧壁。 第一侧壁垂直于接合焊盘的对准方向,第二侧壁平行于接合焊盘的对准方向。 至少一个接合焊盘的第一侧壁和对应的一个开口的对应侧之间的距离比至少一个接合焊盘的第二侧壁和相应侧面之间的距离大至少约50μm 的相应开口。

    ELECTRONIC CARRIER BOARD
    6.
    发明申请
    ELECTRONIC CARRIER BOARD 有权
    电子载体板

    公开(公告)号:US20090288866A1

    公开(公告)日:2009-11-26

    申请号:US12535397

    申请日:2009-08-04

    IPC分类号: H05K1/16 H05K1/02

    摘要: An electronic carrier board is provided, including a carrier, at least two paired bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings corresponding in position to the two bond pads. The openings are aligned in the same direction and expose at least a first sidewall and a second sidewall of each of the two bond pads. The first sidewall is perpendicular to an alignment direction of the bond pads and the second sidewall is parallel to the alignment direction of the bond pads. A distance between the first sidewall of at least one of the bond pads and a corresponding side of a corresponding one of the openings is at least about 50 μm greater than a distance between the second sidewall of the at least one bond pad and a corresponding side of the corresponding opening.

    摘要翻译: 提供一种电子载体板,包括载体,形成在载体上的至少两个成对的接合焊盘和覆盖载体的保护层。 保护层形成有与两个接合焊盘相对应的开口。 开口沿相同方向排列,并暴露两个接合焊盘中的每一个的至少第一侧壁和第二侧壁。 第一侧壁垂直于接合焊盘的对准方向,第二侧壁平行于接合焊盘的对准方向。 至少一个接合焊盘的第一侧壁与对应的一个开口的对应侧之间的距离比至少一个接合焊盘的第二侧壁和相应侧面之间的距离大至少约50μm 的相应开口。

    Semiconductor package and fabrication method thereof
    7.
    发明授权
    Semiconductor package and fabrication method thereof 有权
    半导体封装及其制造方法

    公开(公告)号:US08698326B2

    公开(公告)日:2014-04-15

    申请号:US11900345

    申请日:2007-09-10

    IPC分类号: H01L23/28 H01L23/48

    摘要: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.

    摘要翻译: 公开了半导体封装及其制造方法。 该制造方法包括以下步骤:提供具有与活性表面相对的活性表面和非活性表面的半导体芯片,粗糙化非活性表面的周边部分,以将非活性表面划分成周边部分 形成有粗糙结构和非粗糙化的中心部分,通过形成在有源表面上的多个焊料凸块将半导体芯片安装在芯片载体上,在芯片载体上形成密封剂以封装半导体芯片。 形成在半导体芯片的非活性表面的周边部分上的粗糙结构可以加强半导体芯片和密封剂之间的接合,并且半导体芯片的非活性表面的非粗糙化的中心部分可以保持 半导体芯片的结构强度。

    Heat dissipating semiconductor package and fabrication method therefor
    8.
    发明申请
    Heat dissipating semiconductor package and fabrication method therefor 审中-公开
    散热半导体封装及其制造方法

    公开(公告)号:US20080122070A1

    公开(公告)日:2008-05-29

    申请号:US11986359

    申请日:2007-11-21

    IPC分类号: H01L23/373 H01L21/58

    摘要: A heat dissipating semiconductor package and a fabrication method therefor are provided. The fabrication method for the heat dissipating semiconductor package mainly includes steps of: containing a substrate having a chip mounted thereon in an aperture of a carrier; mounting a heat dissipating sheet having supporting portions on the carrier with the heat dissipating sheet being attached on the chip; forming an encapsulant to encapsulate the semiconductor chip and the heat dissipating structure; removing a part of the encapsulant above the heat dissipating sheet with a part of the heat dissipating sheet exposed from the encapsulant by lapping; and forming a cover layer on the part of heat dissipating sheet to prevent it from oxidation; and cutting along a predetermined size of the semiconductor package, thereby heat generated from an operation of the chip is dissipated via the heat dissipating structure.

    摘要翻译: 提供一种散热半导体封装及其制造方法。 用于散热半导体封装的制造方法主要包括以下步骤:将载置有孔的芯片安装在其上; 将散热板安装在载体上,并将散热板安装在芯片上; 形成密封剂以封装半导体芯片和散热结构; 通过研磨从所述密封剂暴露出的部分所述散热片去除所述散热片上方的所述密封剂的一部分; 在散热片的一部分上形成覆盖层以防止其氧化; 并且沿着预定尺寸的半导体封装进行切割,由此从芯片的操作产生的热量经由散热结构消散。

    Semiconductor package and fabrication method thereof
    9.
    发明申请
    Semiconductor package and fabrication method thereof 有权
    半导体封装及其制造方法

    公开(公告)号:US20080061451A1

    公开(公告)日:2008-03-13

    申请号:US11900345

    申请日:2007-09-10

    IPC分类号: H01L23/495 H01L21/00

    摘要: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.

    摘要翻译: 公开了半导体封装及其制造方法。 该制造方法包括以下步骤:提供具有与活性表面相对的活性表面和非活性表面的半导体芯片,粗糙化非活性表面的周边部分,以将非活性表面划分成周边部分 形成有粗糙结构和非粗糙化的中心部分,通过形成在有源表面上的多个焊料凸块将半导体芯片安装在芯片载体上,在芯片载体上形成密封剂以封装半导体芯片。 形成在半导体芯片的非活性表面的周边部分上的粗糙结构可以加强半导体芯片和密封剂之间的接合,并且半导体芯片的非活性表面的非粗糙化的中心部分可以保持 半导体芯片的结构强度。