公开(公告)号：US08368440B2

公开(公告)日：2013-02-05

申请号：US13291548

申请日：2011-11-08

申请人： Woogeun Rhee ,  He Rui ,  Xueyi Yu ,  Tae-Young Oh ,  Joo-Sun Choi ,  Zhihua Wang

发明人： Woogeun Rhee ,  He Rui ,  Xueyi Yu ,  Tae-Young Oh ,  Joo-Sun Choi ,  Zhihua Wang

IPC分类号： H03L7/06

CPC分类号： H03L7/0995 ,  H03L7/087 ,  H03L7/093 ,  H03L2207/06

摘要： A phase-locked-loop (PLL) circuit is provided. The PLL circuit includes a phase/frequency detector, a digital filter, a digital low pass filter (LPF), a digitally controlled oscillator (DCO), and a frequency divider. The digital LPF performs a low-pass-filtering on least significant bits of first digital data in a digital mode and generates filtered second digital data. The DCO performs a digital-to-analog conversion on the second digital data and most significant bits of the first digital data to generate a first signal, generates an oscillation control signal based on the first signal, and generates an output clock signal oscillating in response to the oscillation control signal.

摘要翻译： 提供了锁相环（PLL）电路。 PLL电路包括相位/频率检测器，数字滤波器，数字低通滤波器（LPF），数字控制振荡器（DCO）和分频器。 数字LPF以数字模式对最低有效位的第一数字数据进行低通滤波，并产生滤波后的第二数字数据。 DCO对第二数字数据和第一数字数据的最高有效位执行数模转换以产生第一信号，基于第一信号产生振荡控制信号，并产生响应振荡的输出时钟信号 到振荡控制信号。

公开(公告)号：US20110246857A1

公开(公告)日：2011-10-06

申请号：US13078364

申请日：2011-04-01

申请人： Seung-Jun Bae ,  Kwang-Il Park ,  Young-Soo Sohn ,  Young-Hyun Jun ,  Joo-Sun Choi ,  Tae-Young Oh

发明人： Seung-Jun Bae ,  Kwang-Il Park ,  Young-Soo Sohn ,  Young-Hyun Jun ,  Joo-Sun Choi ,  Tae-Young Oh

IPC分类号： H03M13/09 ,  H03M13/05 ,  G06F11/10

CPC分类号： G06F11/1004 ,  H03M13/09

摘要： A memory system includes a memory controller and a memory device. The memory device exchanges data through a first channel with the memory controller, exchanges a first cyclic redundancy check (CRC) code associated with the data through a second channel with the memory controller, and receives a command/address packet including a second CRC code associated with a command/address from the memory controller through a third channel.

摘要翻译： 存储器系统包括存储器控制器和存储器件。 存储器件通过第一通道与存储器控制器交换数据，通过与存储器控制器的第二通道交换与数据相关联的第一循环冗余校验（CRC）代码，并且接收包括相关联的第二CRC码的命令/地址分组 具有来自存储器控制器的命令/地址通过第三通道。

公开(公告)号：US20140019833A1

公开(公告)日：2014-01-16

申请号：US14031620

申请日：2013-09-19

申请人： Seung-Jun Bae ,  Kwang-II Park ,  Young-Soo Sohn ,  Young-Hyun Jun ,  Joo-Sun Choi ,  Tae-Young Oh

发明人： Seung-Jun Bae ,  Kwang-II Park ,  Young-Soo Sohn ,  Young-Hyun Jun ,  Joo-Sun Choi ,  Tae-Young Oh

IPC分类号： G06F11/10

CPC分类号： G06F11/1004 ,  H03M13/09

摘要： A memory system includes a memory controller and a memory device. The memory device exchanges data through a first channel with the memory controller, exchanges a first cyclic redundancy check (CRC) code associated with the data through a second channel with the memory controller, and receives a command/address packet including a second CRC code associated with a command/address from the memory controller through a third channel.

摘要翻译： 存储器系统包括存储器控制器和存储器件。 存储器件通过第一通道与存储器控制器交换数据，通过与存储器控制器的第二通道交换与数据相关联的第一循环冗余校验（CRC）代码，并且接收包括相关联的第二CRC码的命令/地址分组 具有来自存储器控制器的命令/地址通过第三通道。

公开(公告)号：US08437216B2

公开(公告)日：2013-05-07

申请号：US13270710

申请日：2011-10-11

申请人： Tae-Young Oh ,  Young-Soo Sohn ,  Seung-Jun Bae ,  Kwang-Il Park

发明人： Tae-Young Oh ,  Young-Soo Sohn ,  Seung-Jun Bae ,  Kwang-Il Park

IPC分类号： G11C8/00

CPC分类号： G11C7/22 ,  G11C7/1087 ,  G11C7/1093 ,  G11C2207/2254

摘要： Embodiments may be directed to a method of operating a semiconductor device, the method including receiving a first write training command, receiving a first write data responsive to the first write training command through a first data line, and transmitting the first write data through a second data line. Transmitting the first write data is performed without an additional training command.

摘要翻译： 实施例可以涉及一种操作半导体器件的方法，所述方法包括接收第一写入训练命令，响应于通过第一数据线的第一写入训练命令接收第一写入数据，以及通过第二数据线发送第一写入数据 数据线。 在不附加训练命令的情况下执行发送第一写入数据。

公开(公告)号：US20120313093A1

公开(公告)日：2012-12-13

申请号：US13490614

申请日：2012-06-07

申请人： Hwan Kim ,  Heung-Lyul Cho ,  Tae-Young Oh ,  Ji-Eun Jung

发明人： Hwan Kim ,  Heung-Lyul Cho ,  Tae-Young Oh ,  Ji-Eun Jung

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/7869 ,  H01L21/00 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/24 ,  H01L29/66765

摘要： An oxide thin film transistor (TFT) and a fabrication method thereof are provided. First and second data wirings are made of different metal materials, and an active layer is formed on the first data wiring to implement a short channel, thus enhancing performance of the TFT. The first data wiring in contact with the active layer is made of a metal material having excellent contact characteristics and the other remaining second data wiring is made of a metal material having excellent conductivity, so as to be utilized to a large-scale oxide TFT process. Also, the first and second data wirings may be formed together by using half-tone exposure, simplifying the process.

摘要翻译： 提供一种氧化物薄膜晶体管（TFT）及其制造方法。 第一和第二数据布线由不同的金属材料制成，并且在第一数据布线上形成有源层以实现短沟道，从而提高TFT的性能。 与有源层接触的第一数据布线由具有优异接触特性的金属材料制成，而其余的第二数据布线由具有优良导电性的金属材料制成，以用于大规模氧化物TFT工艺 。 此外，可以通过使用半色调曝光来一起形成第一和第二数据布线，从而简化了处理。

公开(公告)号：US20110114892A1

公开(公告)日：2011-05-19

申请号：US13055853

申请日：2009-07-30

申请人： Ki Won Jun ,  Seung-Chan Baek ,  Jong Wook Bae ,  Keh-Sik Min ,  Seok-Lyong Song ,  Tae-Young Oh

发明人： Ki Won Jun ,  Seung-Chan Baek ,  Jong Wook Bae ,  Keh-Sik Min ,  Seok-Lyong Song ,  Tae-Young Oh

IPC分类号： C01B3/38 ,  B01J21/02 ,  B01J37/08 ,  B01J37/02

CPC分类号： B01J23/83 ,  B01J21/10 ,  B01J23/002 ,  B01J23/22 ,  B01J23/31 ,  B01J35/002 ,  B01J35/006 ,  B01J37/0201 ,  B01J37/0205 ,  B01J37/0207 ,  C01B3/40 ,  C01B2203/0233 ,  C01B2203/0238 ,  C01B2203/0283 ,  C01B2203/061 ,  C01B2203/062 ,  C01B2203/1058 ,  C01B2203/1082 ,  C01B2203/1094 ,  C01B2203/1241 ,  C07C29/1518 ,  Y02P20/52 ,  C07C31/04

摘要： Disclosed are a catalyst for preparing synthesis gas from natural gas and carbon dioxide, and a method for preparing the same. More particularly, a combined reforming process is performed as an economical way of using carbon dioxide, wherein steam reforming of natural gas is carried out simultaneously with carbon dioxide reforming of methane in such a manner that a predetermined ratio of carbon monoxide/carbon dioxide/hydrogen (H2/(2CO+3CO2)=0.85-1.15) is maintained. In this manner, the catalyst is used to prepare synthesis gas suitable for methanol synthesis and Fischer-Tropsch synthesis. Disclosed also is a method for preparing synthesis gas on a specific catalyst consisting of Ni/Ce/MgAlOx or Ni/Ce—Zr/MgAlOx. The catalyst is inhibited from deactivation caused by generation of cokes during the reaction as well as deactivation caused by reoxidation of nickel with water added during the reaction. Therefore, the catalyst shows excellent activity as compared to other catalysts for use in combined reforming.

摘要翻译： 公开了从天然气和二氧化碳制备合成气的催化剂及其制备方法。 更具体地，作为使用二氧化碳的经济方法进行组合重整方法，其中天然气的蒸汽重整与甲烷的二氧化碳重整同时进行，使得一氧化碳/二氧化碳/氢气的预定比例 （H2 /（2CO + 3CO2）= 0.85-1.15）。 以这种方式，催化剂用于制备适用于甲醇合成和费 - 托合成的合成气。 还公开了在由Ni / Ce / MgAlO x或Ni / Ce-Zr / MgAlO x组成的特定催化剂上制备合成气的方法。 催化剂被抑制在反应期间由焦炭产生引起的失活以及由反应期间加入的水的镍再氧化引起的失活。 因此，与用于组合重整的其它催化剂相比，催化剂显示出优异的活性。

公开(公告)号：US08524119B2

公开(公告)日：2013-09-03

申请号：US13055853

申请日：2009-07-30

申请人： Ki Won Jun ,  Seung-Chan Baek ,  Jong Wook Bae ,  Keh-Sik Min ,  Seok-Lyong Song ,  Tae-Young Oh

发明人： Ki Won Jun ,  Seung-Chan Baek ,  Jong Wook Bae ,  Keh-Sik Min ,  Seok-Lyong Song ,  Tae-Young Oh

IPC分类号： C01B3/26

CPC分类号： B01J23/83 ,  B01J21/10 ,  B01J23/002 ,  B01J23/22 ,  B01J23/31 ,  B01J35/002 ,  B01J35/006 ,  B01J37/0201 ,  B01J37/0205 ,  B01J37/0207 ,  C01B3/40 ,  C01B2203/0233 ,  C01B2203/0238 ,  C01B2203/0283 ,  C01B2203/061 ,  C01B2203/062 ,  C01B2203/1058 ,  C01B2203/1082 ,  C01B2203/1094 ,  C01B2203/1241 ,  C07C29/1518 ,  Y02P20/52 ,  C07C31/04

摘要： Disclosed are a catalyst for preparing synthesis gas from natural gas and carbon dioxide, and a method for preparing the same. More particularly, a combined reforming process is performed as an economical way of using carbon dioxide, wherein steam reforming of natural gas is carried out simultaneously with carbon dioxide reforming of methane in such a manner that a predetermined ratio of carbon monoxide/carbon dioxide/hydrogen (H2/(2CO+3CO2)=0.85-1.15) is maintained. In this manner, the catalyst is used to prepare synthesis gas suitable for methanol synthesis and Fischer-Tropsch synthesis. Disclosed also is a method for preparing synthesis gas on a specific catalyst consisting of Ni/Ce/MgAlOx or Ni/Ce-Zr/MgAlOx. The catalyst is inhibited from deactivation caused by generation of cokes during the reaction as well as deactivation caused by reoxidation of nickel with water added during the reaction. Therefore, the catalyst shows excellent activity as compared to other catalysts for use in combined reforming.

摘要翻译： 公开了从天然气和二氧化碳制备合成气的催化剂及其制备方法。 更具体地，作为使用二氧化碳的经济方法进行组合重整方法，其中天然气的蒸汽重整与甲烷的二氧化碳重整同时进行，使得一氧化碳/二氧化碳/氢气的预定比例 （H2 /（2CO + 3CO2）= 0.85-1.15）。 以这种方式，催化剂用于制备适用于甲醇合成和费 - 托合成的合成气。 还公开了在由Ni / Ce / MgAlO x或Ni / Ce-Zr / MgAlO x组成的特定催化剂上制备合成气的方法。 催化剂被抑制在反应期间由焦炭产生引起的失活以及由反应期间加入的水的镍再氧化引起的失活。 因此，与用于组合重整的其它催化剂相比，催化剂显示出优异的活性。

公开(公告)号：US20110158011A1

公开(公告)日：2011-06-30

申请号：US12948193

申请日：2010-11-17

申请人： Tae-Young Oh ,  Seung-Jun Bae ,  Kwnag-Il Park

发明人： Tae-Young Oh ,  Seung-Jun Bae ,  Kwnag-Il Park

IPC分类号： G11C7/10 ,  G11C7/22

CPC分类号： G11C7/10 ,  G11C7/02

摘要： A memory interface circuit is provided, comprising: a first signal output circuit configured to output a first signal via a first signal line to a first I/O terminal; a second signal output circuit configured to output a second signal via a second signal line to a second I/O terminal; and a noise cancellation circuit having at least one phase adjusting element and at least one gain adjusting element to reduce a noise signal induced on the second signal line due to the presence of the first signal on the first signal line, wherein the second signal line is disposed adjacent to the first signal line.

摘要翻译： 提供了一种存储器接口电路，包括：第一信号输出电路，被配置为经由第一信号线将第一信号输出到第一I / O端子; 第二信号输出电路，被配置为经由第二信号线将第二信号输出到第二I / O端子; 以及噪声消除电路，其具有至少一个相位调整元件和至少一个增益调整元件，以减少由于在第一信号线上存在第一信号而在第二信号线上感应到的噪声信号，其中第二信号线是 设置在第一信号线附近。

公开(公告)号：US09059296B2

公开(公告)日：2015-06-16

申请号：US13490614

申请日：2012-06-07

申请人： Hwan Kim ,  Heung-Lyul Cho ,  Tae-Young Oh ,  Ji-Eun Jung

发明人： Hwan Kim ,  Heung-Lyul Cho ,  Tae-Young Oh ,  Ji-Eun Jung

IPC分类号： H01L29/10 ,  H01L29/786 ,  H01L27/12 ,  H01L21/00 ,  H01L29/24 ,  H01L29/66

CPC分类号： H01L29/7869 ,  H01L21/00 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/24 ,  H01L29/66765

摘要： An oxide thin film transistor (TFT) and a fabrication method thereof are provided. First and second data wirings are made of different metal materials, and an active layer is formed on the first data wiring to implement a short channel, thus enhancing performance of the TFT. The first data wiring in contact with the active layer is made of a metal material having excellent contact characteristics and the other remaining second data wiring is made of a metal material having excellent conductivity, so as to be utilized to a large-scale oxide TFT process. Also, the first and second data wirings may be formed together by using half-tone exposure, simplifying the process.

摘要翻译： 提供一种氧化物薄膜晶体管（TFT）及其制造方法。 第一和第二数据布线由不同的金属材料制成，并且在第一数据布线上形成有源层以实现短沟道，从而提高TFT的性能。 与有源层接触的第一数据布线由具有优异接触特性的金属材料制成，而其余的第二数据布线由具有优良导电性的金属材料制成，以用于大规模氧化物TFT工艺 。 此外，可以通过使用半色调曝光来一起形成第一和第二数据布线，从而简化了处理。

公开(公告)号：US08395955B2

公开(公告)日：2013-03-12

申请号：US12948193

申请日：2010-11-17

申请人： Tae-Young Oh ,  Seung-Jun Bae ,  Kwnag-Il Park

发明人： Tae-Young Oh ,  Seung-Jun Bae ,  Kwnag-Il Park

IPC分类号： G11C7/02

CPC分类号： G11C7/10 ,  G11C7/02

摘要： A memory interface circuit is provided, comprising: a first signal output circuit configured to output a first signal via a first signal line to a first I/O terminal; a second signal output circuit configured to output a second signal via a second signal line to a second I/O terminal; and a noise cancellation circuit having at least one phase adjusting element and at least one gain adjusting element to reduce a noise signal induced on the second signal line due to the presence of the first signal on the first signal line, wherein the second signal line is disposed adjacent to the first signal line.

摘要翻译： 提供了一种存储器接口电路，包括：第一信号输出电路，被配置为经由第一信号线将第一信号输出到第一I / O端子; 第二信号输出电路，被配置为经由第二信号线将第二信号输出到第二I / O端子; 以及噪声消除电路，其具有至少一个相位调整元件和至少一个增益调整元件，以减少由于在第一信号线上存在第一信号而在第二信号线上感应到的噪声信号，其中第二信号线是 设置在第一信号线附近。