利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

42 条记录 (耗时 0.044 秒)

    CMOS image sensor system with self-reset digital pixel architecture for improving SNR and dynamic range
    1.
    发明授权
    CMOS image sensor system with self-reset digital pixel architecture for improving SNR and dynamic range 有权
    CMOS图像传感器系统具有自复位数字像素架构，可提高SNR和动态范围

    公开(公告)号：US06927796B2

    公开(公告)日：2005-08-09

    申请号：US09962804

    申请日：2001-09-24

    申请人： Xinqiao Liu ,  Suk Hwan Lim ,  Abbas El Gamal

    发明人： Xinqiao Liu ,  Suk Hwan Lim ,  Abbas El Gamal

    IPC分类号： H04N5/355 ,  H04N5/361 ,  H04N5/363 ,  H04N5/365 ,  H04N5/374 ,  H04N5/335

    CPC分类号： H04N5/37455 ,  H04N5/3535

    摘要： A CMOS DPS image sensor architecture for improving SNR and dynamic range is presented. The CMOS DPS architecture includes self-reset digital pixels capable of collecting more charge than the physical well capacity. A method for improving SNR without reducing dynamic range in a CMOS video sensor system under low illumination is described, wherein the CMOS video sensor system employing self-reset DPS architecture includes pixel level A/D conversion and wherein each DPS pixels is capable of resetting itself whenever a corresponding diode reaches saturation during integration time.

    摘要翻译： 提出了一种用于提高SNR和动态范围的CMOS DPS图像传感器架构。 CMOS DPS架构包括能够收集比物理井容量更多的电荷的自复位数字像素。 描述了一种用于在低照度下在CMOS视频传感器系统中改善SNR而不减少动态范围的方法，其中采用自复位DPS架构的CMOS视频传感器系统包括像素级A / D转换，并且其中每个DPS像素能够重置自身 每当相应的二极管在积分时间内达到饱和。

    Photocurrent estimation from multiple captures for simultaneous SNR and dynamic range improvement in CMOS image sensors
    2.
    发明授权
    Photocurrent estimation from multiple captures for simultaneous SNR and dynamic range improvement in CMOS image sensors 有权

    公开(公告)号：US07009636B2

    公开(公告)日：2006-03-07

    申请号：US09992479

    申请日：2001-11-13

    申请人： Xinqiao Liu ,  Abbas El Gamal

    发明人： Xinqiao Liu ,  Abbas El Gamal

    IPC分类号： H04N3/14

    CPC分类号： H04N5/23264 ,  H04N5/23248 ,  H04N5/23254 ,  H04N5/235 ,  H04N5/2355

    摘要： The dynamic range and the noise immunity of a digital imaging system are increased by basing an estimate of the illumination on a sensor on a series of measurements of the accumulated illumination at intervals within an exposure period. The measuring may occur destructively, or alternatively the photocurrent of the sensor may continue to accumulate over the exposure period. The estimate may use statistical signal processing of the measurements, based on various noise models and various optimization criteria. The estimate may be computed recursively over the multiplicity of measurements, using a set of recursive values that may include but is not limited to the estimated illumination, a current weighting coefficient, a variance of the current measurement and a variance over the series of measurements.

    Method for improving SNR in low illumination conditions in a CMOS video sensor system using a self-resetting digital pixel
    4.
    发明授权
    Method for improving SNR in low illumination conditions in a CMOS video sensor system using a self-resetting digital pixel 有权
    在使用自复位数字像素的CMOS视频传感器系统中在低照度条件下改善SNR的方法

    公开(公告)号：US06963370B2

    公开(公告)日：2005-11-08

    申请号：US09962847

    申请日：2001-09-24

    申请人： Jeffrey M. DiCarlo ,  Xinqiao Liu ,  Brian Wandell ,  Abbas El Gamal

    发明人： Jeffrey M. DiCarlo ,  Xinqiao Liu ,  Brian Wandell ,  Abbas El Gamal

    IPC分类号： H04N5/353 ,  H04N5/355 ,  H04N5/361 ,  H04N5/363 ,  H04N5/374 ,  H04N5/3745 ,  H04N3/14

    CPC分类号： H04N5/37455 ,  H04N5/35545 ,  H04N5/363

    摘要： A method for improving SNR without reducing dynamic range in a CMOS video sensor system under low illumination is described, wherein the CMOS video sensor system employing self-reset DPS architecture includes pixel level A/D conversion and wherein each DPS pixels is capable of resetting itself whenever a corresponding diode reaches saturation during integration time, the method comprising the steps of eliminating global frame reset for the self-reset DPS pixels, capturing and storing a plurality of frames, extending integration time beyond frame readout time, and generating frame images using one or more previously stored frames.

    摘要翻译： 描述了一种用于在低照度下在CMOS视频传感器系统中改善SNR而不减少动态范围的方法，其中采用自复位DPS架构的CMOS视频传感器系统包括像素级A / D转换，并且其中每个DPS像素能够重置自身 每当对应的二极管在积分时间期间达到饱和时，该方法包括以下步骤：消除自复位DPS像素的全局帧复位，捕获和存储多个帧，将积分时间延长超出帧读出时间，并使用一个 或更多以前存储的帧。

    Thin and thick gate oxide transistors on a functional block of a CMOS circuit residing within the core of an IC chip
    5.
    发明授权
    Thin and thick gate oxide transistors on a functional block of a CMOS circuit residing within the core of an IC chip 有权
    位于IC芯片核心内的CMOS电路的功能块上的薄厚栅极氧化物晶体管

    公开(公告)号：US06642543B1

    公开(公告)日：2003-11-04

    申请号：US09670484

    申请日：2000-09-26

    申请人： Abbas El Gamal ,  Xinqiao Liu ,  Sukhwan Lim

    发明人： Abbas El Gamal ,  Xinqiao Liu ,  Sukhwan Lim

    IPC分类号： H01L2904

    CPC分类号： H01L27/0922

    摘要： A functional block for a CMOS circuit within the core of an integrated circuit chip and a method of making the same is disclosed. The functional block uses both thick and thin gate oxide transistors which reduces the leakage current and increases the voltage swing while permitting the device scaling in circuits made in CMOS technology. Within the functional block, the distance between a thick oxide transistor and a thin oxide transistor is chosen based on a transistor stability criterion. The thick and thin oxide transistors can be connected to identical or different voltage sources. Further, a transistor within a functional block can be chosen to be thick or thin oxide transistor based on a leakage current threshold or a voltage swing threshold.

    摘要翻译： 公开了用于集成电路芯片的核心内的CMOS电路的功能块及其制造方法。 功能块使用厚和薄的栅极氧化物晶体管，其减少了泄漏电流并且增加了电压摆幅，同时允许在CMOS技术中制造的电路中的器件缩放。 在功能块内，基于晶体管稳定性标准来选择厚氧化物晶体管和薄氧化物晶体管之间的距离。 厚和薄的氧化物晶体管可以连接到相同或不同的电压源。 此外，可以基于漏电流阈值或电压摆幅阈值将功能块内的晶体管选择为厚的或薄的氧化物晶体管。

    Biological analysis arrangement and approach therefor
    7.
    发明授权
    Biological analysis arrangement and approach therefor 有权
    生物分析安排及方法

    公开(公告)号：US08023113B2

    公开(公告)日：2011-09-20

    申请号：US12418983

    申请日：2009-04-06

    申请人： Abbas El Gamal ,  Helmy Eltoukhy ,  Khaled Salama

    发明人： Abbas El Gamal ,  Helmy Eltoukhy ,  Khaled Salama

    IPC分类号： G01N21/00

    CPC分类号： C12Q1/66 ,  B01L3/5027 ,  B01L3/502715 ,  B01L2300/0654 ,  B01L2300/0819 ,  B01L2300/0877 ,  B01L2300/1822 ,  G01N21/253 ,  G01N21/6454

    摘要： Characteristics of a chemical or biological sample are detected using an approach involving light detection. According to an example embodiment of the present invention, an assaying arrangement including a light detector is adapted to detect light from a sample, such as a biological material. A signal corresponding to the detected light is used to characterize the sample, for example, by detecting a light-related property thereof. In one implementation, the assaying arrangement includes integrated circuitry having a light detector and a programmable processor, with the light detector generating a signal corresponding to the light and sending the signal to the processor. The processor provides an output corresponding to the signal and indicative of a characteristic of the sample.

    摘要翻译： 使用涉及光检测的方法检测化学或生物样品的特征。 根据本发明的示例性实施例，包括光检测器的测定装置适于检测来自诸如生物材料的样品的光。 使用与检测到的光对应的信号来表征样品，例如通过检测其与光的相关性。 在一个实现中，测定装置包括具有光检测器和可编程处理器的集成电路，光检测器产生对应于光的信号并将信号发送到处理器。 处理器提供对应于信号的输出并指示样本的特性。

    Biological analysis arrangement and approach therefor
    8.
    发明授权
    Biological analysis arrangement and approach therefor 有权
    生物分析安排及方法

    公开(公告)号：US07595883B1

    公开(公告)日：2009-09-29

    申请号：US10663935

    申请日：2003-09-16

    申请人： Abbas El Gamal ,  Helmy Eltoukhy ,  Khaled Salama

    发明人： Abbas El Gamal ,  Helmy Eltoukhy ,  Khaled Salama

    IPC分类号： G01N21/00

    CPC分类号： C12Q1/66 ,  B01L3/5027 ,  B01L3/502715 ,  B01L2300/0654 ,  B01L2300/0819 ,  B01L2300/0877 ,  B01L2300/1822 ,  G01N21/253 ,  G01N21/6454

    摘要： Characteristics of a chemical or biological sample are detected using an approach involving light detection. According to an example embodiment of the present invention, an assaying arrangement including a light detector is adapted to detect light from a sample, such as a biological material. A signal corresponding to the detected light is used to characterize the sample, for example, by detecting a light-related property thereof. In one implementation, the assaying arrangement includes integrated circuitry having a light detector and a programmable processor, with the light detector generating a signal corresponding to the light and sending the signal to the processor. The processor provides an output corresponding to the signal and indicative of a characteristic of the sample.

    摘要翻译： 使用涉及光检测的方法检测化学或生物样品的特征。 根据本发明的示例性实施例，包括光检测器的测定装置适于检测来自诸如生物材料的样品的光。 使用与检测到的光对应的信号来表征样品，例如通过检测其与光的相关性。 在一个实现中，测定装置包括具有光检测器和可编程处理器的集成电路，光检测器产生对应于光的信号并将信号发送到处理器。 处理器提供对应于信号的输出并指示样本的特性。

    Reconfigurable programmable interconnect architecture
    10.
    发明授权
    Reconfigurable programmable interconnect architecture 失效
    可重构可编程互连架构

    公开(公告)号：US5510730A

    公开(公告)日：1996-04-23

    申请号：US493137

    申请日：1995-06-21

    申请人： Abbas El Gamal ,  Steve S. S. Chiang

    发明人： Abbas El Gamal ,  Steve S. S. Chiang

    IPC分类号： G01R31/28 ,  G01R31/3185 ,  H01L25/00 ,  H03K19/177

    CPC分类号： G01R31/2884 ,  G01R31/318516 ,  G01R31/318519 ,  H03K19/17704 ,  H03K19/17736

    摘要： A user-programmable interconnect architecture, which may be used for logic arrays for digital and analog system design, is disclosed. In one embodiment, a plurality of logic cells or modules in a matrix are connected by vertical and horizontal wiring channels. The wiring channels may in turn be programmed by the user to interconnect the various logic cells to implement the required logic function. The wiring channels comprise wiring segments connected by normally open reconfigurable programmable elements situated at the intersection of any two segments to be connected.

    摘要翻译： 公开了可用于数字和模拟系统设计的逻辑阵列的用户可编程互连体系结构。 在一个实施例中，矩阵中的多个逻辑单元或模块通过垂直和水平布线通道连接。 接线通道可以由用户编程，以互连各种逻辑单元以实现所需的逻辑功能。 布线通道包括通过常开的可重新配置的可编程元件连接的布线段，这些可编程元件位于要连接的任何两个段的交点。