公开(公告)号：US07045877B2

公开(公告)日：2006-05-16

申请号：US10420740

申请日：2003-04-23

申请人： Yasunari Umemoto ,  Hideyuki Ono ,  Tomonori Tanoue ,  Yasuo Ohsone ,  Isao Ohbu ,  Chushiro Kusano ,  Atsushi Kurokawa ,  Masao Yamane

发明人： Yasunari Umemoto ,  Hideyuki Ono ,  Tomonori Tanoue ,  Yasuo Ohsone ,  Isao Ohbu ,  Chushiro Kusano ,  Atsushi Kurokawa ,  Masao Yamane

IPC分类号： H01L31/072

CPC分类号： H01L27/0825 ,  H01L27/0259 ,  H01L29/7371 ,  H01L2224/48091 ,  H01L2224/73265 ,  H03K17/08146 ,  H03K17/615 ,  H01L2924/00014

摘要： The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.

摘要翻译： 本发明旨在提高对半导体器件的破坏性。 具有连接在高输出的放大电路的输出（集电极和发射极）之间的达林顿的多个双极晶体管的保护电路与放大电路并联电连接。 放大电路具有彼此并联连接的多个单元HBT（异质结双极晶体管）。 保护电路具有包括具有多个双极型晶体管Q 1至Q 5的第一组保护电路和具有多个双极晶体管的第二组保护电路的两级配置。

公开(公告)号：US20060157825A1

公开(公告)日：2006-07-20

申请号：US11376116

申请日：2006-03-16

申请人： Yasunari Umemoto ,  Hideyuki Ono ,  Tomonori Tanoue ,  Yasuo Ohsone ,  Isao Ohbu ,  Chushiro Kusano ,  Atsushi Kurokawa ,  Masao Yamane

发明人： Yasunari Umemoto ,  Hideyuki Ono ,  Tomonori Tanoue ,  Yasuo Ohsone ,  Isao Ohbu ,  Chushiro Kusano ,  Atsushi Kurokawa ,  Masao Yamane

IPC分类号： H01L27/082

CPC分类号： H01L27/0825 ,  H01L27/0259 ,  H01L29/7371 ,  H01L2224/48091 ,  H01L2224/73265 ,  H03K17/08146 ,  H03K17/615 ,  H01L2924/00014

摘要： The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.

摘要翻译： 本发明旨在提高对半导体器件的破坏性。 具有连接在高输出的放大电路的输出（集电极和发射极）之间的达林顿的多个双极晶体管的保护电路与放大电路并联电连接。 放大电路具有彼此并联连接的多个单元HBT（异质结双极晶体管）。 保护电路具有包括具有多个双极型晶体管Q 1至Q 5的第一组保护电路和具有多个双极晶体管的第二组保护电路的两级配置。

公开(公告)号：US06943387B2

公开(公告)日：2005-09-13

申请号：US10409455

申请日：2003-04-09

申请人： Isao Ohbu ,  Tomonori Tanoue ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa ,  Kazuhiro Mochizuki ,  Masami Ohnishi ,  Hidetoshi Matsumoto

发明人： Isao Ohbu ,  Tomonori Tanoue ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa ,  Kazuhiro Mochizuki ,  Masami Ohnishi ,  Hidetoshi Matsumoto

IPC分类号： H01L21/331 ,  H01L29/06 ,  H01L29/423 ,  H01L29/737 ,  H03F1/30 ,  H03F3/19 ,  H01L31/072

CPC分类号： H01L29/66318 ,  H01L29/0692 ,  H01L29/42304 ,  H01L29/7371 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16152 ,  H03F1/302 ,  H03F3/19 ,  H03F2203/21178

摘要： In a semiconductor device using an emitter top heterojunction bipolar transistor having a planar shape in a ring-like shape, a structure is provided in which a base electrode is present only on an inner side of a ring-like emitter-base junction region. This allows reduction of base/collector junction capacitance per unit emitter area, whereby a semiconductor device having high power adding efficiency and high power gain suitable for a power amplifier can be realized. Further, in a multistage power amplifier including first and second amplifier circuits each having one or more of bipolar transistors, a bipolar transistor in the first amplifier circuit uses an emitter having a planar shape in a rectangular shape, and a bipolar transistor in the second amplifier circuit uses an emitter having a ring-like shape and a base electrode only on the inner side of the emitter.

摘要翻译： 在使用具有环状形状的发射极顶面异质结双极晶体管的半导体器件中，提供了仅在环状发射极 - 基极结区域的内侧存在基极的结构。 这允许减小每单位发射极面积的基极/集电极结电容，由此可以实现具有高功率增加效率和适用于功率放大器的高功率增益的半导体器件。 此外，在包括具有一个或多个双极晶体管的第一和第二放大器电路的多级功率放大器中，第一放大器电路中的双极晶体管使用具有矩形形状的平面形状的发射极和第二放大器中的双极晶体管 电路仅在发射体的内侧使用具有环状形状的发射体和基极。

公开(公告)号：US5019524A

公开(公告)日：1991-05-28

申请号：US401506

申请日：1989-08-30

申请人： Katsuhiko Mitani ,  Tomonori Tanoue ,  Chushiro Kusano ,  Masayoshi Kobayashi ,  Susumu Takahashi

发明人： Katsuhiko Mitani ,  Tomonori Tanoue ,  Chushiro Kusano ,  Masayoshi Kobayashi ,  Susumu Takahashi

IPC分类号： H01L29/205 ,  H01L21/331 ,  H01L29/10 ,  H01L29/73 ,  H01L29/737

CPC分类号： H01L29/66318 ,  H01L29/1004 ,  H01L29/7371 ,  Y10S148/01 ,  Y10S148/072 ,  Y10S148/084

摘要： Disclosed is a semiconductor device including a heterojunction bipolar transistor in which the front surface of a base layer and the surface of an emitter-base junction are covered with a high-resistivity layer of compound semiconductor containing at least one constituent element common to an emitter layer and the base layer.

公开(公告)号：US4979009A

公开(公告)日：1990-12-18

申请号：US415708

申请日：1989-09-29

申请人： Chushiro Kusano ,  Tomonori Tanoue ,  Katsuhiko Mitani

发明人： Chushiro Kusano ,  Tomonori Tanoue ,  Katsuhiko Mitani

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L29/205 ,  H01L29/737

CPC分类号： H01L29/7371

摘要： 2A heterojunction bipolar transistor is disclosed in which a region of a base layer which extends in the vicinity of the interface between the base layer and an emitter layer is doped with an impurity at a higher concentration than that in the inside of the base layer to thereby form a built-in field by which carriers injected from the emitter are caused to drift to the inside of the base layer. In the transistor having this structure, the current gain does not depend on the emitter area, and it is possible to obtain a large current gain with a small emitter area.

摘要翻译： 2A公开了其中在基极层和发射极层之间的界面附近延伸的基极层的区域以比基底层内侧的浓度更高的浓度掺杂杂质的异质结双极晶体管，由此 形成内置的场，通过该场，使从发射器注入的载流子漂移到基层的内部。 在具有这种结构的晶体管中，电流增益不取决于发射极面积，并且可以获得具有小发射极面积的大电流增益。

公开(公告)号：US07368988B2

公开(公告)日：2008-05-06

申请号：US11489609

申请日：2006-07-20

申请人： Hidetoshi Matsumoto ,  Tomonori Tanoue ,  Isao Ohbu

发明人： Hidetoshi Matsumoto ,  Tomonori Tanoue ,  Isao Ohbu

IPC分类号： H03G5/16

CPC分类号： H03G3/3042 ,  H03F1/30 ,  H03F3/189 ,  H03F3/68 ,  H03G3/3047

摘要： In a base-bias-control-type high-frequency power amplifier with a plural stage configuration, a rising voltage of a base bias current supplied to an initial stage transistor is made lower than a rising voltage of a base bias current supplied to a second stage transistor by a bias circuit, and a difference between the both voltages is set to be smaller than a base-emitter voltage of an amplifying stage transistor. Also, a rising voltage of a base bias current supplied to a third stage transistor is made equal to the rising voltage of the base bias current supplied to an initial stage transistor. Accordingly, a technology capable of improving the power control linearity can be provided in a high-frequency power amplifier used in a polar-loop transmitter or the like.

摘要翻译： 在具有多级配置的基极偏置控制型高频功率放大器中，使提供给初级级晶体管的基极偏置电流的上升电压低于提供给第二级的基极偏置电流的上升电压 并且两个电压之间的差被设置为小于放大级晶体管的基极 - 发射极电压。 此外，使提供给第三级晶体管的基极偏置电流的上升电压等于提供给初级晶体管的基极偏置电流的上升电压。 因此，能够提高功率控制线性度的技术能够在用于极环回路发送机等的高频功率放大器中提供。

公开(公告)号：US20060081879A1

公开(公告)日：2006-04-20

申请号：US11247234

申请日：2005-10-12

申请人： Kenichi Tanaka ,  Hidetoshi Matsumoto ,  Isao Ohbu ,  Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chisaki Takubo ,  Hiroyuki Uchiyama

发明人： Kenichi Tanaka ,  Hidetoshi Matsumoto ,  Isao Ohbu ,  Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chisaki Takubo ,  Hiroyuki Uchiyama

IPC分类号： H01L31/109

CPC分类号： H01L23/482 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor device which comprises active components, passive components, wiring lines and electrodes and are satisfactory in terms of mechanical strength, miniaturization and thermal stability. In the semiconductor device, openings are formed just below active components. These openings are filled with conductor layers. Conductor layers are also formed where openings are not formed.

摘要翻译： 本发明提供一种半导体器件，其包括有源部件，无源部件，布线和电极，并且在机械强度，小型化和热稳定性方面令人满意。 在半导体器件中，开口形成在活性部件的正下方。 这些开口填充有导体层。 还形成了未形成开口的导体层。

公开(公告)号：US07547929B2

公开(公告)日：2009-06-16

申请号：US11247234

申请日：2005-10-12

申请人： Kenichi Tanaka ,  Hidetoshi Matsumoto ,  Isao Ohbu ,  Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chisaki Takubo ,  Hiroyuki Uchiyama

发明人： Kenichi Tanaka ,  Hidetoshi Matsumoto ,  Isao Ohbu ,  Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chisaki Takubo ,  Hiroyuki Uchiyama

IPC分类号： H01L29/40

CPC分类号： H01L23/482 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor device which comprises active components, passive components, wiring lines and electrodes and are satisfactory in terms of mechanical strength, miniaturization and thermal stability. In the semiconductor device, openings are formed just below active components. These openings are filled with conductor layers. Conductor layers are also formed where openings are not formed.

摘要翻译： 本发明提供一种半导体器件，其包括有源部件，无源部件，布线和电极，并且在机械强度，小型化和热稳定性方面令人满意。 在半导体器件中，开口形成在活性部件的正下方。 这些开口填充有导体层。 还形成了未形成开口的导体层。

公开(公告)号：US20070046370A1

公开(公告)日：2007-03-01

申请号：US11489609

申请日：2006-07-20

申请人： Hidetoshi Matsumoto ,  Tomonori Tanoue ,  Isao Ohbu

发明人： Hidetoshi Matsumoto ,  Tomonori Tanoue ,  Isao Ohbu

IPC分类号： H03G3/10

CPC分类号： H03G3/3042 ,  H03F1/30 ,  H03F3/189 ,  H03F3/68 ,  H03G3/3047

摘要： In a base-bias-control-type high-frequency power amplifier with a plural stage configuration, a rising voltage of a base bias current supplied to an initial stage transistor is made lower than a rising voltage of a base bias current supplied to a second stage transistor by a bias circuit, and a difference between the both voltages is set to be smaller than a base-emitter voltage of an amplifying stage transistor. Also, a rising voltage of a base bias current supplied to a third stage transistor is made equal to the rising voltage of the base bias current supplied to an initial stage transistor. Accordingly, a technology capable of improving the power control linearity can be provided in a high-frequency power amplifier used in a polar-loop transmitter or the like.

摘要翻译： 在具有多级配置的基极偏置控制型高频功率放大器中，使提供给初级级晶体管的基极偏置电流的上升电压低于提供给第二级的基极偏置电流的上升电压 并且两个电压之间的差被设置为小于放大级晶体管的基极 - 发射极电压。 此外，使提供给第三级晶体管的基极偏置电流的上升电压等于提供给初级晶体管的基极偏置电流的上升电压。 因此，能够提高功率控制线性度的技术能够在用于极环回路发送机等的高频功率放大器中提供。

公开(公告)号：US07067857B2

公开(公告)日：2006-06-27

申请号：US10788277

申请日：2004-03-01

申请人： Kazuhiro Mochizuki ,  Isao Ohbu ,  Tomonori Tanoue ,  Chisaki Takubo ,  Kenichi Tanaka

发明人： Kazuhiro Mochizuki ,  Isao Ohbu ,  Tomonori Tanoue ,  Chisaki Takubo ,  Kenichi Tanaka

IPC分类号： H01L29/739 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L27/0823 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/7371 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/16152 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2224/05599

摘要： The gist of the present invention is as follows: In a monolithic microwave integrate circuit (MMIC) using a heterojunction bipolar transistor (HBT), via holes are respectively formed from the bottom of the MMIC for the emitter, base and collector. Of the via holes, one is located so as to face the HBT. The respective topside electrodes for the other via holes located so as not to face the HBT are provided in contact with the MMIC substrate.

摘要翻译： 本发明的要点如下：在使用异质结双极晶体管（HBT）的单片微波积分电路（MMIC）中，从MMIC的底部分别形成用于发射极，基极和集电极的通孔。 通孔中的一个位于与HBT相对的位置。 用于不与HBT相对的另一个通孔的相应顶侧电极设置成与MMIC衬底接触。