LIGHT EMITTING DIODE CHIP HAVING ELECTRODE PAD
    2.
    发明申请
    LIGHT EMITTING DIODE CHIP HAVING ELECTRODE PAD 有权
    具有电极板的发光二极管芯片

    公开(公告)号:US20130234192A1

    公开(公告)日:2013-09-12

    申请号:US13885777

    申请日:2011-02-28

    IPC分类号: H01L33/46

    摘要: Disclosed herein is an LED chip including electrode pads. The LED chip includes a semiconductor stack including a first conductive type semiconductor layer, a second conductive type semiconductor layer on the first conductive type semiconductor layer, and an active layer interposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a first electrode pad located on the second conductive type semiconductor layer opposite to the first conductive type semiconductor layer; a first electrode extension extending from the first electrode pad and connected to the first conductive type semiconductor layer; a second electrode pad electrically connected to the second conductive type semiconductor layer; and an insulation layer interposed between the first electrode pad and the second conductive type semiconductor layer. The LED chip includes the first electrode pad on the second conductive type semiconductor layer, thereby increasing a light emitting area.

    摘要翻译: 本文公开了包括电极焊盘的LED芯片。 LED芯片包括:第一导电型半导体层,第一导电型半导体层上的第二导电型半导体层和介于第一导电型半导体层和第二导电型半导体层之间的有源层的半导体堆叠; 位于与第一导电类型半导体层相对的第二导电类型半导体层上的第一电极焊盘; 从所述第一电极焊盘延伸并连接到所述第一导电型半导体层的第一电极延伸部; 电连接到第二导电类型半导体层的第二电极焊盘; 以及插入在第一电极焊盘和第二导电型半导体层之间的绝缘层。 LED芯片包括在第二导电类型半导体层上的第一电极焊盘,由此增加发光面积。

    Light emitting diode with improved luminous efficiency
    3.
    发明授权
    Light emitting diode with improved luminous efficiency 有权
    发光二极管,发光效率提高

    公开(公告)号:US08878220B2

    公开(公告)日:2014-11-04

    申请号:US13209765

    申请日:2011-08-15

    摘要: Exemplary embodiments of the present invention relate to light emitting diodes. A light emitting diode according to an exemplary embodiment of the present invention includes a substrate having a first side edge and a second side edge, and a light emitting structure arranged on the substrate. The light emitting structure includes a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer. A transparent electrode layer including a concave portion and a convex portion is arranged on the second conductivity-type semiconductor layer. A first electrode pad contacts an upper surface of the first conductivity-type semiconductor layer and is located near a center of the first side edge. Two second electrode pads are located near opposite distal ends of the second side edge to supply electric current to the second conductivity-type semiconductor layer. A first pad extension extends from the first electrode pad and a second pad extension extends from each of the two second electrode pads.

    摘要翻译: 本发明的示例性实施例涉及发光二极管。 根据本发明的示例性实施例的发光二极管包括具有第一侧边缘和第二侧边缘的基板和布置在基板上的发光结构。 发光结构包括第一导电型半导体层,有源层和第二导电型半导体层。 在第二导电型半导体层上配置有包含凹部和凸部的透明电极层。 第一电极焊盘接触第一导电类型半导体层的上表面并且位于第一侧边缘的中心附近。 两个第二电极焊盘位于第二侧边缘的相对的远端附近,以向第二导电类型半导体层提供电流。 第一焊盘延伸部从第一电极焊盘延伸,并且第二焊盘延伸部从两个第二电极焊盘中的每一个延伸。

    Light emitting diode having distributed Bragg reflector
    5.
    发明授权
    Light emitting diode having distributed Bragg reflector 有权
    具有分布式布拉格反射器的发光二极管

    公开(公告)号:US08373188B2

    公开(公告)日:2013-02-12

    申请号:US13100879

    申请日:2011-05-04

    IPC分类号: H01L33/00

    摘要: Exemplary embodiments of the present invention provide light-emitting diodes having a distributed Bragg reflector. A light-emitting diode (LED) according to an exemplary embodiment includes a light-emitting structure arranged on a first surface of a substrate, the light-emitting structure including a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer. A first distributed Bragg reflector is arranged on a second surface of the substrate opposite to the first surface, the first distributed Bragg reflector to reflect light emitted from the light-emitting structure. The first distributed Bragg reflector has a reflectivity of at least 90% with respect to light of a first wavelength in a blue wavelength range, light of a second wavelength in a green wavelength range, and light of a third wavelength in a red wavelength range. The first distributed Bragg reflector has a laminate structure having an alternately stacked SiO2 layer and Nb2O5 layer.

    摘要翻译: 本发明的示例性实施例提供了具有分布式布拉格反射器的发光二极管。 根据示例性实施例的发光二极管(LED)包括布置在基板的第一表面上的发光结构,所述发光结构包括第一导电类型半导体层,第二导电类型半导体层, 以及插入在第一导电型半导体层和第二导电型半导体层之间的有源层。 第一分布式布拉格反射器布置在基板的与第一表面相对的第二表面上,第一分布布拉格反射器用于反射从发光结构发射的光。 第一分布布拉格反射器相对于蓝色波长范围内的第一波长的光,绿色波长范围内的第二波长的光和红色波长范围内的第三波长的光具有至少90%的反射率。 第一分布布拉格反射器具有层叠结构,其具有交替层叠的SiO 2层和Nb 2 O 5层。

    3-D structured non-volatile memory device and method of manufacturing the same
    6.
    发明授权
    3-D structured non-volatile memory device and method of manufacturing the same 有权
    3-D结构化非易失性存储器件及其制造方法

    公开(公告)号:US08760934B2

    公开(公告)日:2014-06-24

    申请号:US13397024

    申请日:2012-02-15

    IPC分类号: G11C16/04

    CPC分类号: H01L27/11582

    摘要: A non-volatile memory device includes channel structures that each extend in a first direction, wherein the channel structures each include channel layers and interlayer dielectric layers that are alternately stacked; source structure extending in a second direction crossing the first direction and connected to ends of the channel structures, wherein the source structure includes source lines and interlayer dielectric layers that are alternately stacked; and word lines extending in the second direction and formed to surround the channel structures.

    摘要翻译: 非易失性存储器件包括各自沿第一方向延伸的通道结构,其中沟道结构各自包括交替层叠的沟道层和层间电介质层; 源结构在与第一方向交叉的第二方向上延伸并连接到沟道结构的端部,其中源结构包括交替层叠的源极线和层间电介质层; 以及在第二方向上延伸并形成为围绕通道结构的字线。

    Semiconductor memory device and method of operating the same
    7.
    发明授权
    Semiconductor memory device and method of operating the same 有权
    半导体存储器件及其操作方法

    公开(公告)号:US08520440B2

    公开(公告)日:2013-08-27

    申请号:US13297467

    申请日:2011-11-16

    IPC分类号: G11C16/04

    摘要: A method of operating a semiconductor memory device includes a memory array having memory cell strings including a first and a second memory cell groups having memory cells, a first and a second dummy elements, a drain select transistor and a source select transistor, wherein the first memory cell group and the second memory cell group are arranged between the drain select transistor and the source select transistor; connecting electrically the first memory cell group to the second memory cell group during a program operation or a read operation of the first memory cell group or the second memory cell group; and performing separately an erase operation of the first memory cell group and an erase operation of the second memory cell group, selecting simultaneously one of the first dummy element and the second dummy element during the erase operation of the selected memory cell group.

    摘要翻译: 一种操作半导体存储器件的方法包括具有存储单元串的存储器阵列,存储单元串包括具有存储单元的第一和第二存储单元组,第一和第二虚设元件,漏极选择晶体管和源选择晶体管,其中第一 存储单元组和第二存储单元组布置在漏极选择晶体管和源极选择晶体管之间; 在第一存储单元组或第二存储单元组的编程操作或读操作期间将第一存储单元组电连接到第二存储单元组; 以及分别执行第一存储单元组的擦除操作和第二存储单元组的擦除操作,在所选存储单元组的擦除操作期间同时选择第一虚拟元件和第二虚设元件中的一个。

    Method of manufacturing semiconductor device
    8.
    发明授权
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US07316955B2

    公开(公告)日:2008-01-08

    申请号:US11297917

    申请日:2005-12-09

    IPC分类号: H01L21/336

    摘要: A flash memory device and method of fabricating the same, wherein a width at the top of a floating gate is narrower than that at the bottom of the floating gate. The area of the floating gate can be reduced while maintaining the overlap area between the control gate and the floating gate. Therefore, inter-cell interference can be reduced without lowering program speed.

    摘要翻译: 一种闪存器件及其制造方法,其中浮置栅极顶部的宽度比浮置栅极底部处的宽度窄。 可以减小浮动栅极的面积,同时保持控制栅极和浮动栅极之间的重叠区域。 因此,可以降低小区间干扰而不降低程序速度。

    Flash memory device
    9.
    发明授权
    Flash memory device 有权
    闪存设备

    公开(公告)号:US07696554B2

    公开(公告)日:2010-04-13

    申请号:US11942227

    申请日:2007-11-19

    IPC分类号: H01L29/94

    摘要: A flash memory device and method of fabricating the same, wherein a width at the top of a floating gate is narrower than that at the bottom of the floating gate. The area of the floating gate can be reduced while maintaining the overlap area between the control gate and the floating gate. Therefore, inter-cell interference can be reduced without lowering program speed.

    摘要翻译: 一种闪存器件及其制造方法,其中浮置栅极顶部的宽度比浮置栅极底部处的宽度窄。 可以减小浮动栅极的面积,同时保持控制栅极和浮动栅极之间的重叠区域。 因此,可以降低小区间干扰而不降低程序速度。