Methods for low temperature conditioning of process chambers
    1.
    发明授权
    Methods for low temperature conditioning of process chambers 有权
    处理室低温调理方法

    公开(公告)号:US08658540B2

    公开(公告)日:2014-02-25

    申请号:US13156082

    申请日:2011-06-08

    IPC分类号: H01L21/306 B08B6/00 B44C1/22

    CPC分类号: H01L21/67115 H01L21/68742

    摘要: Methods for removing residue from interior surfaces of process chambers are provided herein. In some embodiments, a method of conditioning interior surfaces of a process chamber may include maintaining a process chamber at a first pressure and at a first temperature of less than about 800 degrees Celsius; providing a process gas to the process chamber at the first pressure and the first temperature, wherein the process gas comprises chlorine and nitrogen to remove residue disposed on interior surfaces of the process chamber; and increasing the pressure in the process chamber from the first pressure to a second pressure while continuing to provide the process gas to the process chamber.

    摘要翻译: 本文提供了从处理室内表面除去残留物的方法。 在一些实施例中,调节处理室的内表面的方法可以包括将处理室保持在小于约800摄氏度的第一压力和第一温度; 在所述第一压力和所述第一温度下向所述处理室提供工艺气体,其中所述工艺气体包括氯和氮以除去设置在所述处理室的内表面上的残留物; 以及将处理室中的压力从第一压力增加到第二压力,同时继续向处理室提供处理气体。

    METHOD FOR FORMING GROUP III/V CONFORMAL LAYERS ON SILICON SUBSTRATES
    2.
    发明申请
    METHOD FOR FORMING GROUP III/V CONFORMAL LAYERS ON SILICON SUBSTRATES 有权
    在硅基体上形成III / V族一体层的方法

    公开(公告)号:US20130256760A1

    公开(公告)日:2013-10-03

    申请号:US13436644

    申请日:2012-03-30

    IPC分类号: H01L29/267 H01L21/20

    摘要: A method for forming a conformal group III/V layer on a silicon substrate and the resulting substrate with the group III/V layers formed thereon. The method includes removing the native oxide from the substrate, positioning a substrate within a processing chamber, heating the substrate to a first temperature, cooling the substrate to a second temperature, flowing a group III precursor into the processing chamber, maintaining the second temperature while flowing a group III precursor and a group V precursor into the processing chamber until a conformal layer is formed, heating the processing chamber to an annealing temperature, while stopping the flow of the group III precursor, and cooling the processing chamber to the second temperature. Deposition of the III/V layer may be made selective through the use of halide gas etching which preferentially etches dielectric regions.

    摘要翻译: 一种在硅衬底上形成保形III / V层的方法,其上形成有III / V层的所得衬底。 该方法包括从衬底去除原生氧化物,将衬底定位在处理室内,将衬底加热至第一温度,将衬底冷却至第二温度,将III族前体流入处理室,保持第二温度,同时 将III族前体和V族前体流入处理室,直到形成共形层,同时停止III族前体的流动,将处理室加热至退火温度,并将处理室冷却至第二温度。 可以通过使用优先蚀刻电介质区域的卤化物气蚀刻来选择性地制备III / V层的沉积。

    Method for forming group III/V conformal layers on silicon substrates
    3.
    发明授权
    Method for forming group III/V conformal layers on silicon substrates 有权
    在硅衬底上形成III / V族共形层的方法

    公开(公告)号:US08603898B2

    公开(公告)日:2013-12-10

    申请号:US13436644

    申请日:2012-03-30

    摘要: A method for forming a conformal group III/V layer on a silicon substrate and the resulting substrate with the group III/V layers formed thereon. The method includes removing the native oxide from the substrate, positioning a substrate within a processing chamber, heating the substrate to a first temperature, cooling the substrate to a second temperature, flowing a group III precursor into the processing chamber, maintaining the second temperature while flowing a group III precursor and a group V precursor into the processing chamber until a conformal layer is formed, heating the processing chamber to an annealing temperature, while stopping the flow of the group III precursor, and cooling the processing chamber to the second temperature. Deposition of the III/V layer may be made selective through the use of halide gas etching which preferentially etches dielectric regions.

    摘要翻译: 一种在硅衬底上形成保形III / V层的方法,其上形成有III / V层的所得衬底。 该方法包括从衬底去除原生氧化物,将衬底定位在处理室内,将衬底加热至第一温度,将衬底冷却至第二温度,将III族前体流入处理室,保持第二温度,同时 将III族前体和V族前体流入处理室,直到形成共形层,同时停止III族前体的流动,将处理室加热至退火温度,并将处理室冷却至第二温度。 可以通过使用优先蚀刻电介质区域的卤化物气蚀刻来选择性地制备III / V层的沉积。

    Method and apparatus for gas delivery

    公开(公告)号:US09200367B2

    公开(公告)日:2015-12-01

    申请号:US13191008

    申请日:2011-07-26

    申请人: Zhiyuan Ye Yihwan Kim

    发明人: Zhiyuan Ye Yihwan Kim

    IPC分类号: C23C16/455 C23C16/448

    摘要: Methods and apparatus for gas delivery are disclosed herein. In some embodiments, a gas delivery system includes an ampoule for storing a precursor in solid or liquid form, a first conduit coupled to the ampoule and having a first end coupled to a first gas source to draw a vapor of the precursor from the ampoule into the first conduit, a second conduit coupled to the first conduit at a first junction located downstream of the ampoule and having a first end coupled to a second gas source and a second end coupled to a process chamber, and a heat source configured to heat the ampoule and at least a first portion of the first conduit from the ampoule to the second conduit and to heat only a second portion of the second conduit, wherein the second portion of the second conduit includes the first junction.

    EPITAXY OF HIGH TENSILE SILICON ALLOY FOR TENSILE STRAIN APPLICATIONS
    5.
    发明申请
    EPITAXY OF HIGH TENSILE SILICON ALLOY FOR TENSILE STRAIN APPLICATIONS 有权
    用于拉伸应变应变的高强度硅合金外延

    公开(公告)号:US20120202338A1

    公开(公告)日:2012-08-09

    申请号:US13193576

    申请日:2011-07-28

    IPC分类号: H01L21/20

    摘要: Embodiments of the present invention generally relate to methods for forming silicon epitaxial layers on semiconductor devices. The methods include forming a silicon epitaxial layer on a substrate at increased pressure and reduced temperature. The silicon epitaxial layer has a phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater, and is formed without the addition of carbon. A phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater increases the tensile strain of the deposited layer, and thus, improves channel mobility. Since the epitaxial layer is substantially free of carbon, the epitaxial layer does not suffer from film formation and quality issues commonly associated with carbon-containing epitaxial layers.

    摘要翻译: 本发明的实施例一般涉及在半导体器件上形成硅外延层的方法。 所述方法包括在增加的压力和降低的温度下在衬底上形成硅外延层。 硅外延层的磷浓度约为1×1021原子/立方厘米或更大,并且不添加碳形成。 大约1×1021原子/立方厘米或更大的磷浓度增加沉积层的拉伸应变,从而提高通道迁移率。 由于外延层基本上不含碳,外延层不会受到成膜和通常与含碳外延层相关的质量问题的影响。

    METHODS OF SELECTIVELY DEPOSITING AN EPITAXIAL LAYER
    6.
    发明申请
    METHODS OF SELECTIVELY DEPOSITING AN EPITAXIAL LAYER 审中-公开
    选择沉积外延层的方法

    公开(公告)号:US20110277934A1

    公开(公告)日:2011-11-17

    申请号:US13191020

    申请日:2011-07-26

    IPC分类号: C23F1/08 C23C16/00

    摘要: Apparatus for selectively depositing an epitaxial layer are provided herein. In some embodiments, an apparatus for processing a substrate may include a process chamber having a substrate support disposed therein; a deposition gas source coupled to the process chamber; an etching gas source coupled to the process chamber, the etching gas source including a hydrogen and halogen gas source and a germanium gas source; an energy control source to maintain the substrate at a temperature at up to 600 degrees Celsius; and an exhaust system coupled to the process chamber to control the pressure in the process chamber.

    摘要翻译: 本文提供了用于选择性沉积外延层的设备。 在一些实施例中,用于处理衬底的设备可以包括其中设置有衬底支撑件的处理室; 耦合到处理室的沉积气体源; 耦合到所述处理室的蚀刻气体源,所述蚀刻气体源包括氢和卤素气体源和锗气体源; 能量控制源,以将基底保持在高达600摄氏度的温度; 以及联接到处理室的排气系统,以控制处理室中的压力。

    METHOD OF FORMING AN EMBEDDED SILICON CARBON EPITAXIAL LAYER
    9.
    发明申请
    METHOD OF FORMING AN EMBEDDED SILICON CARBON EPITAXIAL LAYER 有权
    嵌入硅碳外延层的方法

    公开(公告)号:US20090215249A1

    公开(公告)日:2009-08-27

    申请号:US12038288

    申请日:2008-02-27

    IPC分类号: H01L21/36

    摘要: Methods for forming embedded epitaxial layers containing silicon and carbon are disclosed. Specific embodiments pertain to the formation embedded epitaxial layers containing silicon and carbon on silicon wafers. In specific embodiments an epitaxial layer of silicon and carbon is non-selectively formed on a substrate or silicon wafer, portions of this layer are removed to expose the underlying substrate or silicon wafer, and an epitaxial layer containing silicon is formed on the exposed substrate or silicon wafers. In specific embodiments, gates are formed on the resulting silicon-containing epitaxial layers.

    摘要翻译: 公开了用于形成包含硅和碳的嵌入式外延层的方法。 具体实施方案涉及在硅晶片上形成包含硅和碳的嵌入式外延层的形成。 在具体实施方案中,在衬底或硅晶片上非选择性地形成硅和碳的外延层,去除该层的部分以暴露下面的衬底或硅晶片,并且在暴露的衬底上形成包含硅的外延层, 硅片。 在具体实施例中,在所得到的含硅外延层上形成栅极。