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    Selective epitaxy process control
    1.
    发明授权
    Selective epitaxy process control 有权
    选择性外延过程控制

    公开(公告)号：US09064960B2

    公开(公告)日：2015-06-23

    申请号：US11669550

    申请日：2007-01-31

    申请人： Andrew Lam ,  Yihwan Kim

    发明人： Andrew Lam ,  Yihwan Kim

    IPC分类号： C30B25/04 ,  H01L29/78 ,  C30B23/04 ,  H01L21/02 ,  H01L29/165 ,  H01L29/66 ,  C30B35/00 ,  H01L21/8238

    CPC分类号： H01L29/7834 ,  C30B23/04 ,  C30B25/04 ,  C30B35/00 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/02636 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7848

    摘要： Methods of selectively and epitaxially forming a silicon-containing material on a substrate surface contained within a process chamber are provided. In one or more embodiments, the pressure in the process chamber is reduced during deposition of material on the substrate and increased during etching of material from the substrate. According to an embodiment, process gases are flowed into the chamber through first zone and a second zone to provide a ratio of the amount of gas flowed to the first zone and the amount of gas flowed to the second zone. In one or more embodiments, the first zone is an inner radial zone and the second zone is an outer radial zone, and ratio of inner zone gas flow to outer zone gas flow is less during deposition than during etching. According to one or more embodiments, the selective epitaxial process includes repeating a cycle of a deposition and then an etching process, and an optional purge until the desired thickness of an epitaxial layer is grown.

    摘要翻译： 提供在处理室内包含的衬底表面上选择性地和外延地形成含硅材料的方法。 在一个或多个实施例中，在材料沉积在衬底上时，处理室中的压力降低，并且在从衬底蚀刻材料期间增加。 根据实施例，工艺气体通过第一区域和第二区域流入腔室，以提供流入第一区域的气体量与流向第二区域的气体的量的比率。 在一个或多个实施例中，第一区域是内部径向区域，第二区域是外部径向区域，并且内部区域气体流与外部区域气体流量的比例在沉积期间比在蚀刻期间更小。 根据一个或多个实施例，选择性外延工艺包括重复沉积周期，然后重复蚀刻工艺，以及任选的清洗直到生长外延层的期望厚度。

    Epitaxial deposition process and apparatus
    2.
    发明授权
    Epitaxial deposition process and apparatus 失效
    外延沉积工艺和设备

    公开(公告)号：US07494545B2

    公开(公告)日：2009-02-24

    申请号：US11346804

    申请日：2006-02-03

    申请人： Andrew Lam ,  Yihwan Kim ,  Satheesh Kuppurao ,  See-Eng Phan ,  Xinliang Lu ,  Chien-Teh Kao

    发明人： Andrew Lam ,  Yihwan Kim ,  Satheesh Kuppurao ,  See-Eng Phan ,  Xinliang Lu ,  Chien-Teh Kao

    IPC分类号： C30B25/12

    CPC分类号： C23C16/452 ,  C23C16/0236 ,  C23C16/505 ,  H01L21/31116 ,  H01L21/67069

    摘要： An epitaxial deposition process including a dry etch process, followed by an epitaxial deposition process is disclosed. The dry etch process involves placing a substrate to be cleaned into a processing chamber to remove surface oxides. A gas mixture is introduced into a plasma cavity, and the gas mixture is energized to form a plasma of reactive gas in the plasma cavity. The reactive gas enters into the processing chamber and reacts with the substrate, forming a thin film. The substrate is heated to vaporize the thin film and expose an epitaxy surface. The epitaxy surface is substantially free of oxides. Epitaxial deposition is then used to form an epitaxial layer on the epitaxy surface.

    摘要翻译： 公开了一种外延沉积工艺，其包括干蚀刻工艺，随后进行外延沉积工艺。 干蚀刻工艺涉及将要清洗的基底放置在处理室中以去除表面氧化物。 将气体混合物引入等离子体空腔中，并且气体混合物被激发以在等离子体腔中形成反应气体的等离子体。 反应气体进入处理室并与基板反应，形成薄膜。 将衬底加热以蒸发薄膜并暴露外延表面。 外延表面基本上不含氧化物。 然后使用外延沉积在外延表面上形成外延层。

    METHODS OF CONTROLLING MORPHOLOGY DURING EPITAXIAL LAYER FORMATION
    3.
    发明申请
    METHODS OF CONTROLLING MORPHOLOGY DURING EPITAXIAL LAYER FORMATION 有权
    在外延层形成过程中控制形态的方法

    公开(公告)号：US20080026549A1

    公开(公告)日：2008-01-31

    申请号：US11830830

    申请日：2007-07-30

    申请人： Yihwan Kim ,  Andrew Lam

    发明人： Yihwan Kim ,  Andrew Lam

    IPC分类号： H01L21/20

    CPC分类号： H01L21/02381 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02661

    摘要： A first aspect of the invention provides a method of selectively forming an epitaxial layer on a substrate. The method includes heating the substrate to a temperature of less than about 800° C. and employing both silane and dichlorosilane as silicon sources during epitaxial film formation. Numerous other aspects are provided.

    摘要翻译： 本发明的第一方面提供了一种在衬底上选择性地形成外延层的方法。 该方法包括在外延膜形成期间将基板加热至低于约800℃的温度，同时采用硅烷和二氯硅烷作为硅源。 提供了许多其他方面。

    Method of forming conformal silicon layer for recessed source-drain
    4.
    发明授权
    Method of forming conformal silicon layer for recessed source-drain 有权
    形成用于凹陷源极漏极的保形硅层的方法

    公开(公告)号：US07772074B2

    公开(公告)日：2010-08-10

    申请号：US11874336

    申请日：2007-10-18

    申请人： Zhiyuan Ye ,  Andrew Lam ,  Saurabh Chopra ,  Yihwan Kim

    发明人： Zhiyuan Ye ,  Andrew Lam ,  Saurabh Chopra ,  Yihwan Kim

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7848 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02667 ,  H01L29/165 ,  H01L29/66628 ,  H01L29/66636

    摘要： Processes for non-selectively forming one or more conformal silicon-containing epitaxial layers on recess corners are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of a non-selective epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source such as silane and a higher order silane, followed by heating the substrate to promote solid phase epitaxial growth.

    摘要翻译： 公开了在凹陷角上非选择性地形成一个或多个适形的含硅外延层的工艺。 具体实施例涉及半导体器件中的外延层的形成和处理，例如金属氧化物半导体场效应晶体管（MOSFET）器件。 在具体实施方案中，非选择性外延层的形成包括将处理室中的衬底暴露于包括诸如硅烷和高级硅烷的硅源的沉积气体，然后加热衬底以促进固相外延生长。

    METHOD OF FORMING CONFORMAL SILICON LAYER FOR RECESSED SOURCE-DRAIN
    5.
    发明申请
    METHOD OF FORMING CONFORMAL SILICON LAYER FOR RECESSED SOURCE-DRAIN 有权
    形成连续硅层的方法

    公开(公告)号：US20090104739A1

    公开(公告)日：2009-04-23

    申请号：US11874336

    申请日：2007-10-18

    申请人： Zhiyuan Ye ,  Andrew Lam ,  Saurabh Chopra ,  Yihwan Kim

    发明人： Zhiyuan Ye ,  Andrew Lam ,  Saurabh Chopra ,  Yihwan Kim

    IPC分类号： H01L21/00 ,  H01L21/336

    CPC分类号： H01L29/7848 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02667 ,  H01L29/165 ,  H01L29/66628 ,  H01L29/66636

    摘要： Processes for non-selectively forming one or more conformal silicon-containing epitaxial layers on recess corners are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of a non-selective epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source such as silane and a higher order silane, followed by heating the substrate to promote solid phase epitaxial growth.

    摘要翻译： 公开了在凹陷角上非选择性地形成一个或多个适形的含硅外延层的工艺。 具体实施例涉及半导体器件中的外延层的形成和处理，例如金属氧化物半导体场效应晶体管（MOSFET）器件。 在具体实施方案中，非选择性外延层的形成包括将处理室中的衬底暴露于包括诸如硅烷和高级硅烷的硅源的沉积气体，然后加热衬底以促进固相外延生长。

    Selective formation of silicon carbon epitaxial layer
    6.
    发明授权
    Selective formation of silicon carbon epitaxial layer 有权
    选择性形成硅碳外延层

    公开(公告)号：US07776698B2

    公开(公告)日：2010-08-17

    申请号：US11867933

    申请日：2007-10-05

    申请人： Zhiyuan Ye ,  Saurabh Chopra ,  Andrew Lam ,  Yihwan Kim

    发明人： Zhiyuan Ye ,  Saurabh Chopra ,  Andrew Lam ,  Yihwan Kim

    IPC分类号： H01L21/336 ,  H01L21/8238 ,  H01L21/36 ,  H01L21/311

    CPC分类号： H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/1054 ,  H01L29/7833

    摘要： Methods for formation of epitaxial layers containing n-doped silicon are disclosed, including methods for the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. Formation of the n-doped epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source, a carbon source and an n-dopant source at a first temperature and pressure and then exposing the substrate to an etchant at a second higher temperature and a higher pressure than during deposition.

    摘要翻译： 公开了用于形成包含n掺杂硅的外延层的方法，包括用于在半导体器件中形成和处理外延层的方法，例如金属氧化物半导体场效应晶体管（MOSFET）器件。 n掺杂外延层的形成包括在第一温度和压力下将工艺室中的衬底暴露于包括硅源，碳源和n-掺杂剂源的沉积气体，然后在第二温度和压力下将衬底暴露于蚀刻剂 更高的温度和更高的压力比沉积期间。

    Selective Formation of Silicon Carbon Epitaxial Layer
    7.
    发明申请
    Selective Formation of Silicon Carbon Epitaxial Layer 有权
    硅碳外延层的选择性形成

    公开(公告)号：US20090093094A1

    公开(公告)日：2009-04-09

    申请号：US11867933

    申请日：2007-10-05

    申请人： Zhiyuan Ye ,  Saurabh Chopra ,  Andrew Lam ,  Yihwan Kim

    发明人： Zhiyuan Ye ,  Saurabh Chopra ,  Andrew Lam ,  Yihwan Kim

    IPC分类号： H01L21/365 ,  H01L21/336

    CPC分类号： H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/1054 ,  H01L29/7833

    摘要： Methods for formation of epitaxial layers containing n-doped silicon are disclosed, including methods for the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. Formation of the n-doped epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source, a carbon source and an n-dopant source at a first temperature and pressure and then exposing the substrate to an etchant at a second higher temperature and a higher pressure than during deposition.

    摘要翻译： 公开了用于形成包含n掺杂硅的外延层的方法，包括用于在半导体器件中形成和处理外延层的方法，例如金属氧化物半导体场效应晶体管（MOSFET）器件。 n掺杂外延层的形成包括在第一温度和压力下将工艺室中的衬底暴露于包括硅源，碳源和n-掺杂剂源的沉积气体，然后在第二温度和压力下将衬底暴露于蚀刻剂 更高的温度和更高的压力比沉积期间。

    Selective Epitaxy Process Control
    8.
    发明申请
    Selective Epitaxy Process Control 有权
    选择性外延过程控制

    公开(公告)号：US20080182397A1

    公开(公告)日：2008-07-31

    申请号：US11669550

    申请日：2007-01-31

    申请人： Andrew Lam ,  Yihwan Kim

    发明人： Andrew Lam ,  Yihwan Kim

    IPC分类号： H01L21/36

    CPC分类号： H01L29/7834 ,  C30B23/04 ,  C30B25/04 ,  C30B35/00 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/02636 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7848

    摘要： Methods of selectively and epitaxially forming a silicon-containing material on a substrate surface contained within a process chamber are provided. In one or more embodiments, the pressure in the process chamber is reduced during deposition of material on the substrate and increased during etching of material from the substrate. According to an embodiment, process gases are flowed into the chamber through first zone and a second zone to provide a ratio of the amount of gas flowed to the first zone and the amount of gas flowed to the second zone. In one or more embodiments, the first zone is an inner radial zone and the second zone is an outer radial zone, and ratio of inner zone gas flow to outer zone gas flow is less during deposition than during etching. According to one or more embodiments, the selective epitaxial process includes repeating a cycle of a deposition and then an etching process, and an optional purge until the desired thickness of an epitaxial layer is grown.

    摘要翻译： 提供在处理室内包含的衬底表面上选择性地和外延地形成含硅材料的方法。 在一个或多个实施例中，在材料沉积在衬底上时，处理室中的压力降低，并且在从衬底蚀刻材料期间增加。 根据实施例，工艺气体通过第一区域和第二区域流入腔室，以提供流入第一区域的气体量与流向第二区域的气体的量的比率。 在一个或多个实施例中，第一区域是内部径向区域，第二区域是外部径向区域，并且内部区域气体流与外部区域气体流量的比例在沉积期间比在蚀刻期间更小。 根据一个或多个实施例，选择性外延工艺包括重复沉积周期，然后重复蚀刻工艺，以及任选的清洗直到生长外延层的期望厚度。

    Epitaxial deposition process and apparatus
    9.
    发明申请
    Epitaxial deposition process and apparatus 失效
    外延沉积工艺和设备

    公开(公告)号：US20070181057A1

    公开(公告)日：2007-08-09

    申请号：US11346804

    申请日：2006-02-03

    申请人： Andrew Lam ,  Yihwan Kim ,  Satheesh Kuppurao ,  See-Eng Phan ,  Xinliang Lu ,  Chien-Teh Kao

    发明人： Andrew Lam ,  Yihwan Kim ,  Satheesh Kuppurao ,  See-Eng Phan ,  Xinliang Lu ,  Chien-Teh Kao

    IPC分类号： C30B23/00 ,  C23C16/00 ,  C30B25/00 ,  C30B28/14

    CPC分类号： C23C16/452 ,  C23C16/0236 ,  C23C16/505 ,  H01L21/31116 ,  H01L21/67069

    摘要： An epitaxial deposition process including a dry etch process, followed by an epitaxial deposition process is disclosed. The dry etch process involves placing a substrate to be cleaned into a processing chamber to remove surface oxides. A gas mixture is introduced into a plasma cavity, and the gas mixture is energized to form a plasma of reactive gas in the plasma cavity. The reactive gas enters into the processing chamber and reacts with the substrate, forming a thin film. The substrate is heated to vaporize the thin film and expose an epitaxy surface. The epitaxy surface is substantially free of oxides. Epitaxial deposition is then used to form an epitaxial layer on the epitaxy surface.

    摘要翻译： 公开了一种外延沉积工艺，其包括干蚀刻工艺，随后进行外延沉积工艺。 干蚀刻工艺涉及将要清洗的基底放置在处理室中以去除表面氧化物。 将气体混合物引入等离子体空腔中，并且气体混合物被激发以在等离子体腔中形成反应气体的等离子体。 反应气体进入处理室并与基板反应，形成薄膜。 将衬底加热以蒸发薄膜并暴露外延表面。 外延表面基本上不含氧化物。 然后使用外延沉积在外延表面上形成外延层。