摘要:
Provided is an organic thin film transistor and method of forming the same. The organic thin film transistor can decrease threshold voltage and driving voltage by forming a thin organic dielectric layer in a lamella structure using a diblock copolymer including a hydrophilic polymer with high permittivity and a hydrophobic polymer with low permittivity together. Also, the method can simplify the manufacturing process by forming an organic dielectric layer including polymers having two different physical properties through one spin coating.
摘要:
Provided are a composition for organic thin film transistors including a material including an anthracenyl group and a cross-linker including a maleimide group, an organic thin film transistor formed by using the composition, and a method for manufacturing the same.
摘要:
Provided are a multi-layer interconnection structure and a manufacturing method thereof. The multi-layer interconnection structure includes a substrate; a first wiring on the substrate; an interlayer insulation layer on the first wiring; a second wiring on the interlayer insulation layer; and a via contact including at least one conductive filament penetrating through the interlayer insulation layer between the second wiring and the first wiring to be electrically connected to the first wiring and the second wiring.
摘要:
A composition for an organic dielectric, includes a compound represented by Formula 1 below; and a cross-linking agent, wherein, in Formula 1, R1 is any one of hydrogen, hydroxyl group, ester group, amide group, or alkyl group or alkoxy group of a carbon number of 1 to 12, R2 is selected from electrolytic functional groups, each of a and b is a positive integer, and the ratio of b to a (b/a) is larger than 0 and smaller than 99,
摘要:
Provided are a resistive memory device and a method of fabricating the same. The resistive memory device comprises an electron channel layer formed by means of a swelling process and an annealing process. Thus, conductive nanoparticles are uniformly dispersed in the electron channel layer to improve reliability of the resistive memory device. According to the method, an electron channel layer is formed by means of a printing process, a swelling process, and an annealing process. Thus, fabrication time is reduced.
摘要:
Provided are a resistive memory device and a method of fabricating the same. The resistive memory device comprises an electron channel layer formed by means of a swelling process and an annealing process. Thus, conductive nanoparticles are uniformly dispersed in the electron channel layer to improve reliability of the resistive memory device. According to the method, an electron channel layer is formed by means of a printing process, a swelling process, and an annealing process. Thus, fabrication time is reduced.
摘要:
Provided are a multi-layer interconnection structure and a manufacturing method thereof. The multi-layer interconnection structure includes a substrate; a first wiring on the substrate; an interlayer insulation layer on the first wiring; a second wiring on the interlayer insulation layer; and a via contact including at least one conductive filament penetrating through the interlayer insulation layer between the second wiring and the first wiring to be electrically connected to the first wiring and the second wiring.
摘要:
An organic insulating layer composition includes a polymer mixture including 50 parts to 90 parts by volume of an organic polymer and 10 parts to 50 parts by volume of an amorphous polymer, wherein the organic polymer includes at least a first repeating unit and a second repeating unit, the first and second repeating units each being substituted with at least one of fluorine or chlorine, a total number of fluorine and chlorine atoms in the first repeating unit being different from a total number of fluorine and chlorine atoms in the second repeating unit, and an organic solvent.
摘要:
An electronic device comprising an optically transparent substrate, a first electrode structure incorporating a channel, said channel being optically transparent and said electrode structure being optically opaque, at least one intermediate layer, and a photosensitive dielectric layer disposed above the at least one intermediate layer, the photosensitive dielectric layer incorporating a trench in a region essentially over said channel, the electronic device further comprising a further electrode, wherein the further electrode is located partially in the trench and partially beyond the trench such that portions of the further electrode that extend beyond the trench are separated from the at least one intermediate layer by the photosensitive dielectric layer.
摘要:
This invention relates to the fabrication of electronic devices, such as thin-film transistors, in particular thin-film transistors in which patterning techniques are used for definition of electrode patterns that need to be accurately aligned with respect to underlying electrodes. The fabrication technique is applicable to various patterning techniques, such as laser ablation patterning or solution-based, direct-write printing techniques which are not capable of forming structures with a small linewidth, and/or that cannot be positioned very accurately with respect to previously deposited patterns. We thus describe self-aligned gate techniques which are applicable for both gate patterning by a subtractive technique, in particular selective laser ablation patterning, and gate patterning by an additive technique such as printing. The techniques facilitate the use of low-resolution gate patterning.