Semiconductor device having ferroelectric material capacitor and method of making the same

    公开(公告)号:US07498179B2

    公开(公告)日:2009-03-03

    申请号:US11218972

    申请日:2005-09-02

    申请人: Yoon-Jong Song

    发明人: Yoon-Jong Song

    IPC分类号: H01L21/00

    摘要: The present invention relates to the field of a semiconductor device having a ferroelectric material capacitor and method of making the same. The semiconductor device includes a capacitor having a triple-level oxygen barrier layer pattern formed by an oxygen barrier metal layer, a material layer formed of a conductive solid solution by compounding the oxygen barrier metal layer and oxygen, and an oxygen barrier metal on an interlayer dielectric with a contact plug. The capacitor also has an electrode and a ferroelectric film electrically contacting to the oxygen barrier layer.Further, a wetting layer is formed between the oxygen barrier layer and the contact plug, and an iridium oxygen layer is formed between the oxygen barrier layer and a capacitor electrode.

    PRAMs having a plurality of active regions located vertically in sequence and methods of forming the same
    5.
    发明申请
    PRAMs having a plurality of active regions located vertically in sequence and methods of forming the same 有权
    具有多个有序区域的垂直位置的PRAM及其形成方法

    公开(公告)号:US20060076548A1

    公开(公告)日:2006-04-13

    申请号:US11246863

    申请日:2005-10-07

    IPC分类号: H01L29/02

    摘要: There are provided PRAMS having a plurality of active regions located vertically in sequence and methods of forming the same. The PRAM and the method provide an approach to rapidly changing phase in a phase change layer pattern with a given design rule. A semiconductor substrate defining at least one reference active region is prepared in a cell array region and a peripheral circuit region. Other semiconductor substrates on a vertical line passing a main surface of the reference active region are located in sequence. The other semiconductor substrates define other active regions, respectively. A lower cell gate pattern is formed on the semiconductor substrate of the reference active region, and upper cell gate patterns are disposed on the other semiconductor substrates of the other active regions, respectively.

    摘要翻译: 提供了具有顺序定位的多个活性区域和其形成方法的PRAMS。 PRAM和该方法提供了用给定设计规则快速改变相变层图案中的相位的方法。 在单元阵列区域和外围电路区域中制备限定至少一个参考有源区的半导体衬底。 在通过参考有源区域的主表面的垂直线上的其它半导体衬底依次定位。 其他半导体衬底分别限定其它有源区。 在参考有源区的半导体衬底上形成下电池栅极图案,并且上电池栅极图案分别设置在其它有源区的其它半导体衬底上。

    Phase change memory device and method for forming the same
    6.
    发明申请
    Phase change memory device and method for forming the same 有权
    相变存储器件及其形成方法

    公开(公告)号:US20060011902A1

    公开(公告)日:2006-01-19

    申请号:US11149755

    申请日:2005-06-10

    IPC分类号: H01L47/00

    摘要: A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.

    摘要翻译: 相变存储器件包括设置在基板上的模具层,加热电极,填充绝缘图案和相变材料图案。 加热电极设置在使基板穿过模具层的开口中。 加热电极形成为大致圆筒形,其侧壁共形地设置在开口的下内壁上。 填充绝缘图案填充由加热电极的侧壁围绕的空白区域。 相变材料图案设置在模具层上并向下延伸以填充开口的空的部分。 相变材料图案接触加热电极的侧壁的顶表面。

    Methods for forming electronic devices including capacitor structures
    7.
    发明授权
    Methods for forming electronic devices including capacitor structures 失效
    用于形成包括电容器结构的电子器件的方法

    公开(公告)号:US06911362B2

    公开(公告)日:2005-06-28

    申请号:US10635195

    申请日:2003-08-06

    CPC分类号: H01L27/11502 H01L27/11507

    摘要: Methods for forming an electronic device can include forming a capacitor structure on a portion of a substrate with the capacitor structure including a first electrode on the substrate, a capacitor dielectric on the first electrode, a second electrode on the dielectric, and a hard mask on the second electrode. More particularly, the capacitor dielectric can be between the first and second electrodes, the first electrode and the capacitor dielectric can be between the second electrode and the substrate, and the first and second electrodes and the capacitor dielectric can be between the hard mask and the substrate. An interlayer dielectric layer can be formed on the hard mask and on portions of the substrate surrounding the capacitor structure, and portions of the interlayer dielectric layer can be removed to expose the hard mask while maintaining portions of the interlayer dielectric layer on portions of the substrate surrounding the capacitor structure. The hard mask can then be removed thereby exposing portions of the second electrode while maintaining the portions of the interlayer dielectric layer on portions of the substrate surrounding the capacitor.

    摘要翻译: 用于形成电子器件的方法可以包括在衬底的一部分上形成电容器结构,其中电容器结构包括在衬底上的第一电极,第一电极上的电容器电介质,电介质上的第二电极, 第二电极。 更具体地,电容器电介质可以在第一和第二电极之间,第一电极和电容器电介质可以在第二电极和衬底之间,并且第一和第二电极和电容器电介质可以在硬掩模和第二电极之间 基质。 可以在硬掩模和围绕电容器结构的基板的部分上形成层间电介质层,并且可以去除层间介电层的部分以暴露硬掩模,同时将层间电介质层的部分保持在基板的部分上 围绕电容器结构。 然后可以去除硬掩模,从而暴露第二电极的部分,同时保持层间电介质层的部分在包围电容器的基板的部分上。

    Phase change memory
    9.
    发明授权
    Phase change memory 有权
    相变记忆

    公开(公告)号:US08164079B2

    公开(公告)日:2012-04-24

    申请号:US13092725

    申请日:2011-04-22

    IPC分类号: H01L47/00

    摘要: A method of fabricating a phase change memory includes forming a lower electrode on a semiconductor substrate, forming a phase change pattern, an upper electrode, and a hard mask pattern sequentially on the lower electrode, a width of a bottom surface of the hard mask pattern being greater than a width of a top surface of the hard mask pattern, the bottom surface of the hard mask pattern facing the upper electrode and being opposite the top surface of the hard mask pattern, and forming a capping layer to cover the top surface of the hard mask pattern and sidewalls of the hard mask pattern, phase change pattern, and upper electrode.

    摘要翻译: 制造相变存储器的方法包括在半导体衬底上形成下电极,在下电极上依次形成相变图案,上电极和硬掩模图案,硬掩模图案的底面宽度 大于硬掩模图案的顶表面的宽度,硬掩模图案的底表面面向上电极并且与硬掩模图案的顶表面相对,并且形成覆盖层以覆盖硬掩模图案的顶表面 硬掩模图案和硬掩模图案的侧壁,相变图案和上电极。

    Phase change memory devices and methods of forming the same
    10.
    发明授权
    Phase change memory devices and methods of forming the same 失效
    相变存储器件及其形成方法

    公开(公告)号:US07939366B2

    公开(公告)日:2011-05-10

    申请号:US12219647

    申请日:2008-07-25

    IPC分类号: H01L21/06

    摘要: A method of forming a phase change memory device includes forming a core pattern on a substrate, conformally forming a heat conductive layer on the substrate including the core pattern, anisotropically etching the heat conductive layer down to a top surface of the core pattern to form a heat electrode surrounding a sidewall of the core pattern, and forming a phase change memory pattern connected to a top surface of the heat electrode.

    摘要翻译: 形成相变存储器件的方法包括在衬底上形成芯图案,在包括芯图案的衬底上共形形成导热层,各向异性地将导热层刻蚀成芯图案的顶表面,以形成 围绕芯图案的侧壁的热电极,以及形成连接到热电极的顶表面的相变存储器图案。