公开(公告)号：US20100046274A1

公开(公告)日：2010-02-25

申请号：US12543793

申请日：2009-08-19

申请人： Kenji TSUCHIDA ,  Yoshihiro UEDA

发明人： Kenji TSUCHIDA ,  Yoshihiro UEDA

IPC分类号： G11C11/00 ,  G11C7/02 ,  G11C8/00

CPC分类号： G11C11/1673 ,  G11C11/1659 ,  G11C11/1675

摘要： A resistance change memory includes two memory cell arrays each including a plurality of memory cells, the memory cells including variable resistive elements, two reference cell arrays provided to correspond to the two memory cell arrays, respectively, and each including a plurality of reference cells, the reference cells having a reference value, and a sense amplifier shared by the two memory cell arrays and detecting data in an accessed memory cell by use of a reference cell array corresponding to a second memory cell array different from a first memory cell array including the accessed memory cell. In reading the data, a particular reference cell in one reference cell array is always activated for an address space based on one memory cell array as a unit.

摘要翻译： 电阻变化存储器包括两个存储单元阵列，每个存储单元阵列包括多个存储单元，存储单元包括可变电阻元件，分别提供给两个存储单元阵列的两个参考单元阵列，每个参考单元阵列包括多个参考单元， 所述参考单元具有参考值，以及由所述两个存储单元阵列共享的读出放大器，并且通过使用与包括所述存储单元阵列的第一存储单元阵列不同的第二存储单元阵列对应的参考单元阵列来检测所访问的存储器单元中的数据 存取存储单元 在读取数据时，一个参考单元阵列中的特定参考单元总是基于一个存储单元阵列作为单元而被激活用于地址空间。

公开(公告)号：US20070279963A1

公开(公告)日：2007-12-06

申请号：US11673206

申请日：2007-02-09

申请人： Kenji TSUCHIDA ,  Yoshihiro UEDA

发明人： Kenji TSUCHIDA ,  Yoshihiro UEDA

IPC分类号： G11C11/00

CPC分类号： G11C11/1657 ,  G11C11/1655

摘要： The first memory cell in even columns is composed of a first resistance change element one end of which is connected to a first bit line, and first and second FETs connected in parallel between the other end of the first resistance change element and a second bit line. The second memory cell in odd columns is composed of a second resistance change element one end of which is connected to a third bit line, and third and fourth FETs connected in parallel between the other end of the second resistance change element and a fourth bit line. A gate of the first FET is connected to the first word line. Gates of the second and third FETs are connected together to the second word line. A gate of the fourth FET is connected to the third word line.

摘要翻译： 偶数列中的第一存储单元由第一电阻变化元件组成，其一端连接到第一位线，并且第一和第二FET并联连接在第一电阻变化元件的另一端和第二位线 。 奇数列中的第二存储单元由第二电阻变化元件组成，其一端连接到第三位线，第三和第四FET并联连接在第二电阻变化元件的另一端和第四位线之间 。 第一个FET的栅极连接到第一个字线。 第二和第三FET的栅极连接在一起到第二字线。 第四FET的栅极连接到第三字线。

公开(公告)号：US20120155146A1

公开(公告)日：2012-06-21

申请号：US13331229

申请日：2011-12-20

申请人： Yoshihiro UEDA ,  Kenji Tsuchida

发明人： Yoshihiro UEDA ,  Kenji Tsuchida

IPC分类号： G11C11/00

CPC分类号： G11C11/161 ,  G11C11/1659 ,  G11C11/1673

摘要： According to one embodiment, a resistance-change memory includes memory cells between a bit line and a source line, each of the memory cells including a memory element and a cell transistor having a gate connected to a word line, an n-channel transistor having a gate to which a first control voltage is applied, and a current path connected to the bit line, and a p-channel transistor having a gate to which a second control voltage is applied, and a current path connected to the source line. When the memory cell is read, the potential of the bit line is controlled by the first control voltage, and the potential of the source line is controlled by the second control voltage.

摘要翻译： 根据一个实施例，电阻变化存储器包括位线和源极线之间的存储器单元，每个存储器单元包括存储元件和具有连接到字线的栅极的单元晶体管，n沟道晶体管具有 施加第一控制电压的栅极和连接到位线的电流路径，以及具有施加第二控制电压的栅极的p沟道晶体管和连接到源极线的电流路径。 当存储单元被读取时，位线的电位由第一控制电压控制，源极线的电位由第二控制电压控制。

公开(公告)号：US20100165701A1

公开(公告)日：2010-07-01

申请号：US12536341

申请日：2009-08-05

申请人： Yoshihiro UEDA ,  Kenji TSUCHIDA ,  Kiyotaro ITAGAKI

发明人： Yoshihiro UEDA ,  Kenji TSUCHIDA ,  Kiyotaro ITAGAKI

IPC分类号： G11C11/00 ,  G11C7/02 ,  G11C7/10

CPC分类号： G11C13/00 ,  G11C11/16 ,  G11C11/1659 ,  G11C11/1673 ,  G11C13/0004 ,  G11C13/004 ,  G11C29/02 ,  G11C29/026 ,  G11C2013/0054 ,  G11C2213/79

摘要： A resistive memory includes a plurality of memory cells, a plurality of reference cells having mutually different resistance values, at least one sense amplifier having a first input terminal connected to one selected memory cell which is selected from the plurality of memory cells at a time of read, and a second input terminal connected to one selected reference cell which is selected from the plurality of reference cells at the time of read, and one latch circuit which holds offset information of the at least one sense amplifier. The resistive memory further includes a decoder which selects, in accordance with the offset information, the one selected reference cell from the plurality of reference cells, and connects the one selected reference cell to the second input terminal of the at least one sense amplifier.

摘要翻译： 电阻存储器包括多个存储单元，具有相互不同的电阻值的多个参考单元，至少一个读出放大器，其具有连接到从多个存储单元中选择的一个选定存储单元的第一输入端， 读取，以及连接到在读取时从多个参考单元中选择的一个选择的参考单元的第二输入端子，以及保持所述至少一个读出放大器的偏移信息的一个锁存电路。 电阻存储器还包括解码器，其根据偏移信息从多个参考单元中选择一个选定的参考单元，并将所选择的一个参考单元连接到至少一个读出放大器的第二输入端。

公开(公告)号：US20090201717A1

公开(公告)日：2009-08-13

申请号：US12366396

申请日：2009-02-05

申请人： Takashi MAEDA ,  Yoshihiro UEDA ,  Kenji TSUCHIDA

发明人： Takashi MAEDA ,  Yoshihiro UEDA ,  Kenji TSUCHIDA

IPC分类号： G11C11/00 ,  G11C11/416

CPC分类号： G11C11/1653 ,  G11C11/1673 ,  G11C11/1675

摘要： A resistance-change memory includes first and second bit lines running in the same direction, a third bit line running parallel to the first and second bit lines, fourth and fifth bit lines running in the same direction, a sixth bit line running parallel to the fourth and fifth bit lines, a first memory element which has one and the other terminals connected to the first and third bit lines, and changes to one of first and second resistance states, a first reference element having one and the other terminals connected to the fourth and sixth bit lines, and set in the first resistance state, a second reference element having one and the other terminals connected to the fifth and sixth bit lines, and set in the second resistance state, and a sense amplifier having first and second input terminals connected to the first and fourth bit lines.

摘要翻译： 电阻变化存储器包括沿相同方向运行的第一和第二位线，与第一和第二位线并行运行的第三位线，沿相同方向运行的第四和第五位线，平行于第一位线的第六位线 第四和第五位线，第一存储器元件，其具有连接到第一和第三位线的一个端子和另一个端子，并且改变为第一和第二电阻状态中的一个;第一参考元件，其中一个和另一个端子连接到 第四和第六位线，并且设置在第一电阻状态，第二参考元件，其中一个和另一个端子连接到第五和第六位线，并被设置在第二电阻状态，以及读出放大器，具有第一和第二输入 连接到第一和第四位线的端子。

公开(公告)号：US20120023886A1

公开(公告)日：2012-02-02

申请号：US13046278

申请日：2011-03-11

申请人： Akira MINOURA ,  Yoshihiro UEDA ,  Kuninosuke IWATA ,  Hiroyuki TADA ,  Yoshiyuki ESAKI

发明人： Akira MINOURA ,  Yoshihiro UEDA ,  Kuninosuke IWATA ,  Hiroyuki TADA ,  Yoshiyuki ESAKI

IPC分类号： A01D34/73

CPC分类号： A01D34/82

摘要： A riding mower having left and right driving rear wheels independently drivable forward and backward and a pair of left and right steerable front wheels is provided with a support device capable of being mounted with a cylindrical gas cylinder in a horizontal position on an external side of a rollover projection frame. The support device is provided such that the mounted gas cylinder is positioned along front and rear of the rollover protection frame and is mounted in a tilted state in which the central axis of the cylindrical gas cylinder is closer to a central side in a lateral direction of a vehicle body toward a rear side from a plan view.

摘要翻译： 一种具有左右驾驶后轮的骑马割草机，其前后独立地驱动，并且一对左右可转向前轮设置有能够在圆筒状气瓶的外侧安装有圆筒形气瓶的支撑装置 翻转投影框架。 支撑装置被设置成使得安装的气瓶沿着翻转保护框架的前后定位并且以倾斜状态安装，其中圆柱形气瓶的中心轴线更靠近中心侧 从平面图朝向后方的车体。

公开(公告)号：US20090201710A1

公开(公告)日：2009-08-13

申请号：US12367792

申请日：2009-02-09

申请人： Yoshihiro UEDA

发明人： Yoshihiro UEDA

IPC分类号： G11C5/02 ,  G11C7/06

CPC分类号： G11C7/14 ,  G11C7/062 ,  G11C11/5614 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/0023 ,  G11C13/004 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2013/0054 ,  G11C2213/31 ,  G11C2213/71 ,  G11C2213/72

摘要： A semiconductor memory device comprises a plurality of cell arrays, each cell array including a plurality of mutually parallel word lines, a plurality of mutually parallel bit lines disposed to cross these word lines, and a plurality of cells connected to the intersections of these word lines and bit lines, respectively, one portion of the cell arrays forming a memory cell array that has the cells as memory cells, and another portion of the cell arrays forming a reference cell array that has the cells as reference cells. A cell selection circuit is operative to select from the memory cell array a memory cell whose data is to be read, and to select from the reference cell array a reference cell at a position corresponding to a position of the memory cell selected in the memory cell array. A sense amplifier circuit is operative to detect and compare a current or a voltage of the selected memory cell with a current or a voltage of the selected reference cell, and thereby read data of the memory cell.

摘要翻译： 一种半导体存储器件包括多个单元阵列，每个单元阵列包括多个相互平行的字线，多个相互平行的位线布置成与这些字线交叉，以及多个单元，连接到这些字线的交点 和位线，分别形成具有作为存储单元的单元的存储单元阵列的单元阵列的一部分，以及形成具有单元作为参考单元的参考单元阵列的单元阵列的另一部分。 小区选择电路可操作以从存储单元阵列中选择要读取其数据的存储单元，并从参考单元阵列中选择与在存储单元中选择的存储单元的位置对应的位置处的参考单元 数组。 读出放大器电路用于检测并比较所选存储单元的电流或电压与所选参考单元的电流或电压，从而读取存储单元的数据。

公开(公告)号：US20090190391A1

公开(公告)日：2009-07-30

申请号：US12356722

申请日：2009-01-21

申请人： Kiyotaro ITAGAKI ,  Yoshihiro UEDA

发明人： Kiyotaro ITAGAKI ,  Yoshihiro UEDA

IPC分类号： G11C11/02 ,  G11C11/416 ,  G11C8/08

CPC分类号： G11C11/1675 ,  G11C11/1673

摘要： A word line voltage is applied to a plurality of word lines. A read/write voltage is applied to a plurality of bit lines. The read/write voltage is applied to a plurality of source lines. A word line selector selects the word line and applies the word line voltage. A driver applies a predetermined voltage to the bit line and the source line, thereby supplying a current to the memory cell. A read circuit reads a first current having flowed through the memory cell, and determines data stored in the memory cell. When performing the read, the driver supplies a second current to second bit lines among other bit lines, which are adjacent to the first bit line through which the first current has flowed. The second current generates a magnetic field in a direction to suppress a write error in the memory cell from which data is to be read.

摘要翻译： 字线电压被施加到多个字线。 读/写电压施加到多个位线。 读/写电压被施加到多条源极线。 字线选择器选择字线并施加字线电压。 驱动器将预定电压施加到位线和源极线，从而向存储器单元提供电流。 读取电路读取已经流过存储器单元的第一电流，并且确定存储在存储单元中的数据。 当执行读取时，驱动器向与第一电流流过的第一位线相邻的其它位线中的第二位线提供第二电流。 第二电流在抑制要从其读取数据的存储单元中的写入错误的方向上产生磁场。

公开(公告)号：US20120320665A1

公开(公告)日：2012-12-20

申请号：US13422110

申请日：2012-03-16

申请人： Yoshihiro UEDA ,  Kosuke HATSUDA

发明人： Yoshihiro UEDA ,  Kosuke HATSUDA

IPC分类号： G11C11/00

CPC分类号： G11C11/1673

摘要： A semiconductor memory includes a first memory cell including: a first resistance change element and a first select transistor. The semiconductor memory includes a second memory cell including: a second select transistor and a second resistance change element. The semiconductor memory includes a third memory cell including: a third select transistor and a third resistance change element, the third memory cell acting as a reference cell. The semiconductor memory includes a fourth memory cell including: a fourth resistance change element and a fourth select transistor, the fourth memory cell acting as a reference cell.

摘要翻译： 半导体存储器包括：第一存储单元，包括：第一电阻变化元件和第一选择晶体管。 半导体存储器包括第二存储单元，其包括：第二选择晶体管和第二电阻变化元件。 半导体存储器包括第三存储单元，第三存储单元包括：第三选择晶体管和第三电阻变化元件，第三存储单元用作参考单元。 半导体存储器包括：第四存储单元，包括：第四电阻变化元件和第四选择晶体管，第四存储单元用作参考单元。

公开(公告)号：US20120307863A1

公开(公告)日：2012-12-06

申请号：US13421047

申请日：2012-03-15

申请人： Hiroyuki TADA ,  Masato ASAHARA ,  Yoshihiro UEDA ,  Hideki AOKI ,  Akira MINOURA

发明人： Hiroyuki TADA ,  Masato ASAHARA ,  Yoshihiro UEDA ,  Hideki AOKI ,  Akira MINOURA

IPC分类号： G01K13/00

CPC分类号： G01K13/02 ,  G01K2013/024 ,  G01K2205/04

摘要： An exhaust gas temperature detection sensor is arranged at a predetermined position outside a muffler, or at a predetermined position outside an exhaust pipe constituting an exhaust gas flow passage on a more downstream side than the muffler in an exhaust direction. The sensor detects that an atmosphere temperature at the predetermined position outside the muffler has reached a predetermined temperature based on an increase in a temperature inside the muffler, or detects that an atmosphere temperature at the predetermined position outside the exhaust pipe has reached a predetermined temperature based on an increase in a temperature of an exhaust gas inside the exhaust pipe.

摘要翻译： 排气温度检测传感器布置在消声器外部的预定位置处，或者在构成排气流路的排气管外侧的预定位置处布置在排气方向上比消声器更下游侧的排气管温度检测传感器。 该传感器检测到消声器外的预定位置处的气氛温度已基于消音器内部的温度升高而达到预定温度，或者检测到排气管外部的预定位置处的气氛温度已达到预定温度 在排气管内的排气温度上升。