公开(公告)号：US20240321594A1

公开(公告)日：2024-09-26

申请号：US18612661

申请日：2024-03-21

Applicant: Zhuhai ACCESS Semiconductor Co., Ltd.

Inventor： Xianming CHEN ,  Xiaowei XU ,  Yejie HONG ,  Benxia HUANG ,  Gao HUANG ,  Dongfeng ZHANG ,  Jindong FENG

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L21/486 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/49827 ,  H01L24/24 ,  H01L24/82 ,  H01L2221/68345 ,  H01L2224/24155 ,  H01L2224/82106

Abstract: An embedded magnet frame, an integrated structure and a manufacturing method are disclosed. The manufacturing method includes: manufacturing conductive metal columns, a first sacrificial block and a second sacrificial block on a surface of a bearing plate; laminating a first dielectric layer on the surface of the bearing plate so that the first dielectric layer covers the conductive metal columns, the first sacrificial block and the second sacrificial block; thinning the first dielectric layer to expose surfaces of the conductive metal columns, the first sacrificial block and the second sacrificial block; etching the first sacrificial block and the second sacrificial block to form corresponding first and second mounting cavities, the second mounting cavity being used for mounting a chip; filling the first mounting cavity with magnetic slurry to form an embedded magnet; and removing the bearing plate to form an embedded magnet frame.

公开(公告)号：US20240079287A1

公开(公告)日：2024-03-07

申请号：US18453185

申请日：2023-08-21

Applicant: Zhuhai ACCESS Semiconductor Co., LTD.

Inventor： Xianming CHEN ,  Xiaowei XU ,  Juchen HUANG ,  Gao HUANG ,  Benxia HUANG ,  Chaobiao QIN

IPC: H01L23/367 ,  H01L21/48

CPC classification number: H01L23/367 ,  H01L21/4857 ,  H01L21/4871

Abstract: A method for manufacturing a high-heat-dissipation mixed substrate includes: preparing a mother substrate, the mother substrate including an insulating layer and a temporary carrier plate which are laminated; arranging a plurality of first grooves and a plurality of first cavities on the mother substrate; filling the first groove with a thermally-conductive material to form a first thermally-conductive block, and adhering an embedded device in the first cavity and filling the first cavity with the thermally-conductive material to form a second thermally-conductive block; removing the temporary carrier plate to obtain a semi-finished substrate; manufacturing circuit layers on two opposite side surfaces of the semi-finished substrate to obtain a target mother substrate; and cutting the target mother substrate along region dividing lines to obtain a mixed substrate with a side surface being a thermally-conductive surface.

公开(公告)号：US20240186230A1

公开(公告)日：2024-06-06

申请号：US18377399

申请日：2023-10-06

Applicant: Zhuhai ACCESS Semiconductor Co., Ltd

Inventor： Xianming CHEN ,  Xiaowei XU ,  Juchen HUANG ,  Gao HUANG ,  Benxia HUANG

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49822 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04026 ,  H01L2224/19 ,  H01L2224/2101

Abstract: A method for manufacturing a component package substrate structure includes providing a first temporary bearing plate, fitting components, applying a first dielectric layer to embed the components in the first dielectric layer, applying a second temporary bearing plate, removing the first temporary bearing plate, forming a connection pad for connecting an element terminal on the first dielectric layer, laminating a second dielectric layer on the first dielectric layer, laminating a circuit board on the second dielectric layer, removing the second temporary bearing plate, opening a stepped hole on the second surface, wherein the stepped hole includes a first via hole penetrating the first dielectric layer, an opening of an annular ring structure of the connection pad and a second via hole penetrating the second dielectric layer, and electroplating the stepped hole to form a conductive column, wherein the conductive column renders the connection pad conductive with the circuit layer.

公开(公告)号：US20230309240A1

公开(公告)日：2023-09-28

申请号：US17955855

申请日：2022-09-29

Applicant: Zhuhai ACCESS Semiconductor Co., Ltd

Inventor： Xianming CHEN ,  Xiaowei XU ,  Gao HUANG ,  Benxia HUANG

IPC: H05K3/06 ,  H05K3/00 ,  H05K3/46 ,  H05K1/02

CPC classification number: H05K3/064 ,  H05K3/0044 ,  H05K3/4647 ,  H05K1/0298 ,  H05K2203/025 ,  H05K2203/061 ,  H05K2203/143 ,  H05K2203/1446 ,  H05K2201/0376 ,  H05K2201/08

Abstract: A manufacturing method for a conductive substrate with a filtering function includes preparing a core layer and forming first and second conductive holes in the core layer, forming a sacrificial copper layer on the first conductive hole and on the core layer, forming a metal layer on the second conductive hole, forming a metal post in the first conductive hole, forming a lower insulating layer on the core layer, forming a lower insulative post in the second conductive hole, forming a magnet wrapping around the metal post to obtain a first conductive post, forming an upper insulating layer on the core layer, forming an upper insulative post in the second conductive hole to obtain a second conductive post, removing the upper insulating layer, the lower insulating layer, and the remaining sacrificial copper post layer, followed by flattening.

公开(公告)号：US20230282565A1

公开(公告)日：2023-09-07

申请号：US17955759

申请日：2022-09-29

Applicant: Zhuhai ACCESS Semiconductor Co., Ltd

Inventor： Xianming CHEN ,  Xiaowei XU ,  Gao HUANG ,  Benxia HUANG ,  Wenjian LIN

IPC: H01L23/498 ,  H01L25/10 ,  H01L21/48

CPC classification number: H01L23/4985 ,  H01L25/105 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L24/48

Abstract: A packaging structure includes multiple packaging units, and the packaging units include a hard plate region, a winding region, and a fan-out region. In the packaging structure, the hard plate region of the packaging unit is arranged in a stacked manner, some or all of the fan-out regions are packaged with a chip, and some or all of the fan-out regions packaged with a chip are stacked with the hard plate regions after being bent by the winding region. So designed, each fan-out region is individually packaged and then packaged by stacking with each other to achieve the interconnections between a chip and a chip, and between a chip and a substrate without interference between the packaging units.

公开(公告)号：US20230369167A1

公开(公告)日：2023-11-16

申请号：US18196012

申请日：2023-05-11

Applicant: Zhuhai ACCESS Semiconductor Co., Ltd

Inventor： Xianming CHEN ,  Juchen HUANG ,  Xiaowei XU ,  Benxia HUANG ,  Gao HUANG

IPC: H01L23/473 ,  H01L23/31 ,  H05K1/02 ,  H05K1/18 ,  H01L23/00

CPC classification number: H01L23/473 ,  H01L23/3121 ,  H01L24/24 ,  H01L24/82 ,  H05K1/0272 ,  H05K1/186 ,  H01L23/49827 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003

Abstract: A liquid circulating cooling package substrate includes a circulating cooling structure including a cooling chamber in a first dielectric layer to expose a heat dissipation face, a metal heat dissipation layer on the inner surface of the cooling chamber, an upright support column formed on a metal heat dissipation layer, and a cooling cover supported on the support column to close the cooling chamber along the periphery of the cooling chamber. The metal heat dissipation layer completely covers the heat dissipation face and the inner side surface of the cooling chamber, and a liquid inlet and a liquid outlet are formed on the cooling cover. A circulating cooling structure is provided in the first dielectric layer, and the circulating cooling structure is formed during the processing of an embedded package substrate such that the processing flow is simple and the cost is low.

公开(公告)号：US20230361058A1

公开(公告)日：2023-11-09

申请号：US18175527

申请日：2023-02-27

Applicant: Zhuhai ACCESS Semiconductor Co., Ltd.

Inventor： Xianming CHEN ,  Xiaowei XU ,  Juchen HUANG ,  Benxia HUANG ,  Gao HUANG

IPC: H01L23/64 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L23/645 ,  H01L23/49822 ,  H01L21/4857

Abstract: A manufacturing method for a substrate embedded with integrated inductor includes: providing a bearing plate; manufacturing a first conduction copper column on the bearing plate; arranging a first dielectric layer on the bearing plate which covers the first conduction copper column; opening the first dielectric layer to form a first opening; filling a magnetic material at the first opening; grinding the first dielectric layer so that surfaces of the first conduction copper column and the magnetic material are flush with a surface of the first dielectric layer; removing the bearing plate, etching a metal layer on the surface of the first dielectric layer to form a package substrate; arranging a first circuit layer and a solder mask layer on an upper surface and a lower surface of the package substrate; and forming a window in the solder mask layer corresponding to the first circuit layer.