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公开(公告)号:US11735635B2
公开(公告)日:2023-08-22
申请号:US17305971
申请日:2021-07-19
发明人: Chun-Han Tsao , Chih-Ming Chen , Han-Yu Chen , Szu-Yu Wang , Lan-Lin Chao , Cheng-Yuan Tsai
IPC分类号: H01L29/94 , H01L29/76 , H01L31/119 , H01L29/423 , H01L29/66 , H01L21/28 , H01L21/285 , H01L21/768 , H01L49/02 , H01L21/02 , H10B43/30 , H10B43/40
CPC分类号: H01L29/42344 , H01L21/02063 , H01L21/02068 , H01L21/28052 , H01L21/28518 , H01L21/76834 , H01L21/76856 , H01L28/00 , H01L29/665 , H10B43/30 , H10B43/40
摘要: A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor structure, a dielectric layer, a metal-semiconductor compound film and a cover layer. The semiconductor structure has an upper surface and a lateral surface. The dielectric layer encloses the lateral surface of the semiconductor structure and exposes the upper surface of the semiconductor structure. The metal-semiconductor compound film is on the semiconductor structure, wherein the dielectric layer exposes a portion of a surface of the metal-semiconductor compound film. The cover layer encloses the portion of the surface of the metal-semiconductor compound film exposed by the dielectric layer, and exposes the dielectric layer.
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公开(公告)号:US20210343849A1
公开(公告)日:2021-11-04
申请号:US17305971
申请日:2021-07-19
发明人: Chun-Han Tsao , Chih-Ming Chen , Han-Yu Chen , Szu-Yu Wang , Lan-Lin Chao , Cheng-Yuan Tsai
IPC分类号: H01L29/423 , H01L29/66 , H01L21/28 , H01L21/285 , H01L21/768 , H01L27/11568 , H01L27/11573 , H01L49/02 , H01L21/02
摘要: A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor structure, a dielectric layer, a metal-semiconductor compound film and a cover layer. The semiconductor structure has an upper surface and a lateral surface. The dielectric layer encloses the lateral surface of the semiconductor structure and exposes the upper surface of the semiconductor structure. The metal-semiconductor compound film is on the semiconductor structure, wherein the dielectric layer exposes a portion of a surface of the metal-semiconductor compound film. The cover layer encloses the portion of the surface of the metal-semiconductor compound film exposed by the dielectric layer, and exposes the dielectric layer.
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公开(公告)号:US11069785B2
公开(公告)日:2021-07-20
申请号:US16396621
申请日:2019-04-26
发明人: Chun-Han Tsao , Chih-Ming Chen , Han-Yu Chen , Szu-Yu Wang , Lan-Lin Chao , Cheng-Yuan Tsai
IPC分类号: H01L29/76 , H01L29/94 , H01L29/423 , H01L29/66 , H01L21/28 , H01L21/285 , H01L21/768 , H01L27/11568 , H01L27/11573 , H01L49/02 , H01L21/02
摘要: A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor structure, a dielectric layer, a metal-semiconductor compound film and a cover layer. The semiconductor structure has an upper surface and a lateral surface. The dielectric layer encloses the lateral surface of the semiconductor structure and exposes the upper surface of the semiconductor structure. The metal-semiconductor compound film is on the semiconductor structure, wherein the dielectric layer exposes a portion of a surface of the metal-semiconductor compound film. The cover layer encloses the portion of the surface of the metal-semiconductor compound film exposed by the dielectric layer, and exposes the dielectric layer.
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公开(公告)号:US20200006052A1
公开(公告)日:2020-01-02
申请号:US16569019
申请日:2019-09-12
发明人: Xin-Hua Huang , Ping-Yin Liu , Hung-Hua Lin , Hsun-Chung Kuang , Yuan-Chih Hsieh , Lan-Lin Chao , Chia-Shiung Tsai , Xiaomeng Chen
摘要: A method includes performing a plasma activation on a surface of a first package component, removing oxide regions from surfaces of metal pads of the first package component, and performing a pre-bonding to bond the first package component to a second package component.
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公开(公告)号:US10283448B2
公开(公告)日:2019-05-07
申请号:US15887142
申请日:2018-02-02
发明人: Ping-Yin Liu , Kai-Wen Cheng , Xin-Hua Huang , Lan-Lin Chao , Chia-Shiung Tsai , Xiaomeng Chen
IPC分类号: H01L23/522 , H01L21/768
摘要: A method of fabricating a semiconductor device includes providing a first substrate comprising a first conductive element exposed at a surface of the first substrate; forming a patterned photoresist layer atop the first conductive element, whereby the patterned photoresist layer provides openings exposing the first conductive element; forming a first metal layer in the openings and directly atop the first conductive element; forming a first insulator layer over the first metal layer and the first substrate; and polishing the first metal layer and the first insulator layer, resulting in a first interface surface over the first substrate wherein the first interface surface includes part of the first metal layer and the first insulator layer.
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公开(公告)号:US20190035681A1
公开(公告)日:2019-01-31
申请号:US16149972
申请日:2018-10-02
发明人: Hsun-Chung Kuang , Yen-Chang Chu , Cheng-Tai Hsiao , Ping-Yin Liu , Lan-Lin Chao , Yeur-Luen Tu , Chia-Shiung Tsai , Xiaomeng Chen
IPC分类号: H01L21/768 , H01L23/00 , H01L23/31 , H01L23/538 , H01L25/04 , H01L25/065 , H01L23/29 , H01L25/00 , H01L25/075
摘要: An integrated circuit structure includes a package component, which further includes a non-porous dielectric layer having a first porosity, and a porous dielectric layer over and contacting the non-porous dielectric layer, wherein the porous dielectric layer has a second porosity higher than the first porosity. A bond pad penetrates through the non-porous dielectric layer and the porous dielectric layer. A dielectric barrier layer is overlying, and in contact with, the porous dielectric layer. The bond pad is exposed through the dielectric barrier layer. The dielectric barrier layer has a planar top surface. The bond pad has a planar top surface higher than a bottom surface of the dielectric barrier layer.
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公开(公告)号:US10128209B2
公开(公告)日:2018-11-13
申请号:US15238532
申请日:2016-08-16
发明人: Ping-Yin Liu , Lan-Lin Chao , Cheng-Tai Hsiao , Xin-Hua Huang , Hsun-Chung Kuang
IPC分类号: H01L23/40 , H01L23/00 , H01L25/065
摘要: A semiconductor device and a method of fabricating the same are introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses are formed in the passivation layers and one or more conductive pads are formed in the recesses. One or more barrier layers are formed between the passivation layers and the conductive pads. The conductive pads of the first substrate are aligned to the conductive pads of a second substrate and are bonded using a direct bonding method.
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公开(公告)号:US10119909B2
公开(公告)日:2018-11-06
申请号:US15191144
申请日:2016-06-23
发明人: Hung-Hua Lin , Li-Cheng Chu , Ming-Tung Wu , Yuan-Chih Hsieh , Lan-Lin Chao , Chia-Shiung Tsai
IPC分类号: G01N21/00 , G01N21/55 , G01N27/327 , G01N33/483 , G01N21/01 , G01N21/25
摘要: A biological sensing structure includes a mesa integrally connected a portion of a substrate, wherein the mesa has a top surface and a sidewall surface adjacent to the top surface. The biological sensing structure includes a first light reflecting layer over the top surface and the sidewall surface of the mesa. The biological sensing structure includes a filling material surrounding the mesa, wherein the mesa protrudes from the filling material. The biological sensing structure includes a stop layer over the filling material and a portion of the first light reflecting layer. The biological sensing structure includes a second light reflecting layer over a portion of the stop layer and a portion of the top surface of the mesa. The biological sensing structure includes an opening in the second light reflecting layer to partially expose the top surface of the mesa.
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公开(公告)号:US20180226337A1
公开(公告)日:2018-08-09
申请号:US15887142
申请日:2018-02-02
发明人: Ping-Yin Liu , Kai-Wen Cheng , Xin-Hua Huang , Lan-Lin Chao , Chia-Shiung Tsai , Xiaomeng Chen
IPC分类号: H01L23/522 , H01L21/768
CPC分类号: H01L23/522 , H01L21/7684 , H01L2924/0002 , H01L2924/00
摘要: A method of fabricating a semiconductor device includes providing a first substrate comprising a first conductive element exposed at a surface of the first substrate; forming a patterned photoresist layer atop the first conductive element, whereby the patterned photoresist layer provides openings exposing the first conductive element; forming a first metal layer in the openings and directly atop the first conductive element; forming a first insulator layer over the first metal layer and the first substrate; and polishing the first metal layer and the first insulator layer, resulting in a first interface surface over the first substrate wherein the first interface surface includes part of the first metal layer and the first insulator layer.
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公开(公告)号:US09786628B2
公开(公告)日:2017-10-10
申请号:US15356887
申请日:2016-11-21
发明人: Bruce C. S. Chou , Chen-Jong Wang , Ping-Yin Liu , Jung-Kuo Tu , Tsung-Te Chou , Xin-Hua Huang , Hsun-Chung Kuang , Lan-Lin Chao , Chia-Shiung Tsai , Xiaomeng Chen
IPC分类号: H01L23/00 , H01L23/498 , H01L23/522 , H01L21/308 , H01L21/764 , H01L25/00 , H01L25/065 , H01L23/532
CPC分类号: H01L24/80 , H01L21/3081 , H01L21/764 , H01L23/498 , H01L23/5226 , H01L23/53204 , H01L23/53228 , H01L23/5329 , H01L23/53295 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/09 , H01L24/83 , H01L24/93 , H01L25/0657 , H01L25/50 , H01L2224/03845 , H01L2224/05554 , H01L2224/05571 , H01L2224/05647 , H01L2224/0601 , H01L2224/08147 , H01L2224/0901 , H01L2224/80895 , H01L2224/80896 , H01L2225/06524 , H01L2924/00011 , H01L2924/01322 , H01L2924/351 , H01L2924/00014 , H01L2924/00012 , H01L2924/00 , H01L2224/81805
摘要: A package component includes a surface dielectric layer including a planar top surface, a metal pad in the surface dielectric layer and including a second planar top surface level with the planar top surface, and an air trench on a side of the metal pad. The sidewall of the metal pad is exposed to the air trench.
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