公开(公告)号：US20150145136A1

公开(公告)日：2015-05-28

申请号：US14092310

申请日：2013-11-27

申请人： Honeywell International Inc.

发明人： Ronald J. Jensen

IPC分类号： H01L23/00 ,  H01L21/78

CPC分类号： H01L24/64 ,  H01L21/78 ,  H01L24/03 ,  H01L24/24 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/162 ,  H01L29/0657 ,  H01L2224/02371 ,  H01L2224/0345 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/24145 ,  H01L2224/244 ,  H01L2224/245 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/293 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82101 ,  H01L2224/82801 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2225/06524 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2924/12042 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/014

摘要： In some examples, an integrated circuit (IC) includes a semiconductor substrate defining a perimeter of the integrated circuit and a castellation formed at the perimeter. The IC also may include a layer including an electrically conductive material formed on a surface of the castellation. In some examples, the layer including the electrically conductive material is not substantially parallel to adjacent portions of the perimeter of the IC. The integrated circuit may be used in a system, in which the metallized castellation may be used to electrically connect the IC to an external structure, such as another IC or a printed board.

摘要翻译： 在一些示例中，集成电路（IC）包括限定集成电路的周边的半导体衬底和在周边形成的城堡。 该IC还可以包括形成在该座标表面上的导电材料的层。 在一些示例中，包括导电材料的层基本上不平行于IC的周边的相邻部分。 集成电路可以用在系统中，其中可以使用金属化的星座来将IC电连接到诸如另一IC或印刷电路板的外部结构。

公开(公告)号：US20120122278A1

公开(公告)日：2012-05-17

申请号：US13007530

申请日：2011-01-14

申请人： Kwan Ho LEE ,  Yong Hui Joo ,  Tae Hyun KIM ,  Seog Moon CHOI

发明人： Kwan Ho LEE ,  Yong Hui Joo ,  Tae Hyun KIM ,  Seog Moon CHOI

IPC分类号： H01L21/98

CPC分类号： H01L24/83 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/0554 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/82801 ,  H01L2224/83192 ,  H01L2224/83238 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/1579 ,  H01L2924/351 ,  H05K3/3494 ,  H05K2201/09681 ,  H05K2203/1115 ,  H05K2203/1121 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2924/00012

摘要： Disclosed herein is a method of method of manufacturing a semiconductor package board, including: providing a substrate including a connection part formed on one side thereof, the connection part being provided thereon with a solder layer; disposing a conductive heat generator equipped with current wiring on the solder layer; applying current to the current wiring and thus heating the solder layer to attach a semiconductor chip to the connection part; and removing the current wiring from the conductive heat generator. The method is advantageous in that the semiconductor chip is attached to the substrate by applying current to the current wiring of the conductive heat generator to locally heat only the solder layer, thus reducing thermal stress and preventing the deformation of the substrate.

摘要翻译： 本发明公开了一种制造半导体封装板的方法，包括：提供包括形成在其一侧上的连接部分的基板，所述连接部分设置有焊料层; 在焊料层上配置配有电流布线的导电发热体; 向当前布线施加电流，从而加热焊料层以将半导体芯片附接到连接部分; 并从导电热发生器去除当前布线。 该方法的优点在于，通过向导电发热体的电流布线施加电流而将半导体芯片附接到基板，以仅局部加热焊料层，从而降低热应力并防止基板的变形。

公开(公告)号：US11658123B2

公开(公告)日：2023-05-23

申请号：US17032544

申请日：2020-09-25

申请人： ADVANCED MICRO DEVICES, INC.

发明人： Rahul Agarwal ,  Milind S. Bhagavat

IPC分类号： H01L23/538 ,  H01L23/00

CPC分类号： H01L23/5381 ,  H01L24/13 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L2224/13024 ,  H01L2224/24137 ,  H01L2224/24991 ,  H01L2224/25171 ,  H01L2224/25174 ,  H01L2224/25177 ,  H01L2224/82801

摘要： A chip for hybrid bridged fanout chiplet connectivity, the chip comprising: a central chiplet; one or more first chiplets each coupled to the central chiplet using a plurality of fanout traces; and one or more second chiplets each coupled to the central chiplet using one or more interconnect dies (ICDs).

公开(公告)号：US20110237002A1

公开(公告)日：2011-09-29

申请号：US13157453

申请日：2011-06-10

申请人： KENNETH H. CHURCH ,  PATRICK CLARK ,  DONGJIANG XU ,  LANCE SWAN ,  BRYAN IRWIN ,  VLADIMIR PELEKHATY

发明人： KENNETH H. CHURCH ,  PATRICK CLARK ,  DONGJIANG XU ,  LANCE SWAN ,  BRYAN IRWIN ,  VLADIMIR PELEKHATY

IPC分类号： H01L21/66 ,  B05C11/00

CPC分类号： H05K3/125 ,  H01L21/4867 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L25/03 ,  H01L25/065 ,  H01L25/0657 ,  H01L2224/2401 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24147 ,  H01L2224/245 ,  H01L2224/25175 ,  H01L2224/82101 ,  H01L2224/82801 ,  H01L2224/82874 ,  H01L2224/82948 ,  H01L2224/82986 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2924/14 ,  H05K1/0284 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/3484 ,  H05K2201/10515 ,  H05K2201/1053 ,  H01L2924/00012 ,  H01L2924/06 ,  H01L2924/00

摘要： A method for manufacturing an electronic circuit in three-dimensional space provides for interconnecting electronic components within the circuit by directly writing conducting lines. The method may include observing a direct writing tool of a direct write system using a vision system, determining proper placement of the direct writing tool at least partially based on the step of observing, and directly writing conducting lines in three dimensions using the proper placement. The direct writing may be on a surface or in free space. The method may include stacking a plurality of chips to provide a stack having a top surface and edges extending away from the top and interconnecting connections of the chips by directly writing conducting lines along one of the edges.

摘要翻译： 用于制造三维空间中的电子电路的方法通过直接写入导线来提供电路内的电子元件互连。 该方法可以包括观察使用视觉系统的直接写入系统的直接书写工具，至少部分地基于观察步骤确定直接书写工具的正确放置，并且使用适当的位置直接在三维中写入导线。 直接写入可能在表面或自由空间中。 该方法可以包括堆叠多个芯片以提供具有顶表面的边缘和沿顶部延伸的边缘，并且通过沿着边缘之一直接写入导电线来互连芯片的连接。

公开(公告)号：US08790742B2

公开(公告)日：2014-07-29

申请号：US13157453

申请日：2011-06-10

申请人： Kenneth H. Church ,  Patrick Clark ,  Dongjiang Xu ,  Lance Swan ,  Bryan Irwin ,  Vladimir Pelekhaty

发明人： Kenneth H. Church ,  Patrick Clark ,  Dongjiang Xu ,  Lance Swan ,  Bryan Irwin ,  Vladimir Pelekhaty

IPC分类号： B05D5/12 ,  B05D3/00 ,  C23C16/52 ,  H01L23/00 ,  H01L21/48 ,  H01L25/065 ,  H05K3/12 ,  H05K1/16 ,  H05K3/34 ,  H05K1/02 ,  H01L25/03

CPC分类号： H05K3/125 ,  H01L21/4867 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L25/03 ,  H01L25/065 ,  H01L25/0657 ,  H01L2224/2401 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24147 ,  H01L2224/245 ,  H01L2224/25175 ,  H01L2224/82101 ,  H01L2224/82801 ,  H01L2224/82874 ,  H01L2224/82948 ,  H01L2224/82986 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2924/14 ,  H05K1/0284 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/3484 ,  H05K2201/10515 ,  H05K2201/1053 ,  H01L2924/00012 ,  H01L2924/06 ,  H01L2924/00

摘要： A method for manufacturing an electronic circuit in three-dimensional space provides for interconnecting electronic components within the circuit by directly writing conducting lines. The method may include observing a direct writing tool of a direct write system using a vision system, determining proper placement of the direct writing tool at least partially based on the step of observing, and directly writing conducting lines in three dimensions using the proper placement. The direct writing may be on a surface or in free space. The method may include stacking a plurality of chips to provide a stack having a top surface and edges extending away from the top and interconnecting connections of the chips by directly writing conducting lines along one of the edges.

摘要翻译： 用于制造三维空间中的电子电路的方法通过直接写入导线来提供电路内的电子元件互连。 该方法可以包括观察使用视觉系统的直接写入系统的直接书写工具，至少部分地基于观察步骤确定直接书写工具的正确放置，并且使用适当的位置直接在三维中写入导线。 直接写入可能在表面或自由空间中。 该方法可以包括堆叠多个芯片以提供具有顶表面的边缘和沿顶部延伸的边缘，并且通过沿着边缘之一直接写入导电线来互连芯片的连接。

公开(公告)号：US07972650B1

公开(公告)日：2011-07-05

申请号：US11457400

申请日：2006-07-13

申请人： Kenneth H. Church ,  Patrick Clark ,  Dongjiang Xu ,  Lance Swan ,  Bryan Irwin ,  Vladimir Pelekhaty

发明人： Kenneth H. Church ,  Patrick Clark ,  Dongjiang Xu ,  Lance Swan ,  Bryan Irwin ,  Vladimir Pelekhaty

IPC分类号： B05D5/12 ,  B05D3/00

CPC分类号： H05K3/125 ,  H01L21/4867 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L25/03 ,  H01L25/065 ,  H01L25/0657 ,  H01L2224/2401 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24147 ,  H01L2224/245 ,  H01L2224/25175 ,  H01L2224/82101 ,  H01L2224/82801 ,  H01L2224/82874 ,  H01L2224/82948 ,  H01L2224/82986 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2924/14 ,  H05K1/0284 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/3484 ,  H05K2201/10515 ,  H05K2201/1053 ,  H01L2924/00012 ,  H01L2924/06 ,  H01L2924/00

摘要： A method for manufacturing an electronic circuit in three-dimensional space provides for interconnecting electronic components within the circuit by directly writing conducting lines. The method may include observing a direct writing tool of a direct write system using a vision system, determining proper placement of the direct writing tool at least partially based on the step of observing, and directly writing conducting lines in three dimensions using the proper placement. The direct writing may be on a surface or in free space. The method may include stacking a plurality of chips to provide a stack having a top surface and edges extending away from the top and interconnecting connections of the chips by directly writing conducting lines along one of the edges.

摘要翻译： 用于制造三维空间中的电子电路的方法通过直接写入导线来提供电路内的电子元件互连。 该方法可以包括观察使用视觉系统的直接写入系统的直接书写工具，至少部分地基于观察步骤确定直接书写工具的正确放置，并且使用适当的位置直接在三维中写入导线。 直接写入可能在表面或自由空间中。 该方法可以包括堆叠多个芯片以提供具有顶表面的边缘和沿顶部延伸的边缘，并且通过沿着边缘之一直接写入导电线来互连芯片的连接。