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公开(公告)号：US20140030992A1
公开(公告)日：2014-01-30
申请号：US14110111
申请日：2011-04-04
申请人： Mingquan Bao
发明人： Mingquan Bao
CPC分类号： H03D7/1425 , H03C2200/0083 , H03D7/1433 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D7/18 , H03D2200/0033 , H03D2200/0043 , H03D2200/009 , H04B1/04
摘要： A mixer circuit (200, 300, 800, 900) for mixing a first input signal at a first frequency with a second input signal at a second frequency to an output signal at a third frequency. The mixer circuit (200, 300, 800, 900) comprises a mixing stage (205, 805) with differential input ports (206, 207; 820, 821) for the first input signal and an input port (211, 911) for the second input signal and differential output ports for the output signal, which also serve as output ports for the mixer circuit. The mixer circuit (200, 300, 800, 900) comprises a nonlinear digital to analogue converter (210, 810) which has an input port (211) which is the input port for the second input signal and an output port (212) which is connected to the input port of the mixing stage, and the digital to analogue converter has a nonlinear transfer function.
摘要翻译： 一种用于将第一频率的第一输入信号与第二频率的第二输入信号以第三频率混合到输出信号的混频器电路（200,300,800,900）。 混频器电路（200,300,800,900）包括具有用于第一输入信号的差分输入端口（206,207; 820,821）的混合级（205,805）和用于第一输入信号的输入端口（211,911） 输出信号的第二输入信号和差分输出端口，其也用作混频器电路的输出端口。 混频器电路（200,300,800,900）包括非线性数模转换器（210,810），其具有作为第二输入信号的输入端口的输入端口（211）和输出端口（212），其中， 连接到混合级的输入端口，数模转换器具有非线性传递函数。
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公开(公告)号：US09660856B2
公开(公告)日：2017-05-23
申请号：US14806492
申请日：2015-07-22
发明人： John Perry Myers
CPC分类号： H04L27/364 , H03C2200/0083 , H03D3/009 , H03D2200/0088 , H03F1/3211 , H03F1/3247 , H03F3/4508 , H03F3/45475 , H04B1/1036 , H04B3/32 , H04L25/03343 , H04L27/368
摘要： A method and system of compensating for distortion in a baseband in-phase (I) and a corresponding baseband quadrature (Q) signal. The circuit includes an in-phase I attenuator configured to attenuate the baseband in-phase I signal and an in-phase Q attenuator configured to attenuate the baseband Q signal. There are one or more circuits that are configured to receive the attenuated in-phase I signal and the attenuated baseband Q signal. Each circuit performs a different calculation based on predetermined equations configured to determine the IM2, HD2@0°, HD2@90°, IM3@0°, IM3@90°, HD3@0°, and HD3@90°. The distortion compensation circuit is configured to use the result of at least one of the calculation circuits to generate I and Q distortion compensation signals.
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3.发明授权公开(公告)号：US08909180B1
公开(公告)日：2014-12-09
申请号：US13927696
申请日：2013-06-26
发明人： Rizwan Murji
CPC分类号： H03C5/00 , H03C1/06 , H03C3/08 , H03C2200/0041 , H03C2200/0058 , H03C2200/0083
摘要： A transmitter power supply modulates an RF signal without needing to run a calibration/training cycle every time an exciter or PA module is switched in and out or every time the transmitter powers up. During calibration of the exciter module, an exciter module delay factor is determined, and stored in the exciter module, for each signal modulation scheme that may be implemented by the exciter module. During calibration of a power amplifier (PA) module, a power supply modulation (PSM) delay factor is determined for, and stored in, the PA module. During transmitter operation, the exciter module generates RF and envelope signals based on an input signal. The PA module generates a power supply voltage based on the envelope signal and a final delay factor, which final delay factor is based on the exciter module and PSM delay factors. The PA module then modulates the RF signal using the power supply voltage.
摘要翻译： 发射机电源调制RF信号，无需每次激励器或PA模块进入或退出或每次发射机上电时，都会运行校准/训练周期。 在激励器模块的校准期间，对于可由激励器模块实现的每个信号调制方案，确定激励器模块延迟因子并存储在激励器模块中。 在校准功率放大器（PA）模块期间，为PA模块确定并存储在PA模块中的电源调制（PSM）延迟因子。 在发射机操作期间，激励器模块基于输入信号产生RF和包络信号。 PA模块基于包络信号和最终延迟因子产生电源电压，最终延迟因子基于激励器模块和PSM延迟因子。 PA模块然后使用电源电压调制RF信号。
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4.发明授权公开(公告)号：US07884681B1
公开(公告)日：2011-02-08
申请号：US12112006
申请日：2008-04-30
申请人： Nadim Khlat , Ruediger Bauder , David Reed , Baker P. Scott
发明人： Nadim Khlat , Ruediger Bauder , David Reed , Baker P. Scott
CPC分类号： H03C1/06 , H03C1/36 , H03C2200/0083
摘要： Embodiments of the present invention include amplitude-modulated or polar-modulated radio frequency (RF) power amplifier circuitry, in which an envelope power supply input to an RF power amplifier is powered by a pre-distorted amplitude modulation (AM) power supply. The pre-distorted AM power supply receives an AM signal, which is then pre-distorted and amplified to provide an AM power supply signal to the RF power amplifier. The pre-distortion of the AM signal is used to improve the linearity, the efficiency, or both, of the RF power amplifier. The pre-distortion provides a feed-forward system, which may allow use of a reduced bandwidth pre-distorted AM signal to an AM power supply and a reduced bandwidth AM power supply, which may increase efficiency.
摘要翻译： 本发明的实施例包括幅度调制或极调制的射频（RF）功率放大器电路，其中向RF功率放大器输入的包络电源由预失真的幅度调制（AM）电源供电。 预失真的AM电源接收AM信号，然后将其预失真和放大，以向RF功率放大器提供AM电源信号。 AM信号的预失真用于提高RF功率放大器的线性度，效率或两者。 预失真提供前馈系统，其可以允许对AM电源使用减少带宽的预失真AM信号以及降低带宽的AM电源，这可以提高效率。
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公开(公告)号：US5027087A
公开(公告)日：1991-06-25
申请号：US474969
申请日：1990-02-02
申请人： Alan P. Rottinghaus
发明人： Alan P. Rottinghaus
CPC分类号： H03C3/095 , H03C3/0933 , H03L7/189 , H03C2200/005 , H03C2200/0079 , H03C2200/0083
摘要： An improved fast-switching frequency synthesizer is disclosed. The fast-switching frequency synthesizer, according to the invention, utilizes presteering voltage injection at the voltage controlled oscillator ("VCO") with feedback to allow the VCO, and synthesizer, to quickly transition between two given frequencies. This presteering mechanism, with the feedback, allows the presteering voltage to track the variations in the VCO gain from device to device, and gain changes while in operation. This same information is used to implement a means of automatically adjusting the FM deviation of the transmitter since that information varies with the gain of the VCO as does the FM deviation.
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6.发明授权
公开(公告)号：US4890071A
公开(公告)日：1989-12-26
申请号：US262767
申请日：1988-10-26
申请人： George S. Curtis
发明人： George S. Curtis
IPC分类号： H03L7/187 , H03B1/00 , H03C3/00 , H03C3/09 , H03C3/22 , H03L7/081 , H03L7/113 , H03L7/18 , H03L7/189 , H03L7/197
CPC分类号： H03C3/0975 , H03C3/0925 , H03C3/0941 , H03L7/081 , H03L7/113 , H03L7/189 , H03L7/197 , H03B2201/0208 , H03C2200/005 , H03C2200/0083 , H03C3/22
摘要： A programmable low noise frequency modulated signal source including a voltage controlled oscillator (VCO) having a frequency locked loop (FLL) constituting a first feedback path and a phase lock loop (PLL) constituting a second feedback path is provided. The PLL includes a VCO, a programmable fractional-N frequency division network and a phase detector for comparing the phase of the VCO output signal with the phase of a reference signal and for producing an error signal to controllably adjust the output frequency of the VCO. The FLL includes a delay line frequency discriminator, a loop amplifier and filter to provide a feedback signal to a frequency control terminal of the VCO. The frequency discriminator includes a first signal path having a frequency sensitive time delay network to provide a phase shift as a function of the VCO output signal frequency and a second signal path which includes a voltage controlled phase shifting network. The error signal derived from the PLL phase detector is coupled to an input terminal at the voltage controlled phase shifting network. The PLL error signal in combination with a bias signal adjusts the phase difference between the two frequency discriminator signal paths to set the operating point of the FLL phase detector such that the VCO output signal will have a desired frequency and minimum phase noise.
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公开(公告)号：US4649353A
公开(公告)日：1987-03-10
申请号：US717353
申请日：1985-03-29
申请人： John R. Sonnenberg
发明人： John R. Sonnenberg
CPC分类号： H03C3/0966 , H03L7/0898 , H03L7/183 , H03C2200/0083
摘要： In accordance with the present invention, there is provided a method of substantially flattening the modulation response in a frequency synthesizer. The method includes the steps of generating a synthesized frequency in response to a filtered control signal; scaling the synthesized frequency with a scalar; generating a control signal, having a response substantially the reciprocal of the frequency generation response, and indicative of the phase relationship between a reference frequency and the scaled, synthesized frequency; and filtering the control signal, whereby the interaction of the phase relationship control signal response and the frequency generation response approximates a flat modulation response.
摘要翻译： 根据本发明，提供了一种在频率合成器中基本上平坦化调制响应的方法。 该方法包括响应于滤波的控制信号产生合成频率的步骤; 用标量缩放合成频率; 产生具有基本上是频率产生响应的倒数的响应并且指示参考频率和缩放的合成频率之间的相位关系的控制信号; 并且对该控制信号进行滤波，由此相位关系控制信号响应和频率产生响应的相互作用接近于平坦的调制响应。
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8.发明授权Circuit for compensating VCO nonlinearities in frequency modulated phase-locked loops and method thereof 失效用于补偿频率调制相位锁中的VCO非线性的电路及其方法
公开(公告)号：US4117422A
公开(公告)日：1978-09-26
申请号：US865043
申请日：1977-12-27
申请人： Albert Henry Hunt
发明人： Albert Henry Hunt
CPC分类号： H03C3/095 , H03C3/08 , H03C3/222 , H03C2200/005 , H03C2200/0083
摘要： The nonlinear characteristics of a voltage controlled oscillator (VCO) in a phase-locked loop are approximately matched by a single diode in the audio circuitry to provide an essentially constant frequency deviation over the entire frequency range of the phase-locked loop during frequency modulation of the phase-locked loop. A compensating circuit which incorporates the diode samples the error voltage of the phase lock loop and biases the diode accordingly. The audio signal is converted to a current which in turn is used to modulate the bias current through the diode. The resulting AC voltage across the diode is thereby amplitude compensated by the bias current to approximately match the nonlinear characteristics of the VCO at each frequency setting of the phase-locked loop.
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公开(公告)号：US20160248617A1
公开(公告)日：2016-08-25
申请号：US14806492
申请日：2015-07-22
发明人： John Perry Myers
CPC分类号： H04L27/364 , H03C2200/0083 , H03D3/009 , H03D2200/0088 , H03F1/3211 , H03F1/3247 , H03F3/4508 , H03F3/45475 , H04B1/1036 , H04B3/32 , H04L25/03343 , H04L27/368
摘要： A method and system of compensating for distortion in a baseband in-phase (I) and a corresponding baseband quadrature (Q) signal. The circuit includes an in-phase I attenuator configured to attenuate the baseband in-phase I signal and an in-phase Q attenuator configured to attenuate the baseband Q signal. There are one or more circuits that are configured to receive the attenuated in-phase I signal and the attenuated baseband Q signal. Each circuit performs a different calculation based on predetermined equations configured to determine the IM2, HD2@0°, HD2@90°, IM3@0°, IM3@90°, HD3@0°, and HD3@90°. The distortion compensation circuit is configured to use the result of at least one of the calculation circuits to generate I and Q distortion compensation signals.
摘要翻译： 补偿基带同相（I）和对应的基带正交（Q）信号中的失真的方法和系统。 该电路包括被配置为衰减基带同相I信号的同相I衰减器和被配置为衰减基带Q信号的同相Q衰减器。 存在被配置为接收衰减的同相I信号和衰减的基带Q信号的一个或多个电路。 每个电路根据预定的方程式执行不同的计算，该方程式被配置为确定IM2，HD2 @ 0°，HD2 @ 90°，IM3 @ 0°，IM3 @ 90°，HD3 @ 0°和HD3 @ 90°。 失真补偿电路被配置为使用至少一个计算电路的结果来产生I和Q失真补偿信号。
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公开(公告)号：US09124215B2
公开(公告)日：2015-09-01
申请号：US14110111
申请日：2011-04-04
申请人： Mingquan Bao
发明人： Mingquan Bao
CPC分类号： H03D7/1425 , H03C2200/0083 , H03D7/1433 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D7/18 , H03D2200/0033 , H03D2200/0043 , H03D2200/009 , H04B1/04
摘要： A mixer circuit (200, 300, 800, 900) for mixing a first input signal at a first frequency with a second input signal at a second frequency to an output signal at a third frequency. The mixer circuit (200, 300, 800, 900) comprises a mixing stage (205, 805) with differential input ports (206, 207; 820, 821) for the first input signal and an input port (211, 911) for the second input signal and differential output ports for the output signal, which also serve as output ports for the mixer circuit. The mixer circuit (200, 300, 800, 900) comprises a nonlinear digital to analogue converter (210, 810) which has an input port (211) which is the input port for the second input signal and an output port (212) which is connected to the input port of the mixing stage, and the digital to analogue converter has a nonlinear transfer function.
摘要翻译： 一种用于将第一频率的第一输入信号与第二频率的第二输入信号以第三频率混合到输出信号的混频器电路（200,300,800,900）。 混频器电路（200,300,800,900）包括具有用于第一输入信号的差分输入端口（206,207; 820,821）的混合级（205,805）和用于第一输入信号的输入端口（211,911） 输出信号的第二输入信号和差分输出端口，其也用作混频器电路的输出端口。 混频器电路（200,300,800,900）包括非线性数模转换器（210,810），其具有作为第二输入信号的输入端口的输入端口（211）和输出端口（212），其中， 连接到混合级的输入端口，数模转换器具有非线性传递函数。
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