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公开(公告)号：US09986351B2
公开(公告)日：2018-05-29
申请号：US15050139
申请日：2016-02-22
Inventor： Shatam Agarwal , Anand Ilango , Alvin C. Storvik , Cory Jay Peterson , Daniel John Allen , Aniruddha Satoskar
CPC classification number: H04R29/001 , H03F3/181 , H03F2200/03 , H03F2200/222 , H03M1/46 , H03M1/66
Abstract: A portable audio device may be configured to measure load characteristics of headphones. The device may measure direct current (DC) and/or alternating current (AC) characteristics of the load. These characteristics may be measured by an audio component, such as an audio codec chip or integrated circuit (IC) controller, and reported to software or firmware executing on a processor coupled to the audio component. The software or firmware may then take action based on the measured load characteristics. For example, the load characteristics may be compared to a database of headphones and their known load characteristics to determine a particular headphone model or type of headphone attached to the audio output. The processor may then apply an appropriate equalization curve.
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公开(公告)号：US09959856B2
公开(公告)日：2018-05-01
申请号：US14739289
申请日：2015-06-15
Inventor： Aniruddha Satoskar , Daniel J. Allen , Edmund Mark Schneider
CPC classification number: G10K11/175 , H03M1/002 , H03M1/0631 , H03M1/188 , H03M3/466 , H04H20/10 , H04R3/00
Abstract: In accordance with embodiments of the present disclosure, a processing system may include multiple selectable processing paths for processing an analog signal in order to reduce noise, increase dynamic range, and mask audio artifacts associated with a change in noise floor. Techniques are employed to transition between processing paths and calibrate operational parameters of the two paths in order to reduce or eliminate artifacts caused by switching between processing paths.
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公开(公告)号：US10545561B2
公开(公告)日：2020-01-28
申请号：US15233624
申请日：2016-08-10
Inventor： Edmund Mark Schneider , Daniel J. Allen , Saurabh Singh , Aniruddha Satoskar
IPC: G06F1/32 , G06F1/3234 , H03M1/18 , H03M1/00 , G06F1/26 , H03M1/12 , H04R3/04 , G06F1/3203
Abstract: A system may include a plurality of processing paths and a controller. The processing paths may include a first processing path configured to generate a first digital signal based on an analog input signal and one or more other processing paths each configured to consume a smaller amount of power than the first processing path, and each configured to generate a respective digital signal based on the analog input signal, wherein one of the other processing paths has a noise floor based on fidelity characteristics of the analog input signal or subsequent processing requirements of a digital output signal generated from at least one of the first digital signal and the respective digital signals. The controller may be configured to select one of the first digital signal and the respective digital signals as the digital output signal of the processing system based on a magnitude of the analog input signal.
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公开(公告)号：US10263630B2
公开(公告)日：2019-04-16
申请号：US15234741
申请日：2016-08-11
Inventor： Edmund Mark Schneider , Daniel J. Allen , Saurabh Singh , Aniruddha Satoskar
Abstract: In accordance with embodiments of the present disclosure, a processing system may include a plurality of processing paths and a controller. The plurality of processing paths may include a static processing path configured to generate a first digital signal based on an analog input signal and a dynamic processing path configured to generate a second digital signal based on the analog input signal, wherein a parameter of the dynamic processing path is determined based on a characteristic of the analog input signal. The controller may be configured to select the first digital signal as a digital output signal of the processing system when a change is occurring to the characteristic and select the second digital signal as the digital output signal in the absence of change occurring to the characteristic.
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5.发明授权公开(公告)号：US10284217B1
公开(公告)日：2019-05-07
申请号：US15882640
申请日：2018-01-29
Inventor： Edmund Mark Schneider , Daniel J. Allen , Aniruddha Satoskar , Seyedeh Maryam Mortazavi Zanjani , Brian P. Chesney , John C. Tucker , Christophe J. Amadi
Abstract: In accordance with embodiments of the present disclosure, a processing system may include multiple selectable processing paths for processing an analog signal in order to reduce noise and increase dynamic range. Techniques are employed to transition between processing paths and calibrate operational parameters of the two paths in order to reduce or eliminate artifacts caused by switching between processing paths.
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Patent Agency Ranking
公开(公告)号：US10069483B1
公开(公告)日：2018-09-04
申请号：US15680987
申请日：2017-08-18
Inventor： Ramin Zanbaghi , Siladitya Dey , Daniel J. Allen , John L. Melanson , Aniruddha Satoskar
Abstract: A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.
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公开(公告)号：US09998826B2
公开(公告)日：2018-06-12
申请号：US15195711
申请日：2016-06-28
Inventor： Aniruddha Satoskar
CPC classification number: H04R3/04 , G06F3/165 , H03M1/06 , H03M1/188 , H03M1/70 , H04R29/001 , H04R2430/01 , H04R2430/03
Abstract: In accordance with embodiments of the present disclosure, a method for operating a playback path comprising a first dynamic range enhancement subsystem and a second dynamic range enhancement subsystem, wherein an audio signal generated by the first dynamic range enhancement subsystem is communicated to the second dynamic range enhancement subsystem, is provided. The method may include determining a first operating parameter of one of the first dynamic range enhancement subsystem and the second dynamic range enhancement subsystem that affects behavior of the other of the first dynamic range enhancement subsystem and the second dynamic range enhancement subsystem, communicating a control signal between the first dynamic range enhancement subsystem and the second dynamic range enhancement subsystem indicative of the first operating parameter, and setting a second operating parameter of the other of the first dynamic range enhancement subsystem and the second dynamic range enhancement subsystem in response to receipt of the control signal.
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公开(公告)号：US09780800B1
公开(公告)日：2017-10-03
申请号：US15269043
申请日：2016-09-19
Inventor： Aniruddha Satoskar , Daniel J. Allen , Edmund Mark Schneider , Saurabh Singh , John L. Melanson
IPC: H03M1/06
CPC classification number: H03M1/0626 , H03M1/0607 , H03M1/0612 , H03M1/188
Abstract: A method may include processing an analog input signal with a first processing path configured to generate a first digital signal based on the analog input signal; processing the analog input signal with a second processing path configured to generate a second digital signal based on the analog input signal, and adapting a response of an adaptive filter configured to generate a filtered digital signal from the second digital signal to reduce a difference between the filtered digital signal and the first digital signal. The method may additionally or alternatively include determining nonlinearities present in the second processing path based on comparison of the first digital signal and the second digital signal, and applying a linear correction to the second digital signal to generate a corrected second digital signal with decreased nonlinearity from that of the second digital signal.
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公开(公告)号：US10009039B1
公开(公告)日：2018-06-26
申请号：US15681023
申请日：2017-08-18
Inventor： Ramin Zanbaghi , Daniel J. Allen , John L. Melanson , Aniruddha Satoskar
CPC classification number: H03M1/188 , H03H19/004 , H03M1/0626 , H03M1/181 , H04R3/00 , H04R3/04
Abstract: A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.A system may include a plurality of processing paths having a first path configured to generate a first digital signal based on an analog input signal and a second path configured to generate a second digital signal based on the analog input signal, the second path having a high-pass filter for filtering the analog input signal prior to the analog input signal being processed by the remainder of the second path, and the high-pass filter having a corner frequency. Control circuitry may be configured to determine frequency-dependent weighted proportions of the first and second digital signals to be combined into an output digital signal based on a characteristic of the analog input signal. Frequency-dependent weighted proportions may be such that the digital output signal includes spectral content of the first digital signal below the corner frequency to account for spectral content of the second digital signal below the corner frequency being filtered.A system may include an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a variable resistor coupled to the output and having a plurality of modes including a first mode in which the variable resistor has a first resistance and a second mode in which the variable resistor has a second resistance, and control circuitry configured to determine a difference between the input signal and the output signal and switch between modes of the plurality of modes when the difference is less than a predetermined threshold.
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公开(公告)号：US09880802B2
公开(公告)日：2018-01-30
申请号：US15003371
申请日：2016-01-21
Inventor： Aniruddha Satoskar , Daniel J. Allen , Edmund Mark Schneider , Tejasvi Das , Ku He , John L. Melanson
CPC classification number: G06F3/165 , G10L25/09 , H03M1/0617 , H03M1/12 , H03M1/188
Abstract: A processing path may include a controller and a plurality of processing paths including a first processing path and a second processing path. The first path may be configured to generate a first digital signal based on an analog input signal and the second path may be configured to generate a second digital signal based on the analog input signal, wherein the first path has a lower gain and a higher noise floor than the second path. The controller may be configured to determine that a transition between the first path and the second path needs to occur based on the analog input signal crossing a threshold or a prediction that the input signal will cross the threshold and in response to determining the transition between the first path and the second path needs to occur, blend the transition during or near zero cross points of the analog input signal.
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