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134 条记录 (耗时 0.021 秒)

    Method for manufacturing a semiconductor device
    1.
    发明申请
    Method for manufacturing a semiconductor device 有权
    半导体器件的制造方法

    公开(公告)号：US20040259389A1

    公开(公告)日：2004-12-23

    申请号：US10896906

    申请日：2004-07-23

    申请人： Semiconductor Energy Laboratory Co., Ltd.

    发明人： Shunpei Yamazaki ,  Hideto Ohnuma ,  Tamae Takano ,  Toru Mitsuki

    IPC分类号： H01L021/00 ,  H01L021/324 ,  H01L021/42

    CPC分类号： H01L21/02672 ,  H01L21/02686 ,  H01L21/2022 ,  H01L21/2026 ,  H01L27/12 ,  H01L27/1277 ,  H01L27/1285 ,  H01L29/04 ,  H01L29/78621

    摘要： The crystallization method by laser light irradiation forms a multiplicity of convexes (ridges) in the surface of an obtained crystalline semiconductor film, deteriorating film quality. Therefore, it is a problem to provide a method for forming a ridge-reduced semiconductor film and a semiconductor device using such a semiconductor film. The present invention is characterized by heating a semiconductor film due to a heat processing method (RTA method: Rapid Thermal Anneal method) to irradiate light emitted from a lamp light source after crystallizing the semiconductor film by laser light, thereby reducing the ridge.

    摘要翻译： 通过激光照射的结晶方法在所得到的结晶半导体膜的表面形成多个凸部（脊），劣化了膜质量。 因此，提供一种使用这种半导体膜形成脊形半导体膜的方法和半导体器件是一个问题。 本发明的特征在于，通过热处理方法（RTA法：快速热退火法）加热半导体膜，以在通过激光使半导体膜结晶之后照射从灯光源发射的光，从而减小脊。

    Method of implanting a substrate and an ion implanter for performing the method
    3.
    发明申请
    Method of implanting a substrate and an ion implanter for performing the method 有权
    植入基板的方法和用于执行该方法的离子注入机

    公开(公告)号：US20040058513A1

    公开(公告)日：2004-03-25

    申请号：US10251780

    申请日：2002-09-23

    发明人： Adrian Murrell ,  Bernard Harrison ,  Peter Edwards ,  Peter Kindersley ,  Takao Sakase ,  Marvin Farley ,  Shu Satoh ,  Geoffrey Ryding

    IPC分类号： H01L021/26 ,  H01L021/42

    CPC分类号： H01J37/3171 ,  H01J2237/20228 ,  H01J2237/24507 ,  H01J2237/30488 ,  H01J2237/31703

    摘要： An implanter provides two-dimensional scanning of a substrate relative to an implant beam so that the beam draws a raster of scan lines on the substrate. The beam current is measured at turnaround points off the substrate and the current value is used to control the subsequent fast scan speed so as to compensate for the effect of any variation in beam current on dose uniformity in the slow scan direction. The scanning may produce a raster of non-intersecting uniformly spaced parallel scan lines and the spacing between the lines is selected to ensure appropriate dose uniformity.

    摘要翻译： 注入器提供相对于注入束的衬底的二维扫描，使得光束在衬底上绘制扫描线的光栅。 在离开衬底的周转点处测量束电流，并且使用电流值来控制随后的快速扫描速度，以补偿束电流中任何变化对慢扫描方向上的剂量均匀性的影响。 扫描可以产生不相交的均匀间隔的平行扫描线的光栅，并且选择线之间的间隔以确保适当的剂量均匀性。

    Method of disordering quantum well heterostructures
    4.
    发明申请
    Method of disordering quantum well heterostructures 失效
    无序量子阱异质结构的方法

    公开(公告)号：US20040038503A1

    公开(公告)日：2004-02-26

    申请号：US10381814

    申请日：2003-09-08

    发明人： Lan Fu ,  Hark Toe Tan ,  Chennupati Jagadish

    IPC分类号： H01L021/265 ,  H01L021/26 ,  H01L021/04 ,  H01L021/425 ,  H01L021/42

    CPC分类号： H01L33/06 ,  B82Y20/00 ,  H01L21/182 ,  H01L31/035236 ,  H01S5/3413

    摘要： A method of disordering a quantum well heterostructure, including the step of irradiating the heterostructure with a particle beam, wherein the energy of the beam is such that the beam creates a substantially constant distribution of defects within the heterostructure. The irradiating particles can be ions or electrons, and the energy is preferably such that the irradiating particles pass through the heterostructure. Light ions such as hydrogen ions are preferred because they are readily available and produce substantially uniform distributions of point defects at relatively low energies. The method can be used to tune the wavelength range of an optoelectronic device including such a heterostructure, such as a photodetector.

    摘要翻译： 一种使量子阱异质结构失调的方法，包括用粒子束照射异质结构的步骤，其中光束的能量使得光束产生在异质结构内的基本恒定的缺陷分布。 照射颗粒可以是离子或电子，并且能量优选使得照射颗粒通过异质结构。 轻离子如氢离子是优选的，因为它们易于获得并且在相对低的能量下产生基本上均匀的点缺陷分布。 该方法可用于调整包括诸如光电检测器的这种异质结构的光电子器件的波长范围。

    Methods and systems for removing an oxide-induced dead zone in a semiconductor device structure
    6.
    发明申请
    Methods and systems for removing an oxide-induced dead zone in a semiconductor device structure 失效
    用于去除半导体器件结构中的氧化物诱导死区的方法和系统

    公开(公告)号：US20030219921A1

    公开(公告)日：2003-11-27

    申请号：US10156324

    申请日：2002-05-24

    发明人： James R. Biard ,  James K. Guenter

    IPC分类号： H01L021/00 ,  H01L021/31 ,  H01L021/469 ,  H01L021/26 ,  H01L021/324 ,  H01L021/42 ,  H01L021/477

    CPC分类号： H01S5/18313 ,  H01S5/2068

    摘要： A method and system for identifying and/or removing an oxide-induced dead zone in a VCSEL structure is disclosed herein. In general, a VCSEL structure can be formed having at least one oxide layer and an oxide-induced dead zone thereof. A thermal annealing operation can then be performed upon the VCSEL structure to remove the oxide-induced dead zone, thereby permitting oxide VCSEL structures thereof to be reliably and consistently fabricated. An oxidation operation may initially be performed upon the VCSEL structure to form the oxide layer and the associated oxide-induced dead zone. The thermal annealing operation is preferably performed upon the VCSEL after performing a wet oxidation operation upon the VCSEL structure.

    摘要翻译： 本文公开了用于识别和/或去除VCSEL结构中的氧化物诱导死区的方法和系统。 通常，可以形成具有至少一个氧化物层和氧化物诱导的死区的VCSEL结构。 然后可以在VCSEL结构上进行热退火操作以去除氧化物诱导的死区，从而允许可靠且一致地制造其氧化物VCSEL结构。 最初可以在VCSEL结构上进行氧化操作以形成氧化物层和相关联的氧化物诱导的死区。 优选在对VCSEL结构进行湿氧化操作之后，对VCSEL执行热退火操作。

    Benchtop processing
    7.
    发明申请
    Benchtop processing 失效
    台式加工

    公开(公告)号：US20030194883A1

    公开(公告)日：2003-10-16

    申请号：US10123721

    申请日：2002-04-15

    发明人： Woo Sik Yoo

    IPC分类号： H01L021/336 ,  H01L021/26 ,  H01L021/324 ,  H01L021/42 ,  H01L021/477

    CPC分类号： H01L21/68735 ,  H01L21/67742 ,  H01L21/67754 ,  H01L21/68785 ,  Y10S414/135 ,  Y10T29/41

    摘要： A benchtop processing system utilizing a wafer receptacle for wafer processing is provided. The wafer receptacle has a plurality of sloped projections capable of receiving a plurality of wafers having different diameter sizes. The wafer receptacle is transported to a processing chamber from a wafer reception module which can also be used as a cooling module. Advantageously, the benchtop processing system and method of the present invention allows for efficient and compact wafer processing.

    摘要翻译： 提供了一种利用晶片插座进行晶片处理的台式处理系统。 晶片接收器具有能够接收具有不同直径尺寸的多个晶片的多个倾斜突起。 晶片接收器从也可用作冷却模块的晶片接收模块传送到处理室。 有利地，本发明的台式处理系统和方法允许有效且紧凑的晶片处理。

    Method for preparing nitrogen-doped annealed wafer and nitrogen-doped and annealed wafer
    8.
    发明申请
    Method for preparing nitrogen-doped annealed wafer and nitrogen-doped and annealed wafer 有权
    氮掺杂退火晶片和氮掺杂和退火晶片的制备方法

    公开(公告)号：US20030157814A1

    公开(公告)日：2003-08-21

    申请号：US10333771

    申请日：2003-01-22

    发明人： Makoto Iida ,  Masaro Tamatsuka

    IPC分类号： H01L021/322 ,  H01L021/26 ,  H01L021/324 ,  H01L021/42 ,  H01L021/477

    CPC分类号： H01L21/324 ,  H01L21/3225

    摘要： The present invention provides a method for producing a nitrogen-doped annealed wafer, wherein before a wafer sliced from a silicon single crystal doped with at least nitrogen and polished is subjected to a high temperature heat treatment at 1100null C. to 1350null C. in an atmosphere of argon, hydrogen or a mixed gas thereof, a step of maintaining the wafer at a temperature lower than the treatment temperature of the high temperature heat treatment is conducted to allow growth of oxygen precipitation nuclei having such a size that the nuclei should be annihilated by the high temperature heat treatment to such a size that the nuclei should not be annihilated by the high temperature heat treatment, and then the high temperature heat treatment is performed. Thus, there are provided a nitrogen-doped annealed wafer with reducing variation of the BMD density after the annealing among silicon single crystal wafers sliced from various positions of the silicon single crystal without being affected by concentration of nitrogen doped in a silicon single crystal and a method for producing the same.

    摘要翻译： 本发明提供了一种制造氮掺杂退火晶片的方法，其中在从掺杂有至少氮并且抛光的硅单晶切片的晶片在1100℃至1350℃进行高温热处理之前。 在氩气，氢气或其混合气体的气氛中，进行将晶片维持在低于高温热处理的处理温度的温度的步骤，以允许具有如下尺寸的氧沉淀核的生长：核应该 通过高温热处理而被消除，使得不能通过高温热处理来消除核的尺寸，然后进行高温热处理。 因此，提供了氮掺杂退火晶片，其在硅单晶的各个位置切片的硅单晶晶片退火之后具有降低的BMD密度的变化，而不受硅单晶中掺杂的氮的浓度的影响， 其制造方法

    Treatment to eliminate polysilicon defects induced by metallic contaminants
    9.
    发明申请
    Treatment to eliminate polysilicon defects induced by metallic contaminants 失效
    处理以消除由金属污染物引起的多晶硅缺陷

    公开(公告)号：US20030157786A1

    公开(公告)日：2003-08-21

    申请号：US09753283

    申请日：2001-01-02

    申请人： International Business Machines Corporation

    发明人： Brian P. Conchieri ,  David D. Dussault ,  Mousa H. Ishaq

    IPC分类号： H01L021/322 ,  H01L021/26 ,  H01L021/324 ,  H01L021/42 ,  H01L021/477 ,  B08B007/00

    CPC分类号： H01L21/02046 ,  B08B7/00 ,  B08B7/0071 ,  H01L21/3221

    摘要： A method and apparatus are provided for eliminating contaminants including metallic and/or hydrocarbon-containing contaminants on a surface of a semiconductor substrate by heating a semiconductor substrate which may have contaminates on the surface thereof to an elevated temperature within an integrated closed system while simultaneously purging the integrated closed system with a chlorine-containing gas. At the elevated temperatures the chlorine dissociates from the chlorine-containing gas and reacts with the contaminates on the substrate surface to form volatile chloride byproducts with such contaminants which are removed from the integrated closed system while the substrate is continuously heated and purged with the chlorine-containing gas. Subsequently, the substrate is moved to a cooling chamber within the integrated closed system and cooled to provide a semiconductor substrate having a clean surface.

    摘要翻译： 提供了一种方法和装置，用于通过将可能在其表面上具有污染物的半导体衬底加热到​​集成封闭系统内的升高温度，同时清除半导体衬底表面上的金属和/或含烃污染物的污染物 综合封闭系统含有含氯气体。 在升高的温度下，氯从含氯气体中解离，并与衬底表面上的污染物反应，形成具有这种污染物的挥发性氯化物副产物，这些污染物从集成封闭系统中除去，同时衬底被连续加热并用氯 - 含气。 随后，将衬底移动到集成闭合系统内的冷却室，并冷却以提供具有干净表面的半导体衬底。