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    A DRAM MEMORY DEVICE WITH MANUFACTURABLE CAPACITOR
    2.
    发明申请
    A DRAM MEMORY DEVICE WITH MANUFACTURABLE CAPACITOR 审中-公开
    具有可制造电容器的DRAM存储器件

    公开(公告)号：WO2015117222A1

    公开(公告)日：2015-08-13

    申请号：PCT/CA2015/000055

    申请日：2015-02-02

    Applicant: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.

    Inventor： RHIE, Hyoung Seub

    IPC: H01L27/108 ,  G11C11/34 ,  H01L29/40

    CPC classification number: H01L27/10855 ,  H01L27/108 ,  H01L27/10814 ,  H01L27/10817 ,  H01L27/10873 ,  H01L28/90 ,  H01L28/91

    Abstract: A high capacitance embedded capacitor and associated fabrication processes are disclosed for fabricating a capacitor stack in a multi-layer stack to include a first capacitor plate conductor formed with a cylinder-shaped storage node electrode formed in the multi-layer stack, a capacitor dielectric layer surrounding the cylinder-shaped storage node electrode, and a second capacitor plate conductor formed from a conductive layer in the multi-layer stack that is sandwiched between a bottom and top dielectric layer, where the cylinder-shaped storage node electrode is surrounded by and extends through the conductive layer.

    Abstract translation: 公开了一种高电容嵌入式电容器和相关联的制造工艺，用于制造多层堆叠中的电容器堆叠，以包括形成有形成在多层堆叠中的圆柱形存储节点电极的第一电容器板导体，电容器介电层 围绕所述圆筒形存储节点电极的第二电容器板导体，以及由所述多层叠层中的导电层形成的第二电容器板导体，所述第二电容器板导体夹在底部和顶部电介质层之间，其中所述圆柱形存储节点电极被所述第一和第 通过导电层。

    SYSTEM AND METHOD OF OPERATION FOR HIGH CAPACITY SOLID-STATE DRIVE
    3.
    发明申请
    SYSTEM AND METHOD OF OPERATION FOR HIGH CAPACITY SOLID-STATE DRIVE 审中-公开
    用于高容量固态驱动的系统和操作方法

    公开(公告)号：WO2015085414A1

    公开(公告)日：2015-06-18

    申请号：PCT/CA2014/051142

    申请日：2014-11-28

    Applicant: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.

    Inventor： LEE, Hyun Woong

    IPC: G11C16/02 ,  G11C16/08

    CPC classification number: G06F12/0246 ,  G06F2212/1041 ,  G06F2212/214 ,  G06F2212/261 ,  G06F2212/7201 ,  G06F2212/7208

    Abstract: A method of managing a solid-state drive. The method comprises coupling a flash memory device, serially connected with other flash memory devices to form a channel to further form a high-capacity flash memory structure, to a physica! bank of a solid-state drive controller; mapping a logical address from a flash translation fayer to a physical bank of the solid-state drive controller; and mapping the address in the physical bank of the solid-state drive controller to a plurality of physical addresses in the flash memory device.

    Abstract translation: 一种管理固态驱动器的方法。 该方法包括将与其它闪存设备串联连接的闪速存储器件耦合到一个通道以进一步形成大容量闪存结构， 一个固态驱动器控制器; 将逻辑地址从闪存转换器映射到固态驱动器控制器的物理存储体; 以及将固态驱动控制器的物理组中的地址映射到闪速存储器件中的多个物理地址。

    A CELL ARRAY WITH A MANUFACTURABLE SELECT GATE FOR A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    4.
    发明申请
    A CELL ARRAY WITH A MANUFACTURABLE SELECT GATE FOR A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
    具有非易失性半导体存储器件的可制造选择栅的单元阵列

    公开(公告)号：WO2015051452A1

    公开(公告)日：2015-04-16

    申请号：PCT/CA2014/050831

    申请日：2014-08-29

    Applicant: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.

    Inventor： RHIE, Hyoung, Seub

    IPC: G11C16/02 ,  G11C16/24

    CPC classification number: G11C16/0483 ,  G11C16/0416 ,  H01L27/1157 ,  H01L27/11578

    Abstract: A three-dimensional integrated circuit non-volatile memory array includes a memory array with first and second NAND memory cell string stacks having opposite orientations, where each NAND memory cell string includes a plurality of transistors and a source line contact connected in series between a bit line and string extension region which extends from the source line contact and past a first self-aligned SSL gate electrode located on a peripheral end of the NAND memory cell string, and also includes a string select transistor formed with a second self-aligned SSL connected in series between the bit line and the plurality of transistors, where the first and second self-aligned SSL gate electrodes are shared between adjacent NAND memory cell strings having opposite orientations.

    Abstract translation: 三维集成电路非易失性存储器阵列包括具有相反取向的第一和第二NAND存储器单元串组的存储器阵列，其中每个NAND存储器单元串包括多个晶体管，以及串联连接在一位 线和串延伸区域，其从源极线接触延伸并经过位于NAND存储器单元串的外围端上的第一自对准SSL栅电极，并且还包括形成有第二自对准SSL连接的串选择晶体管 串联在位线和多个晶体管之间，其中第一和第二自对准SSL栅电极在具有相反取向的相邻NAND存储器单元串之间共享。

    SYSTEM AND METHOD FOR A NETWORK ACCESS SERVICE
    6.
    发明申请
    SYSTEM AND METHOD FOR A NETWORK ACCESS SERVICE 审中-公开

    公开(公告)号：WO2020124230A1

    公开(公告)日：2020-06-25

    申请号：PCT/CA2019/051844

    申请日：2019-12-18

    Applicant: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.

    Inventor： LU, Xuejun ,  AHMADVAND, Nima

    IPC: H04W48/20 ,  H04W4/24

    Abstract: A network access system providing network access to a mobile terminal or other device via an untrusted access point such as a wireless access point in an untrusted network. The access point registers with a service gateway, and the wireless terminal connects with the access point and receives a first network address for use with the service gateway. The terminal registers with the service gateway via the access point, and a context identity is maintained at the service gateway, associating the terminal with the access point for the duration of the connection. The terminal can then access a wider network through the service gateway. The service gateway may maintain billing and reward data associated with the context identity.

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    7.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
    非易失性半导体存储器件

    公开(公告)号：WO2015051467A1

    公开(公告)日：2015-04-16

    申请号：PCT/CA2014/050985

    申请日：2014-10-10

    Applicant: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC. ,  RHIE, Hyoung Seub

    Inventor： RHIE, Hyoung Seub

    IPC: G11C16/02 ,  G11C5/02

    CPC classification number: G11C16/0483 ,  G11C16/0466 ,  H01L27/11578 ,  H01L29/66833

    Abstract: A non-volatile memory device, comprising: a substrate; a plurality of string stacks disposed over the substrate, each string stack comprising a long axis and a short axis in a plane parallel to the substrate, the long axis extending along a y- direction and the short axis extending along an x-direction, each string stack comprising a plurality of strings being stacked in a direction vertical to the substrate and having a first end and a second end at different locations in the y-direction, the plurality of string stacks comprising a first and a second set of string stacks, at least some of the string stacks of the first set of string stacks being offset along the x- direction from at least some of the string stacks of the second set of string stacks.

    Abstract translation: 一种非易失性存储器件，包括：衬底; 多个串组，其布置在所述衬底上，每个串组包括在平行于所述衬底的平面中的长轴和短轴，所述长轴沿y方向延伸，所述短轴沿x方向延伸，每个 串组合包括多个串沿垂直于基板的方向堆叠并且具有在y方向的不同位置处的第一端和第二端，所述多个串堆叠包括第一和第二组串堆叠， 第一组字符串堆栈的至少一些字符串堆栈沿着x方向从第二组字符串堆栈的至少一些字符串堆栈偏移。

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