Abstract:
A method and apparatus for processing substrates in a cluster tool is disclosed. The transfer chambers of the cluster tool have eight locations to which additional chambers (i.e., load lock, buffer, and processing chambers) may attach. The transfer chamber may be formed of three separate portions. The central portion may be a rectangular shaped portion. The two other portions may be trapezoidal shaped portions. The trapezoidal shaped portions each have three slots through which the substrate can move for processing. The central portion of the transfer chamber may have a removable lid that allows a technician to easily access the transfer chamber.
Abstract:
The present invention generally relates to a method and an apparatus for processing one or more substrates on a roll to roll system. The one or more substrates may pass through several processing chambers to deposit the layers necessary to produce an OLED structure. The processing chambers may include ink jetting chambers, chemical vapor deposition (CVD) chambers, physical vapor deposition (PVD) chambers, and annealing chambers. Additional chambers may also be present.
Abstract:
Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, a photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.
Abstract:
Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300 °C or less.
Abstract:
A method and apparatus for forming solar panels from n-doped silicon, p-doped silicon, intrinsic amorphous silicon, and intrinsic microcrystalline silicon using a cluster tool is disclosed. The cluster tool comprises at least one load lock chamber (102) and at least one transfer chamber (106). A plurality of processing chambers (104) are attached to the transfer chamber. As few as five and as many as thirteen processing chambers can be present.
Abstract:
A method and apparatus for forming solar panels from n-doped silicon, p-doped silicon, intrinsic amorphous silicon, and intrinsic microcrystalline silicon using a cluster tool is disclosed. The cluster tool comprises at least one load lock chamber (102) and at least one transfer chamber (106). A plurality of processing chambers (104) are attached to the transfer chamber. As few as five and as many as thirteen processing chambers can be present.
Abstract:
An organic electroluminescent device comprising an anode layer on a substrate, an organic layer on the anode layer, and a cathode layer on the organic layer. In one embodiment, the cathode layer is subjected to H2 plasma prior to deposition of a protective layer over the cathode. In another embodiment, the organic electroluminescent device is encapsulated with an inner encapsulation layer on the cathode layer, and an outer encapsulation layer on the inner encapsulation layer. The inner layer is optimized for adhesion to the cathode layer.
Abstract:
A plasma display panel including a low k dielectric layer. In one embodiment, the dielectric layer is comprises a fluorine-doped silicon oxide layer such as an SiOF layer. In another embodiment, the dielectric layer comprises a Black Diamond layer. In certain embodiments, a capping layer such as SiN or SiON is deposited over the dielectric layer.