METHOD FOR COATING A SUBSTRATE AND COATER
    2.
    发明申请
    METHOD FOR COATING A SUBSTRATE AND COATER 审中-公开
    涂布基材和涂布机的方法

    公开(公告)号:WO2017182081A1

    公开(公告)日:2017-10-26

    申请号:PCT/EP2016/058896

    申请日:2016-04-21

    IPC分类号: C23C14/34 C23C14/35 H01J37/34

    摘要: A method for coating a substrate (100) with at least one cathode assembly (10) having three or more rotatable targets (20), the three or more rotatable targets each comprising a magnet assembly (25) positioned there within, is provided. The method includes: rotating the magnet assemblies (25) to a plurality of different angular positions with respect to a plane (22) perpendicularly extending from the substrate (100) to an axis (21) of the respective one of the three or more rotatable targets (20); and varying at least one of: a power provided to the three or more rotatable targets (20), a staying time of the magnet assemblies (25), and an angular velocity of the magnet assemblies (25), which is varied continuously, according to a function stored in a database or a memory.

    摘要翻译: 一种用于利用具有三个或更多个可旋转目标(20)的至少一个阴极组件(10)涂覆衬底(100)的方法,所述三个或更多个可旋转目标各自包括磁体组件(25) 定位在那里,被提供。 该方法包括:将磁体组件(25)旋转到相对于从基板(100)垂直延伸到三个或更多个可旋转轴(21)中的相应一个轴的平面(22)的多个不同角位置 目标(20); 并且改变以下中的至少一个:提供给三个或更多个可旋转目标(20)的功率,磁体组件(25)的停留时间以及连续变化的磁体组件(25)的角速度, 到存储在数据库或内存中的函数。

    METHOD OF IGZO AND ZNO TFT FABRICATION WITH PECVD SiO2 PASSIVATION
    3.
    发明申请
    METHOD OF IGZO AND ZNO TFT FABRICATION WITH PECVD SiO2 PASSIVATION 审中-公开
    用PECVD SiO2钝化制备IGZO和ZNO TFT的方法

    公开(公告)号:WO2013003004A2

    公开(公告)日:2013-01-03

    申请号:PCT/US2012/041603

    申请日:2012-06-08

    摘要: The present invention generally relates to a method of manufacturing a TFT. The TFT has an active channel that comprises IGZO or zinc oxide. After the source and drain electrodes are formed, but before the passivation layers or etch stop layers are deposited thereover, the active channel is exposed to an N 2 O or O 2 plasma. The interface between the active channel and the passivation layers or etch stop layers are either altered or damaged during formation of the source and drain electrodes. The N 2 O or O 2 plasma alters and repairs the interface between the active channel and the passivation or etch stop layers.

    摘要翻译: 本发明总体上涉及一种制造TFT的方法。 TFT具有包含IGZO或氧化锌的有源沟道。 在形成源电极和漏电极之后,但是在其上沉积钝化层或蚀刻停止层之前,将活性通道暴露于N 2 O或O 2等离子体 。 在形成源电极和漏电极期间,有源沟道与钝化层或蚀刻停止层之间的界面或者被改变或者被损坏。 N 2 O或O 2等离子体改变并修复有源沟道和钝化层或蚀刻停止层之间的界面。

    LOW TEMPERATURE PROCESS FOR TFT FABRICATION
    9.
    发明申请
    LOW TEMPERATURE PROCESS FOR TFT FABRICATION 审中-公开
    TFT制造的低温工艺

    公开(公告)号:WO2004112104A2

    公开(公告)日:2004-12-23

    申请号:PCT/US2004/017236

    申请日:2004-06-01

    IPC分类号: H01L21/00

    摘要: Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H 2 plasma. After subjecting the gate metal to an H 2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H 2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n + silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300 °C or less.

    摘要翻译: 制造薄膜晶体管(TFT)的方法,其中栅极金属沉积到衬底上以便形成薄膜晶体管的栅极。 衬底可以是绝缘衬底或滤色器。 在第一种方法中,栅极金属经受H 2等离子体。 在使栅极金属进入H 2等离子体之后,栅极绝缘膜沉积在栅极上。 在第二种方法中,第一和第二栅极绝缘膜层分别以第一和第二沉积速率沉积在栅极上。 在H2或氩稀释条件下沉积一层,并且具有改善的绝缘条件,而另一层用于降低双层栅极绝缘体的总体压应力。 在第三种方法中,通过在约300℃或更低的衬底温度下保持硅烷,膦和氢气流入处理室,在衬底上形成n +硅膜。