公开(公告)号：WO2017116763A2

公开(公告)日：2017-07-06

申请号：PCT/US2016/067234

申请日：2016-12-16

Applicant: HEADWAY TECHNOLOGIES, INC. ,  IBM CORPORATION

Inventor： JAN, Guenole ,  WANG, Po-Kang ,  DeBROSSE, John ,  LEE, Yuan-Jen

IPC: G11C29/02 ,  G11C11/16

CPC classification number: G11C11/1673 ,  G11C11/005 ,  G11C11/417 ,  G11C17/02 ,  G11C29/021 ,  G11C29/026 ,  G11C29/028 ,  G11C29/44

Abstract: A circuit and method for adaptive trimming of the reference signal for sensing data during a read operation of magnetic memory cells to improve read margin for the magnetic memory cells. The circuit has a trim one-time programmable memory array programmed with offset trim data applied to magnetic memory array sense amplifiers. Sense amplifier trimming circuits receive and decode the trim data to determine offset trim signal magnitude to adjust the reference signal to improve the read margin. The method sets the offset trim level to each increment of the offset trim level. Data is written and read to the magnetic memory array, the number of errors in the array is accumulated for each setting of the offset trim level. The error levels are compared and the appropriate trim level is programmed to the trim memory cells such that a read margin of the sense amplifier is improved.

Abstract translation: 一种用于在磁存储单元的读取操作期间对参考信号进行自适应修整以用于感测数据的电路和方法，以提高磁存储单元的读取余量。 该电路具有一个微调一次性可编程存储器阵列，该微处理器阵列通过将失调微调数据应用于磁存储器阵列读出放大器而编程。 读出放大器微调电路接收并解码微调数据以确定偏移微调信号幅度以调整参考信号以提高读取裕度。 该方法将偏移修剪水平设置为偏移修剪水平的每个增量。 数据被写入并被读取到磁存储器阵列中，阵列中的错误数量针对偏移微调水平的每个设置而被累积。 比较错误等级，并将适当的修整等级编程到修整存储单元，从而改善读出放大器的读取裕度。

公开(公告)号：WO2017116763A3

公开(公告)日：2017-07-06

申请号：PCT/US2016/067234

申请日：2016-12-16

Applicant: HEADWAY TECHNOLOGIES, INC. ,  IBM CORPORATION

Inventor： JAN, Guenole ,  WANG, Po-Kang ,  DeBROSSE, John ,  LEE, Yuan-Jen

IPC: G11C29/02 ,  G11C11/16 ,  G11C29/44

Abstract: A circuit and method for adaptive trimming of the reference signal for sensing data during a read operation of magnetic memory cells to improve read margin for the magnetic memory cells. The circuit has a trim one-time programmable memory array programmed with offset trim data applied to magnetic memory array sense amplifiers. Sense amplifier trimming circuits receive and decode the trim data to determine offset trim signal magnitude to adjust the reference signal to improve the read margin. The method sets the offset trim level to each increment of the offset trim level. Data is written and read to the magnetic memory array, the number of errors in the array is accumulated for each setting of the offset trim level. The error levels are compared and the appropriate trim level is programmed to the trim memory cells such that a read margin of the sense amplifier is improved.

公开(公告)号：WO2019118288A1

公开(公告)日：2019-06-20

申请号：PCT/US2018/064425

申请日：2018-12-07

Applicant: HEADWAY TECHNOLOGIES, INC.

Inventor： PATEL, Sahil ,  JAN, Guenole ,  TONG, Ru-Ying ,  SUNDAR, Vignesh ,  SHEN, Dongna ,  WANG, Yu-Jen ,  WANG, Po-Kang ,  LIU, Huanlong

IPC: H01L43/08 ,  H01L43/12

Abstract: A magnetic tunnel junction (MTJ) is disclosed wherein a free layer (14, FL) interfaces with a first metal oxide (17a, Mox) layer and second metal oxide (13, tunnel barrier) to produce perpendicular magnetic anisotropy (PMA) in the FL. In some embodiments, conductive metal channels (15c) made of a noble metal are formed in the Mox that is MgO to reduce parasitic resistance. In a second embodiment, a discontinuous MgO layer with a plurality of islands is formed as the Mox layer and a non-magnetic hard mask layer is deposited to fill spaces between adjacent islands and form shorting pathways through the Mox. In an additional example, end portions between the sides of a center Mox portion and the MTJ sidewall are reduced to form shorting pathways by depositing a reducing metal layer on Mox sidewalls, or performing a reduction process with forming gas, H2, or a reducing species.

公开(公告)号：WO2005024856A2

公开(公告)日：2005-03-17

申请号：PCT/US2004/027586

申请日：2004-08-24

Applicant: APPLIED SPINTRONICS TECHNOLOGY, INC. ,  HEADWAY TECHNOLOGIES, INC. ,  SHI, Xizeng ,  WANG, Po-Kang ,  GUO, Yimin ,  MIN, Tai

Inventor： SHI, Xizeng ,  WANG, Po-Kang ,  GUO, Yimin ,  MIN, Tai

IPC: H01F

CPC classification number: H01L27/228 ,  B82Y10/00 ,  H01L43/08

Abstract: A method and system for providing a magnetic element and a magnetic memory using the magnetic element are disclosed. The magnetic memory includes a plurality of magnetic elements. The method and system include providing a plurality of layers and a passivation layer for each of the plurality of magnetic elements. A portion of the layers in the magnetic element includes at least one magnetic layer. The plurality of layers also has a top and a plurality of sides. The passivation layer covers at least a portion of the plurality of sides.

Abstract translation: 公开了一种用于提供使用该磁性元件的磁性元件和磁性存储器的方法和系统。 磁存储器包括多个磁性元件。 该方法和系统包括为多个磁性元件中的每一个提供多个层和钝化层。 磁性元件中的一部分层包括至少一个磁性层。 多个层也具有顶部和多个侧面。 钝化层覆盖多个侧面的至少一部分。

公开(公告)号：WO2018169676A1

公开(公告)日：2018-09-20

申请号：PCT/US2018/019841

申请日：2018-02-27

Applicant: HEADWAY TECHNOLOGIES, INC.

Inventor： IWATA, Jodi Mari ,  JAN, Guenole ,  TONG, Ru-Ying ,  WANG, Po-Kang

IPC: H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  G11C11/16

Abstract: A magnetic tunnel junction (MTJ) is disclosed wherein first and second interfaces of a free layer (FL) with a first metal oxide (Hk enhancing layer) and second metal oxide (tunnel barrier), respectively, produce perpendicular magnetic anisotropy (PMA) to increase thermal stability. In some embodiments, metal clusters are formed in the FL and are subsequently partially or fully oxidized by scavenging oxygen to generate additional FL/oxide interfaces that enhance PMA, provide an acceptable resistance x area (RA) value, and preserve the magnetoresistive ratio. In other embodiments, a continuous or discontinuous metal (M) or MQ alloy layer within the FL reacts with scavenged oxygen to form a partially oxidized metal or alloy layer that enhances PMA and maintains acceptable RA. M is one of Mg, Al, B, Ca, Ba, Sr, Ta, Si, Mn, Ti, Zr, or Hf, and Q is a transition metal, B, C, or Al.

公开(公告)号：WO2016160578A1

公开(公告)日：2016-10-06

申请号：PCT/US2016/024236

申请日：2016-03-25

Applicant: HEADWAY TECHNOLOGIES, INC.

Inventor： JAN, Guenole ,  WANG, Po-Kang ,  LEE, Yuan-Jen ,  ZHU, Jian ,  LIU, Huanlong

IPC: G11C17/16

CPC classification number: G11C17/18 ,  G11C11/005 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/409 ,  G11C11/419 ,  G11C17/02 ,  G11C17/16 ,  G11C2213/71 ,  H01L27/228 ,  H01L43/12

Abstract: An integrated circuit includes a magnetic OTP memory array formed of multiple magnetic OTP memory cells having an MTJ stack with a fixed magnetic layer, a tunnel barrier insulating layer, a free magnetic layer, and a second electrode. When a voltage is applied across the magnetic OTP memory cell, the resistance of the MTJ stack and the gating transistor form a voltage divider to apply a large voltage across the MTJ stack to breakdown the tunnel barrier to short the fixed layer to the free layer. The integrated circuit has multiple MRAM arrays configured such that each of the multiple MRAM arrays have performance and density criteria that match MOS transistor based memory including SRAM, DRAM, and flash memory. The integrated circuit may include a functional logic unit connected with the magnetic OTP memory arrays and the MRAM arrays for providing digital data storage.

Abstract translation: 集成电路包括由具有固定磁性层的MTJ堆叠的多个磁性OTP存储单元形成的磁性OTP存储器阵列，隧道势垒绝缘层，自由磁性层和第二电极。 当跨越磁性OTP存储单元施加电压时，MTJ堆叠和门控晶体管的电阻形成分压器，以跨越MTJ堆叠施加大电压以击穿隧道势垒以将固定层短路到自由层。 集成电路具有多个MRAM阵列，其配置成使得多个MRAM阵列中的每一个具有与包括SRAM，DRAM和闪速存储器在内的基于MOS晶体管的存储器的性能和密度标准。 集成电路可以包括与磁性OTP存储器阵列连接的功能逻辑单元和用于提供数字数据存储的MRAM阵列。

公开(公告)号：WO2006113093A2

公开(公告)日：2006-10-26

申请号：PCT/US2006/011963

申请日：2006-03-30

Applicant: HEADWAY TECHNOLOGIES, INC. ,  APPLIED SPINTRONICS, INC. ,  WANG, Po-Kang ,  RONG, Yin ,  YANG, Hsu, Kai ,  SHI, Xizeng

Inventor： WANG, Po-Kang ,  RONG, Yin ,  YANG, Hsu, Kai ,  SHI, Xizeng

IPC: G11C11/00

CPC classification number: G11C8/08 ,  G11C11/15

Abstract: The word line segment select transistor of a segmented word line array is placed on the word line current source side. This eliminates many undesirable effects currently associated with segmented word line MRAM arrays.

Abstract translation: 分段字线阵列的字线选择晶体管被放置在字线电流源侧。 这消除了目前与分段字线MRAM阵列相关联的许多不期望的影响。

公开(公告)号：WO2005081255A1

公开(公告)日：2005-09-01

申请号：PCT/US2005/004701

申请日：2005-02-11

Applicant: APPLIED SPINTRONICS TECHNOLOGY, INC. ,  HEADWAY TECHNOLOGIES, INC. ,  SHI, Xizeng ,  LE, Son ,  WANG, Po-Kang ,  MIN, Tai

Inventor： SHI, Xizeng ,  LE, Son ,  WANG, Po-Kang ,  MIN, Tai

IPC: G11C11/00

CPC classification number: G11C11/16

Abstract: A method and system for programming a magnetic memory is disclosed. The method and system further include turning on a word line current and turning on a bit line current. The word line current is for generating at least one hard axis field. The bit line current is for generating at least one easy axis field. In one aspect, the method and system further include turning off the word line current and the bit line current such that a state of the at least one magnetic memory cell is repeatably obtained. In another aspect, the word line current is turned off after the bit line current is turned off.

Abstract translation: 公开了一种用于编程磁存储器的方法和系统。 该方法和系统还包括打开字线电流并打开位线电流。 字线电流用于产生至少一个硬轴字段。 位线电流用于产生至少一个易轴场。 在一个方面，该方法和系统还包括关闭字线电流和位线电流，从而可重复获得至少一个磁存储单元的状态。 另一方面，在位线电流关闭之后，字线电流被关断。

公开(公告)号：WO2018186971A1

公开(公告)日：2018-10-11

申请号：PCT/US2018/021007

申请日：2018-03-06

Applicant: HEADWAY TECHNOLOGIES, INC

Inventor： LIU, Huanlong ,  LEE, Yuan-Jen ,  ZHU, Jian ,  JAN, Guenole ,  THOMAS, Luc ,  WANG, Po-Kang ,  TONG, Ru-Ying ,  IWATA, Jodi, Mari

IPC: H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: A magnetic tunnel junction with perpendicular magnetic anisotropy (PMA MTJ) is disclosed wherein a free layer (14) has an interface (20) with a tunnel barrier (13) and a second interface (21) with an oxide layer (15). A lattice-matching layer (16-1) adjoins an opposite side of the oxide layer with respect to the free layer and is comprised of Co x FeyNi z L w M v or Co x FeyNi z L w wherein L is one of B, Zr, Nb, Hf, Mo, Cu, Cr, Mg, Ta, Ti, Au, Ag, or P, and M is one of Mo, Mg, Ta, Cr, W, or V, (x + y + z + w + v) = 100 atomic%, x + y > 0, and each of v and w are > 0. The lattice-matching layer grows a BCC structure during annealing at about 400°C thereby promoting BCC structure growth in the oxide layer. As a result, free layer PMA is enhanced and maintained to yield improved thermal stability.

公开(公告)号：WO2017091310A1

公开(公告)日：2017-06-01

申请号：PCT/US2016/058449

申请日：2016-10-24

Applicant: HEADWAY TECHNOLOGIES, INC.

Inventor： ZHU, Jian ,  JAN, Guenole ,  LEE, Yuan-Jen ,  LIU, Huanlong ,  TONG, Ru-Ying ,  WANG, Po-Kang

IPC: H01L43/08 ,  H01F10/16 ,  H01F10/32 ,  H01L43/12

CPC classification number: H01L43/08 ,  G11C11/161 ,  H01F10/16 ,  H01F10/30 ,  H01F10/32 ,  H01F10/3254 ,  H01F10/3286 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12

Abstract: A seed layer stack (24) with a smooth top surface having a peak to peak roughness of 0.5 nm is formed by sputter depositing an amorphous layer (22) on a seed layer (21) such as Mg where the seed layer has a resputtering rate 2 to 30X that of the amorphous layer. The uppermost seed layer (23) is a template layer that is NiCr or NiFeCr. As a result, perpendicular magnetic anisotropy in an overlying magnetic layer that is a reference layer, free layer, or dipole layer is substantially maintained during high temperature processing up to 400°C and is advantageous for magnetic tunnel junctions in embedded MRAMs, spintronic devices, or in read head sensors. The amorphous seed layer is SiN, TaN, or CoFeM where M is B or another element with a content that makes CoFeM amorphous as deposited. The seed layer stack may include a bottommost Ta or TaN buffer layer.

Abstract translation: 通过在晶种层（21）上溅射沉积非晶层（22）来形成具有平滑顶面的种子层叠层（24），峰谷粗糙度为0.5nm，所述晶种层（21）例如Mg 其中种子层具有非晶层的2至30倍的再溅射速率。 最上面的种子层（23）是NiCr或NiFeCr的模板层。 结果，在作为参考层，自由层或偶极层的上覆磁层中的垂直磁各向异性在高达400℃的高温处理期间基本上保持不变，并且对于嵌入式MRAM，自旋电子器件等中的磁隧道结是有利的。 或读头传感器。 无定形晶种层是SiN，TaN或CoFeM，其中M是B或另一种元素，其含量使CoFeM在沉积时为非晶态。 种子层堆叠可以包括最下面的Ta或TaN缓冲层。