公开(公告)号：WO2019112644A1

公开(公告)日：2019-06-13

申请号：PCT/US2018/037217

申请日：2018-06-13

申请人： MP HIGH TECH SOLUTIONS PTY LTD. ,  LYON, Ben

发明人： STEFFANSON, Marek

IPC分类号： B81B7/04 ,  H01L31/0203 ,  H01L31/0232

CPC分类号： G01J5/10 ,  B81C1/00142 ,  B81C1/0019 ,  B81C2201/0132 ,  G01J5/045 ,  G01J5/0806 ,  G01J5/40

摘要： A method of fabricating radiation detection devices includes: forming a structural layer overlying a frontside of a substrate; forming a metallic layer overlying the structural layer; releasing each of a plurality of devices on the substrate by etching a backside of the substrate, wherein each device comprises a plate and legs attached to the plate, the legs comprising at least a portion of the metallic layer; and sealing each of the plurality of devices, the sealing comprising: attaching a transparent cavity cap to the frontside of the substrate; and attaching a radiation-transparent substrate to the backside of the substrate.

公开(公告)号：WO2015160412A3

公开(公告)日：2015-12-10

申请号：PCT/US2015012815

申请日：2015-01-26

申请人： UNIV COLORADO ,  DRS RSTA INC DRS TECHNOLOGIES

发明人： BRIGHT VICTOR M ,  GEORGE STEVEN ,  BROWN JOSEPH J ,  EIGENFELD NATHAN T ,  GRAY JASON M ,  SKIDMORE GEORGE DEE

IPC分类号： G01J5/02

CPC分类号： B82B3/008 ,  B05D3/145 ,  B05D7/24 ,  B81C1/0019 ,  B81C1/00492 ,  B82B1/005 ,  B82Y30/00 ,  C23C16/01 ,  C23C16/0245 ,  C23C16/14 ,  C23C16/403 ,  C23C16/45525 ,  C23C16/45553 ,  C23C16/45555 ,  C23C16/56 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention relates to novel nano- and micro-electromechanical devices and novel methods of preparing them. In one aspect, the invention includes methods of preparing a nanodevice. In certain embodiments, the methods comprise coating a polymer layer with a first at least one thin solid material layer using atomic layer deposition (ALD), thus forming an ALD-generated layer. In other embodiments, the methods comprise patterning the first at least one thin solid material layer to form a nanodevice. In yet other embodiments, the methods comprise releasing the nanodevice from the polymer layer.

摘要翻译： 本发明涉及新颖的纳米和微机电装置以及制备它们的新方法。 一方面，本发明包括制备纳米器件的方法。 在某些实施方案中，所述方法包括使用原子层沉积（ALD）用第一至少一个薄固体材料层涂覆聚合物层，由此形成ALD生成层。 在其他实施例中，该方法包括图案化第一至少一个薄固体材料层以形成纳米装置。 在其他实施例中，该方法包括从聚合物层释放纳米装置。

公开(公告)号：WO2009066968A3

公开(公告)日：2009-08-20

申请号：PCT/KR2008006927

申请日：2008-11-24

申请人： SEOUL NAT UNIV IND FOUNDATION ,  HONG SEUNG-HUN ,  LEE BYUNG-YANG

发明人： HONG SEUNG-HUN ,  LEE BYUNG-YANG

IPC分类号： B82B1/00

CPC分类号： B81C1/0019 ,  B81B2201/0292 ,  B81C2201/0109

摘要： Disclosed is a method for arranging nanostructures and a method for fabricating a nano device. The method for arranging nanostructures in a certain direction includes: forming a sacrificial structure having a face in the certain direction on a substrate; forming the nanostructures at least on the face of the certain direction of the sacrificial structure; and removing the sacrificial structure.

摘要翻译： 公开了用于布置纳米结构的方法和用于制造纳米器件的方法。 用于将纳米结构布置在特定方向上的方法包括：在衬底上形成具有在特定方向上的面的牺牲结构; 至少在牺牲结构的特定方向的面上形成纳米结构; 并去除牺牲结构。

公开(公告)号：WO02017362A2

公开(公告)日：2002-02-28

申请号：PCT/US2001/026298

申请日：2001-08-22

IPC分类号： H01L29/73 ,  C30B11/00 ,  C30B25/00 ,  G01N27/12 ,  G01N27/414 ,  G01N33/543 ,  G11C13/02 ,  H01L21/329 ,  H01L21/331 ,  H01L23/532 ,  H01L27/10 ,  H01L29/06 ,  H01L29/207 ,  H01L29/267 ,  H01L29/88 ,  H01L33/06 ,  H01L33/18 ,  H01L51/00 ,  H01L51/30 ,  H01L21/00

CPC分类号： H01L29/0665 ,  B01J23/50 ,  B01J23/52 ,  B01J23/72 ,  B01J35/0013 ,  B01J37/349 ,  B81C1/0019 ,  B81C1/00206 ,  B82Y10/00 ,  B82Y15/00 ,  B82Y30/00 ,  B82Y40/00 ,  C30B11/00 ,  C30B25/005 ,  C30B29/605 ,  G01N27/4146 ,  G01N33/54373 ,  G11C13/0014 ,  G11C13/0019 ,  G11C13/025 ,  G11C13/04 ,  G11C2213/77 ,  G11C2213/81 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/0254 ,  H01L21/02543 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/02573 ,  H01L21/02581 ,  H01L21/02603 ,  H01L21/02606 ,  H01L21/0262 ,  H01L21/02628 ,  H01L21/02631 ,  H01L21/02636 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02653 ,  H01L23/53276 ,  H01L29/045 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/16 ,  H01L29/1602 ,  H01L29/18 ,  H01L29/20 ,  H01L29/207 ,  H01L29/22 ,  H01L29/24 ,  H01L29/26 ,  H01L29/267 ,  H01L33/06 ,  H01L33/18 ,  H01L33/20 ,  H01L51/002 ,  H01L51/0048 ,  H01L2924/0002 ,  Y02E10/549 ,  Y02P70/521 ,  Y10S438/962 ,  Y10S977/762 ,  Y10S977/847 ,  Y10S977/858 ,  Y10S977/882 ,  Y10S977/883 ,  Y10S977/892 ,  Y10S977/936 ,  Y10T428/24 ,  H01L2924/00

摘要： A bulk-doped semiconductor that is at least one of the following: a single crystal, an elongated and bulk-doped semiconductor that, at any point along its longitudinal axis, has a largest cross-sectional dimension less than 500 nanometers, and a free-standing and bulk-doped semiconductor with at least one portion having a smallest width of less than 500 nanometers. Such a semiconductor may comprise an interior core comprising a first semiconductor; and an exterior shell comprising a different material than the first semiconductor. Such a semiconductor may be elongated and may have, at any point along a longtiudinal section of such a semiconductor, a ratio of the length of the section to a longest width which is greater than 4:1, or greater than 10:1, or greater than 100:1, or even greater than 1000:1. At least one portion of such a semiconductor may a smallest width of less than 200 nanometers, or less than 150 nanometers, or less than 100 nanometers, or less than 80 nanometers, or less than 70 nanometers, or less than 60 nanometers, or less than 40 nanometers, or less than 20 nanometers, or less than 10 nanometers, or even less than 5 nanometers. Such a semiconductor may be a single crystal and may be free-standing. Such a semiconductor may be either lightly n-doped, heavily n-doped, lightly p-doped or heavily p-doped. Such a semiconductor may be doped during growth. Such a semiconductor may be part of a device, which may include any of a variety of devices and combinations thereof, and a variety of assembling techniques may be used to fabricate devices from such a semiconductor. Two or more of such a semiconductors, including an array of such semiconductors, may be combined to form devices, for example, to form a crossed p-n junction of a device. Such devices at certain sizes may exhibit quantum confinement and other quantum phenomena, and the wavelength of light emitted from one or more of such semiconductors may be controlled by selecting a width of such semiconductors. Such semiconductors and device made therefrom may be used for a variety of applications.

摘要翻译： 体积掺杂半导体，其为以下至少一个：单晶，细长体积掺杂半导体，其沿​​着其纵向轴线的任何点具有小于500纳米的最大横截面尺寸， 具有至少一部分具有小于500纳米的最小宽度的单体和体掺杂半导体。 这样的半导体可以包括：内部芯，其包括第一半导体; 以及包括与第一半导体不同的材料的外壳。 这种半导体可以是细长的，并且在沿着这种半导体的长方形部分的任何点处可以具有部分的长度与最大宽度大于4:1或大于10:1的比率，或 大于100：1，甚至大于1000：1。 这种半导体的至少一部分可以具有小于200纳米，或小于150纳米，或小于100纳米，或小于80纳米，或小于70纳米，或小于60纳米或更小的最小宽度 小于20纳米，或小于10纳米，甚至小于5纳米。 这样的半导体可以是单晶，并且可以是独立的。 这样的半导体可以是轻掺杂的，非常n掺杂的，轻掺杂的p掺杂的或重p掺杂的。 这样的半导体可以在生长期间被掺杂。 这样的半导体可以是设备的一部分，其可以包括各种设备及其组合中的任何一种，并且可以使用各种组装技术来从这种半导体制造设备。 包括这种半导体阵列的这种半导体中的两个或更多个可以被组合以形成器件，例如以形成器件的交叉p-n结。 某些尺寸的这种器件可能表现出量子限制和其他量子现象，并且可以通过选择这种半导体的宽度来控制从一个或多个这样的半导体发射的光的波长。 这样的半导体和由其制成的器件可以用于各种应用。

公开(公告)号：WO2019059849A1

公开(公告)日：2019-03-28

申请号：PCT/SG2018/050485

申请日：2018-09-24

申请人： NANYANG TECHNOLOGICAL UNIVERSITY

发明人： LIU, Zhiyuan ,  QI, Dianpeng ,  LIEDBERG, Bo Gunnar ,  CHEN, Xiaodong

IPC分类号： G01L1/22 ,  G01L5/00 ,  B81B3/00 ,  B82Y15/00

CPC分类号： B81C1/00206 ,  B81B2201/0292 ,  B81B2203/0361 ,  B81B2207/053 ,  B81C1/0019 ,  B81C2201/034 ,  B82Y15/00 ,  G01L1/2287

摘要： A sensor comprising a support and a flexible structure arranged on the support is provided. The flexible structure comprises a frustum-shaped portion having a wider end and a narrower end, wherein the wider end of the frustum-shaped portion is arranged proximal to the support, and an elongated portion extending from the narrower end of the frustum-shaped portion, wherein the flexible structure further comprises a stretchable conducting film arranged on the frustum-shaped portion. A method of preparing such a sensor is also provided.

公开(公告)号：WO2014022558A1

公开(公告)日：2014-02-06

申请号：PCT/US2013/053019

申请日：2013-07-31

申请人： WAYNE STATE UNIVERSITY

发明人： XU, Yong ,  TU, Hongen ,  KIM, Eric, Gr ,  JOHN, Jessin, K.

IPC分类号： H01L21/31 ,  H01L29/06

CPC分类号： H01L21/3065 ,  B81C1/0019 ,  G01L19/0092 ,  G01L2009/0069 ,  H01L21/3081 ,  H01L21/56 ,  H01L27/1218 ,  H01L27/1262 ,  H01L29/0657 ,  H01L29/7842 ,  H05K1/0278 ,  H05K1/0283 ,  H05K3/007

摘要： A method of making a flexible, foldable, stretchable electronic device. The method includes deposition of a polymer layer, such as parylene C, to impart flexibility to the device. The device overcomes the limitations of related flexible electronics schemes by employing established silicon-on-insulator complementary metal-oxide-semiconductor technology with a flexible enclosure. Devices made in such a way may be used in a wide variety of applications including incorporation into medical devices.

摘要翻译： 制造柔性，可折叠，可拉伸的电子装置的方法。 该方法包括聚合物层（例如聚对二甲苯C）的沉积，以赋予该装置的柔性。 该器件通过采用已建立的绝缘体上硅互补金属氧化物半导体技术与柔性封装来克服相关柔性电子方案的局限性。 以这种方式制造的装置可以用于各种应用，包括并入医疗装置。

公开(公告)号：WO2011108786A1

公开(公告)日：2011-09-09

申请号：PCT/KR2010/005442

申请日：2010-08-18

申请人： 전북대학교산학협력단 ,  정광운 ,  진광용

发明人： 정광운 ,  진광용

IPC分类号： B29C67/00

CPC分类号： B29C67/00 ,  B81B3/0021 ,  B81B2203/058 ,  B81C1/0019

摘要： 본 발명은 3차원 폴딩 액추에이터의 제조방법에 관한 것이다. 본 발명은 PDMS가 적용되는 부분을 제외하고 이미드 필름을 이용하여 빈 공간을 충전시키는 제 1단계와, 상기 이미드 필름과 몰드의 표면에 불소를 처리하여 PDMS층을 형성하는 제 2단계와, 상기 PDMS층을 열경화시킨 후 이미드 필름을 제거하는 제 3단계와, 상기 몰드에 형성된 PDMS층이 존재하는 조건에서 산소 플라즈마 처리를 통해 수산화 작용기를 만들어 주고 methacryloxypropyl-trimethoxysilane 단층을 형성하는 제 4단계와, 극성인 PU/HEMA층을 적용하여 UV 경화를 실시하는 제 5단계;를 포함하는 것을 특징으로 한다. 본 발명은 하이드로 젤과 액추에이터의 결합을 통해 외부자극에 의하여 형태를 자유롭게 조율할 수 있는 새로운 3차원 폴딩 액추에이터를 구현할 수가 있어서 다양한 기술이 접합된 새로운 액추에이터를 제조할 수 있다.

摘要翻译： 本发明涉及三维折叠式致动器的制造方法。 本发明包括以下五个步骤：（1）使用imid膜填充空间，不包括PDMS应用区域; （2）通过用氟硅烷处理所述酰亚胺膜的表面和模具来形成PDMS层; （3）热固化PDMS层，然后除去酰亚胺膜; （4）通过氧等离子体处理产生羟基官能团并形成甲基丙烯酰氧基丙基三甲氧基硅烷单层，在所述模具上形成PDMS层就位; 和（5）通过施加极性PU / HEMA层进行UV固化。 本发明提供了一种用于新型致动器的制造方法，其将各种技术结合在一起，因为它使得能够通过水凝胶和致动器的组合容易地调节的形式的新型三维折叠致动器。

公开(公告)号：WO2010068695A1

公开(公告)日：2010-06-17

申请号：PCT/US2009/067381

申请日：2009-12-09

申请人： The Board of Trustees of the University of Illinois ,  JAIN, Kanti ,  LIN, Kevin

发明人： JAIN, Kanti ,  LIN, Kevin

IPC分类号： H01B13/00

CPC分类号： H05K1/0283 ,  B23K26/40 ,  B23K2203/172 ,  B81B2201/0292 ,  B81B2203/0109 ,  B81B2207/07 ,  B81C1/0019 ,  H05K3/0032 ,  H05K3/007 ,  H05K2201/09109 ,  H05K2203/0554 ,  H05K2203/308

摘要： Described herein are processing techniques for fabrication of stretchable and/or flexible electronic devices using laser ablation patterning methods. The laser ablation patterning methods utilized herein allow for efficient manufacture of large area (e.g., up to 1 mm 2 or greater or 1 m 2 or greater) stretchable and/or flexible electronic devices, for example manufacturing methods permitting a reduced number of steps. The techniques described herein further provide for improved heterogeneous integration of components within an electronic device, for example components having improved alignment and/or relative positioning within an electronic device. Also described herein are flexible and/or stretchable electronic devices, such as interconnects, sensors and actuators.

摘要翻译： 这里描述了使用激光烧蚀图案化方法制造可拉伸和/或柔性电子器件的处理技术。 本文使用的激光烧蚀图案化方法允许有效地制造大面积（例如，高达1mm 2或更大或1m 2或更大）的可拉伸和/或柔性电子器件，例如允许减少步数的制造方法。 本文描述的技术进一步提供了改进的电子设备内的组件的异构集成，例如具有电子设备内的改进的对准和/或相对定位的组件。 本文还描述了柔性和/或可拉伸的电子设备，例如互连，传感器和致动器。

公开(公告)号：WO2007019493A3

公开(公告)日：2008-12-31

申请号：PCT/US2006030870

申请日：2006-08-07

申请人： REVEO INC ,  FARIS SADEG M

发明人： FARIS SADEG M

IPC分类号： H01L21/00

CPC分类号： H01L21/76254 ,  B81B2207/015 ,  B81C1/0019 ,  B81C1/0038 ,  B81C2201/019 ,  H01L21/02027 ,  H01L21/02035 ,  H01L21/78 ,  H01L23/473 ,  H01L23/481 ,  H01L23/5225 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06589 ,  H01L2924/1305 ,  H01L2924/13091 ,  Y02P80/30 ,  H01L2924/00

摘要： A method of forming a plurality of thin strips of semiconductor material includes cutting a wafer having a thickness K from a semiconductor boule. The wafer is masked to form a plurality mask lines of a thickness associated with the desired thickness of the thin strips of semiconductor material. The wafer is etched to form plateaus of semiconductor material beneath the mask line having heights associated with the desired width of the thin strips of semiconductor material. The plateaus are removed thereby providing thin strips of semiconductor material.

摘要翻译： 形成多个薄的半导体材料带的方法包括从半导体芯片切割具有厚度K的晶片。 晶片被掩蔽以形成与半导体材料的薄带的期望厚度相关联的厚度的多个掩模线。 蚀刻晶片以形成具有与半导体材料薄带的所需宽度相关联的高度的掩模线之下的半导体材料的平坦化。 去除平台，从而提供薄的半导体材料条带。

公开(公告)号：WO2007019487A2

公开(公告)日：2007-02-15

申请号：PCT/US2006/030849

申请日：2006-08-07

申请人： REVEO, INC.

发明人： FARIS, Sadeg, M.

IPC分类号： H01L29/06

CPC分类号： H01L21/76254 ,  B81B2207/015 ,  B81C1/0019 ,  B81C1/0038 ,  B81C2201/019 ,  H01L21/02027 ,  H01L21/02035 ,  H01L21/78 ,  H01L23/473 ,  H01L23/481 ,  H01L23/5225 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06589 ,  H01L2924/1305 ,  H01L2924/13091 ,  Y02P80/30 ,  H01L2924/00

摘要： Provided herein are various methods of and systems for fabricating ultra thin devices and multi layer devices. In one embodiment of the present invention, a method of making a thin layer having a useful device therein or thereon includes providing a device layer on a substrate with a release layer between the device layer and the substrate; forming one or more devices on the device layer; and separating the device layer from said substrate via processing of said release layer while minimizing or obviating damage to said devices formed on said device layer. In another embodiment of the present invention, a method of making a vertically integrated device includes providing a first multilayer structure comprising a first substrate, a first mechanically weak layer and a first material layer; providing a second multilayer structure comprising a second substrate, a second mechanically weak layer and a second material layer; bonding the first structure to the second structure; detaching the first substrate from the first weak layer; removing the remnants of the first weak layer; making a device structure in the first material ; detaching the second substrate from the second weak layer; bonding the first and the second material layers to form a first device layer to a third substrate; andmaking a multi device-layer structure by aligning and bonding the second device layer to first device layer. In another embodiment of the present invention, a method of making a vertically integrated devices includes providing a structure A with 3 layers IA, 2A, 3A, wherein layer 2A is a release layer such that a layer IA is releasable from a substrate layer 3A; making a device A on layer IA; separating device layer IA; providing a structure B with layers IB, 2B, 3B, wherein layer 2B is a release layer and a layer IB is releasable from a substrate layer 3B; making a device B on layer IB; releasing device layer IB; and aligning and bonding layers IA and IB.

摘要翻译： 本文提供了用于制造超薄器件和多层器件的各种方法和系统。 在本发明的一个实施例中，制造其中具有有用器件的薄层的方法包括在衬底上提供器件层，该器件层在器件层与衬底之间具有释放层; 在所述设备层上形成一个或多个设备; 以及通过所述释放层的处理将所述器件层与所述衬底分离，同时最小化或消除对在所述器件层上形成的所述器件的损坏。 在本发明的另一实施例中，制造垂直一体化器件的方法包括提供包括第一衬底，第一机械弱层和第一材料层的第一多层结构; 提供包括第二基板，第二机械弱层和第二材料层的第二多层结构; 将第一结构接合到第二结构; 从第一弱层分离第一衬底; 去除第一弱层的残余物; 在第一种材料中制造器件结构; 将第二基板从第二弱层分离; 键合第一和第二材料层以形成第一器件层到第三衬底; 以及通过将第二器件层对准和结合到第一器件层来制造多器件层结构。 在本发明的另一个实施例中，制造垂直集成器件的方法包括提供具有3层IA，2A，3A的结构A，其中层2A是剥离层，使得层1A可从衬底层3A释放; 在层IA上形成设备A; 分离装置层1A; 提供具有层IB，2B，3B的结构B，其中层2B是剥离层，并且层1​​B可从衬底层3B释放; 在层IB上形成设备B; 释放装置层1B; 以及对准和结合层IA和IB。