Abstract:
Methods of reducing glitch rates within an ion implanter are described. In one embodiment, a plasma-assisted conditioning is performed, wherein the bias voltage to the extraction electrodes is modified so as to inhibit the formation of an ion beam. The power supplied to the plasma generator in the ion source is increased, thereby creating a high density plasma, which is not extracted by the extraction electrodes. This plasma extends from the ion source chamber through the extraction aperture. Energetic ions then condition the extraction electrodes. In another embodiment, a plasma-assisted cleaning is performed. In this mode, the extraction electrodes are moved further from the ion source chamber, and a different source gas is used to create the plasma. In some embodiments, a combination of these modes is used to reduce glitches in the ion implanter.
Abstract:
Electronic assemblies and their manufacture are described. One embodiment relates to a method including depositing an organic thin film layer on metal bumps on a semiconductor wafer, the organic thin film layer also being formed on a surface adjacent to the metal bumps on the wafer. The wafer is diced into a plurality of semiconductor die structures, the die structures including the organic thin film layer. The semiconductor die structures are attached to substrates, wherein the attaching includes forming a solder bond between the metal bumps on a die structure and bonding pads on a substrate, and wherein the solder bond extends through the organic thin film layer. The organic thin film layer is then exposed to a plasma. Other embodiments are described and claimed.