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    Build-up multilayer printed circuit board
    21.
    发明公开
    Build-up multilayer printed circuit board 失效
    积累多层印刷电路板

    公开(公告)号：EP1445996A2

    公开(公告)日：2004-08-11

    申请号：EP04011285.6

    申请日：1996-10-23

    Applicant: IBIDEN CO., LTD.

    Inventor： Kawamura, Yoichiro ,  Murase, Hideki ,  Asai, Motoo

    IPC: H05K3/46

    CPC classification number: H05K3/0094 ,  H05K3/382 ,  H05K3/384 ,  H05K3/4602 ,  H05K2201/0129 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/0773

    Abstract: A build-up multilayer printed circuit board in which an interlaminar insulating layer (2) and a conductor layer (5,5') are alternately laminated on both surfaces of a wiring substrate (1) having a conductor circuit (4,4') and a through-hole (9), and the conductor layers (5,5') are electrically connected to each other through a viahole (7) formed in the interlaminar insulating layer (2) characterized in that a resin filler (10) comprising a bisphenol type epoxy resin cured by an imidazole curing agent and inorganic particles is filled in a concave portion created on the surfaces of the wiring substrate (1) or in the through-hole (9) formed in the substrate (1).

    Abstract translation: 一种积层多层印刷电路板，其中层间绝缘层（2）和导体层（5,5'）交替地层叠在具有导体电路（4,4'）的布线基板（1）的两个表面上， 和通孔（9）之间，并且导体层（5,5'）通过形成在层间绝缘层（2）中的通孔（7）彼此电连接，其特征在于树脂填料（10）包括 由咪唑固化剂和无机颗粒固化的双酚型环氧树脂填充在布线基板（1）的表面上或在基板（1）中形成的通孔（9）中形成的凹入部分中。

    Wiring board and method of manufacturing same
    23.
    发明公开
    Wiring board and method of manufacturing same 有权
    Leiterplatte mit piezoelektrischem / elektrostritivem元素和deren Herstellungsverfahren

    公开(公告)号：EP1250031A2

    公开(公告)日：2002-10-16

    申请号：EP02252573.7

    申请日：2002-04-10

    Applicant: NGK INSULATORS, LTD.

    Inventor： Ikeda, Koji, NGK Insulators Ltd. I.P.D. ,  Shibata, Kazuyoshi, NGK Insulators Ltd. I.P.D.

    IPC: H05K1/16 ,  H05K3/46 ,  H01L41/047 ,  H01L41/24

    CPC classification number: H05K3/38 ,  H01L41/047 ,  H01L41/0471 ,  H01L41/0477 ,  H01L41/094 ,  H01L41/273 ,  H01L41/29 ,  H01L41/314 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K1/16 ,  H05K3/4667 ,  H05K2201/0175 ,  H05K2201/09881 ,  H05K2201/10083 ,  H01L2924/00

    Abstract: A wiring board (110A) has a ceramic substrate (112) and a first wiring pattern (114) disposed on it, gaps (120) of the wiring pattern being filled with a cermet insulating layer (122). There may be a piezoelectric/electrostrictive layer (116) and a cermet second wiring pattern (118) successively.
    In a method, a first cermet layer (130) to be the first wiring pattern (114) and a second cermet layer (132) to be the insulating layer (122) filling gaps (120) in the first wiring pattern (114) are formed on a ceramic substrate (112). Thereafter, the first cermet layer (130) and the second cermet layer (132) are fired to product the first wiring pattern (114) and the insulating layer (122) simultaneously. Then, a PZT paste (134) may be formed and thereafter fired to produce the piezoelectric/electrostrictive layer (116). Thereafter, a third cermet layer (136) may be formed and thereafter fired to produce the second wiring pattern (118).

    Abstract translation: 该基板包括陶瓷基板（112）和布置在基板上作为电极层的布线图案（114）。 布线图案具有填充有由金属陶瓷制成的绝缘层（122）的间隙（120）。 金属陶瓷层包含电极层的材料。 还包括以下独立权利要求：（a）制造布线板的方法。

    PATTERN DESIGN FOR ELECTRONIC COMPONENTS ON A 400 MICRON COPPER LAYER IN PRINTED CIRCUITS
    25.
    发明公开
    PATTERN DESIGN FOR ELECTRONIC COMPONENTS ON A 400 MICRON COPPER LAYER IN PRINTED CIRCUITS 审中-公开
    MUSTERENTWURFFÜRELEKTRONISCHE BAUTEILE AUF EINER KUPFERSCHICHT VON 400 MIKRON IN LEITERPLTENTEN

    公开(公告)号：EP1137330A1

    公开(公告)日：2001-09-26

    申请号：EP00920757.2

    申请日：2000-04-26

    Applicant: Lear Automotive (EEDS) Spain, S.L.

    Inventor： BOIXADERA FERRER, Joan Maria

    IPC: H05K3/34

    CPC classification number: H05K3/305 ,  H05K1/0263 ,  H05K2201/098 ,  H05K2201/09881 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

    Abstract: In order to ensure manufacturability of electronic circuits with conductor strips having a copper width of over 105 microns, a new series of patterns has been designed for each of the components. A copper surface has been added to said components to receive the adhesive drops thereby compensating for the height difference if the copper surface is bigger than 105 microns. If the width of the areas of the electronic component which are to be connected to the conductive coating of the printed circuit had a width a 1 , the width according to the invention is now a 2 , thereby making it possible to deposit the corresponding adhesive material in said strip having width a 2 .

    Abstract translation: 为了确保具有铜宽度超过105微米的导体条的电子电路的可制造性，已经为每个部件设计了一系列新的图案。 如果铜表面大于105微米，则已经将铜表面添加到所述组件以接收粘合剂滴，从而补偿高度差。 如果要连接到印刷电路板的导电涂层的电子部件的区域的宽度具有宽度a1，则根据本发明的宽度现在为a2，从而可以将相应的粘合剂材料沉积在所述 带宽a2。

    METHOD OF PRODUCING CONDUCTOR CIRCUIT BOARDS
    28.
    发明授权
    METHOD OF PRODUCING CONDUCTOR CIRCUIT BOARDS 失效
    制造导体电路板的方法

    公开(公告)号：EP0258451B1

    公开(公告)日：1993-10-13

    申请号：EP87901645.9

    申请日：1987-02-21

    Applicant: MEIKO ELECTRONICS CO., LTD.

    Inventor： WADA, Tatsuo 4-406, Towdate Bldg. ,  YAMASHITA, Keizo 12-23, Ishida 2-chome ,  TOUYAMA, Tasuku 127-4, Kitawaki ,  YAMAMOTO, Teruaki 11-5, Oguro 2-chome

    IPC: H05K3/20

    CPC classification number: H05K3/205 ,  H05K2201/09881 ,  H05K2203/0152 ,  H05K2203/0726 ,  Y10T29/49158

    Abstract: A thin metal layer is formed by electrolysis (S2) maintaining a thickness of 1 to 5 mum on an electrically conductive single-plate substrate having a predetermined coarseness, a resist mask is formed (S3) on the surface of the thin metal layer, and then a conductor circuit is electroformed thereon (S4) using copper. After the surface of the conductor circuit is coarsened (S5), the conductor circuit is laminated on an insulating substrate for each single plate via the thin metal layer and is intimately adhered in a unitary structure by the application of heat and pressure (S7). Then, the single plate only is peeled off (S8), and the exposed thin metal layer is removed by etching (S9). The thin metal layer and the conductor circuit are electroplated at high speeds under the conditions of a liquid contact speed of 2.6 to 20 m/sec. and a current density of 0.15 to 4.0 A/cm2, so that a required intimate adhesion force is obtained between the thin metal layer and the resist mask. Further, the conductor circuit is provided with flexibility like that of rolled and annealed copper, thus making it possible to produce very thin and high-density conductor circuits having a thickness of smaller than 10 mum adapted not only to rigid printed wiring boards but also to flexible printed wiring boards.

    METHOD OF PRODUCING CONDUCTOR CIRCUIT BOARDS.
    29.
    发明公开
    METHOD OF PRODUCING CONDUCTOR CIRCUIT BOARDS. 失效
    生产电气线路板。

    公开(公告)号：EP0258451A4

    公开(公告)日：1989-01-19

    申请号：EP87901645

    申请日：1987-02-21

    Applicant: MEIKO ELECTRONICS CO LTD

    Inventor： WADA TATSUO - TOWDATE BLDG ,  YAMASHITA KEIZO - ISHIDA -CHOM ,  TOUYAMA TASUKU - KITAWAKI ,  YAMAMOTO TERUAKI - OGURO -CHOM

    IPC: H05K3/42 ,  C25D7/00 ,  H05K3/18 ,  H05K3/20

    CPC classification number: H05K3/205 ,  H05K2201/09881 ,  H05K2203/0152 ,  H05K2203/0726 ,  Y10T29/49158

    Abstract: A thin metal layer is formed by electrolysis (S2) maintaining a thickness of 1 to 5 mum on an electrically conductive single-plate substrate having a predetermined coarseness, a resist mask is formed (S3) on the surface of the thin metal layer, and then a conductor circuit is electroformed thereon (S4) using copper. After the surface of the conductor circuit is coarsened (S5), the conductor circuit is laminated on an insulating substrate for each single plate via the thin metal layer and is intimately adhered in a unitary structure by the application of heat and pressure (S7). Then, the single plate only is peeled off (S8), and the exposed thin metal layer is removed by etching (S9). The thin metal layer and the conductor circuit are electroplated at high speeds under the conditions of a liquid contact speed of 2.6 to 20 m/sec. and a current density of 0.15 to 4.0 A/cm2, so that a required intimate adhesion force is obtained between the thin metal layer and the resist mask. Further, the conductor circuit is provided with flexibility like that of rolled and annealed copper, thus making it possible to produce very thin and high-density conductor circuits having a thickness of smaller than 10 mum adapted not only to rigid printed wiring boards but also to flexible printed wiring boards.

    Multilayer printed wiring board and method for making same
    30.
    发明公开
    Multilayer printed wiring board and method for making same 失效
    Mehrschichtige gedruckte Leiterplatte und Verfahren zu ihrer Herstellung。

    公开(公告)号：EP0275070A2

    公开(公告)日：1988-07-20

    申请号：EP88100272.9

    申请日：1988-01-12

    Applicant: AMP-AKZO CORPORATION (a Delaware corp.)

    Inventor： Kohm, Thomas S.

    IPC: H05K3/46 ,  H05K3/38 ,  C09J7/02

    CPC classification number: H05K3/4661 ,  B32B15/08 ,  C08K5/0091 ,  H05K3/184 ,  H05K3/387 ,  H05K3/389 ,  H05K3/426 ,  H05K2201/0133 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/09881 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/31688 ,  C08L61/06

    Abstract: A multilayer printed wiring board is disclosed having (a) an inner layer conductive pattern (13) on an organic in­sulating base material; (b) a poly(vinyl acetal)-phenolic resin coating (14) containing an amine substituted organic zirconate or titanate coupling agent; (c) a dielectric insulating layer (15); (d) a bonding composition (16) capable of being adhesion promoted for electroless metal deposition comprising a phenolic resin having at least two methylol groups and substantially free of methyl ether groups, a heat resistant aromatic or cyclic resin having functional groups capable of reacting with the methylol groups without the evolution of water; and (e) an outer conductive pattern (19), the multilayer board being capable of withstanding at least five soldering cycles of at least 255°C for 2 seconds without blistering or de­lamination. Processes for the manufacture of the in­ventive multilayer boards are also disclosed.

    Abstract translation: 公开了一种多层印刷电路板，其具有（a）有机绝缘基材上的内层导电图案（13）; （b）含有胺取代的有机锆酸酯或钛酸酯偶联剂的聚（乙烯醇缩醛） - 酚醛树脂涂层（14） （c）介电绝缘层（15）; （d）能够进行无电解金属沉积的粘合剂的粘结组合物（16），其包含具有至少两个羟甲基并且基本上不含甲基醚基团的酚醛树脂，具有能够与 没有水分的羟甲基; 和（e）外部导电图案（19），所述多层板能够耐受至少255℃的至少五个焊接周期，持续2秒，而没有起泡或分层。 还公开了用于制造本发明的多层板的工艺。

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