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公开(公告)号:EP2954760B1
公开(公告)日:2017-11-01
申请号:EP14822548.5
申请日:2014-07-09
Applicant: HSIO Technologies, LLC
Inventor: RATHBURN, James
CPC classification number: H05K3/4635 , H01L2224/16225 , H01L2224/48227 , H01L2924/15311 , H05K1/0393 , H05K3/0035 , H05K3/421 , H05K3/429 , H05K3/4623 , H05K3/4679 , H05K2201/0141 , H05K2201/09563 , H05K2201/096
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2.SUBSTRAT FÜR EINEN PORTABLEN DATENTRÄGER 有权
Title translation: SUBSTRATFÜREINEN PORTABLENDATENTRÄGER公开(公告)号:EP2829163B1
公开(公告)日:2017-08-09
申请号:EP13711574.7
申请日:2013-03-19
Applicant: Giesecke & Devrient GmbH
Inventor: BALDISCHWEILER, Michael , BOHN, Carsten
CPC classification number: H05K1/116 , G06K19/0772 , G06K19/07754 , H05K1/092 , H05K1/165 , H05K3/0035 , H05K3/0038 , H05K3/1216 , H05K3/1233 , H05K3/4069 , H05K2201/0266 , H05K2201/0394 , H05K2201/09563 , H05K2201/09609 , H05K2201/09709 , H05K2201/0979 , H05K2201/09854 , H05K2201/10098 , H05K2203/1453
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3.Wiring substrate and method for manufacturing the same 有权
Title translation: Verdrahtungssubstrat und Herstellungsverfahrendafür公开(公告)号:EP2479788B1
公开(公告)日:2017-05-03
申请号:EP12164665
申请日:2007-12-04
Applicant: SHINKO ELECTRIC IND CO
Inventor: KANEKO KENTARO , KODANI KOTARO , NAKAMURA JUNICHI , KOBAYASHI KAZUHIRO
IPC: H01L23/498 , H01L21/48 , H01L21/683 , H05K1/11 , H05K3/10 , H05K3/20 , H05K3/46
CPC classification number: H05K1/113 , H01L21/4857 , H01L21/486 , H01L21/6835 , H01L23/49822 , H01L23/49827 , H01L2221/68345 , H01L2924/0002 , H05K3/108 , H05K3/205 , H05K3/4644 , H05K2201/0341 , H05K2201/09563 , H05K2201/096 , Y10T29/49155 , H01L2924/00
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4.METHOD FOR MANUFACTURING STRUCTURE FOR FLEXIBLE PRINTED CIRCUIT BOARDS 审中-公开
Title translation: VERFAHREN ZUR HERSTELLUNG EINER STRUKTURFÜR柔性LEITERPLATTEN公开(公告)号:EP3012881A4
公开(公告)日:2017-03-15
申请号:EP14829105
申请日:2014-07-24
Applicant: LG DISPLAY CO LTD
Inventor: OH DUCKSU , PARK SUNG SOO , KANG MINSOO
CPC classification number: H05K3/363 , H01L51/0097 , H01L51/5246 , H05K1/115 , H05K1/14 , H05K1/147 , H05K1/189 , H05K3/323 , H05K3/361 , H05K3/4644 , H05K2201/0397 , H05K2201/058 , H05K2201/09563 , H05K2201/10128
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5.FUSION BONDED LIQUID CRYSTAL POLYMER ELECTRICAL CIRCUIT STRUCTURE 审中-公开
Title translation: SCHMELZVERBUNDENE ELEKTRISCHEFLÜSSIGKRISTALLPOLYMER-SCHALTUNGSSTRUKTUR公开(公告)号:EP3076772A2
公开(公告)日:2016-10-05
申请号:EP16162703.9
申请日:2016-03-29
Applicant: HSIO Technologies, LLC
Inventor: Rathburn, James
IPC: H05K3/46 , H01L23/498 , H05K3/10 , H05K3/42
CPC classification number: H05K3/4632 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H05K3/108 , H05K3/281 , H05K3/429 , H05K3/4673 , H05K2201/0141 , H05K2201/09563 , H01L2924/00014
Abstract: A method of making a fusion bonded circuit structure. A substrate is provided with a seed layer of a conductive material. A first resist layer is deposited on the seed layer. The first resist layer is processed to create first recesses corresponding to a desired first circuitry layer. The first recesses expose portions of the seed layer of conductive material. The substrate is electroplated to create first conductive traces defined by the first recesses. The first resist layer is removed to reveal the first conductive traces. The substrate is etched to remove exposed portions of the seed layer adjacent the first conductive traces. A portion of the seed layer is interposed between the first conductive traces and the substrate. A first layer of LCP is fusion boned to the first major surface of the substrate to encapsulate the first conductive traces in an LCP material. The first LCP layer can be laser drilled to expose the conductive traces.
Abstract translation: 一种制作熔接电路结构的方法。 衬底设置有导电材料的种子层。 第一抗蚀剂层沉积在种子层上。 处理第一抗蚀剂层以产生对应于期望的第一电路层的第一凹部。 第一凹槽露出导电材料种子层的部分。 电镀衬底以产生由第一凹槽限定的第一导电迹线。 去除第一抗蚀剂层以露出第一导电迹线。 蚀刻衬底以去除与第一导电迹线相邻的种子层的暴露部分。 种子层的一部分介于第一导电迹线和衬底之间。 将第一层LCP融合到衬底的第一主表面上,以将第一导电迹线封装在LCP材料中。 可以激光钻出第一个LCP层以暴露导电迹线。
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6.MOUNTING DEVICE, MANUFACTURING METHOD OF SAME, AND SPUTTERING TARGET USED IN SAID MANUFACTURING METHOD 审中-公开
Title translation: MONTAGEVORRICHTUNG,HERSTELLUNGSVERFAHRENDAFÜRUND SPUTTERTARGET ZUR VERWENDUNG在BESAGTEM HERSTELLUNGSVERFAHREN公开(公告)号:EP2941105A4
公开(公告)日:2016-08-31
申请号:EP14797742
申请日:2014-05-02
Applicant: ULVAC INC
Inventor: TAKASAWA SATORU , ICHIKAWA SHUHEI , SUGIURA ISAO , ISHIBASHI SATORU , NITTA JUNICHI
CPC classification number: H05K3/16 , C22C9/01 , C22C9/06 , C23C14/205 , C23C14/3414 , C23F1/02 , H01L2224/16225 , H01L2224/16227 , H01L2924/00014 , H01L2924/15311 , H05K1/0366 , H05K1/115 , H05K3/06 , H05K3/108 , H05K3/188 , H05K3/388 , H05K3/4644 , H05K2201/0209 , H05K2201/0317 , H05K2201/09509 , H05K2201/09563 , H01L2224/0401
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7.METHOD FOR MANUFACTURING A CIRCUIT BOARD STRUCTURE 有权
Title translation: VERFAHREN ZUR HERSTELLUNG EINER LEITERPLATTENSTRUKTUR公开(公告)号:EP1891845B1
公开(公告)日:2016-08-10
申请号:EP06764433.6
申请日:2006-06-15
Applicant: Imbera Electronics Oy
Inventor: IIHOLA, Antti , TUOMINEN, Risto , PALM, Petteri
CPC classification number: H05K3/064 , H01L21/4846 , H01L21/56 , H01L21/568 , H01L23/13 , H01L23/5389 , H01L23/544 , H01L24/16 , H01L24/24 , H01L24/81 , H01L24/82 , H01L24/83 , H01L24/90 , H01L2223/54426 , H01L2223/54473 , H01L2224/04105 , H01L2224/16 , H01L2224/18 , H01L2224/24227 , H01L2224/2929 , H01L2224/293 , H01L2224/81121 , H01L2224/81132 , H01L2224/81192 , H01L2224/81203 , H01L2224/81205 , H01L2224/81801 , H01L2224/82039 , H01L2224/83132 , H01L2224/83192 , H01L2224/83203 , H01L2224/83205 , H01L2224/83851 , H01L2224/9211 , H01L2224/92144 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01018 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/014 , H01L2924/07802 , H01L2924/07811 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/1434 , H01L2924/1461 , H01L2924/15153 , H01L2924/1517 , H05K1/183 , H05K1/187 , H05K1/188 , H05K3/205 , H05K3/284 , H05K3/303 , H05K3/305 , H05K3/32 , H05K3/321 , H05K3/4069 , H05K2201/0355 , H05K2201/09563 , H05K2201/0969 , H05K2201/10674 , H05K2201/10977 , H05K2203/0353 , H05K2203/063 , H05K2203/0723 , Y02P70/613 , Y10T29/4913 , H01L2224/29075 , H01L2924/00 , H01L2224/0401
Abstract: The present publication discloses a method for manufacturing a circuit-board structure. In the method, a conductor layer is made, which comprises a conductor foil and a conductor pattern on the surface of the conductor foil. A component is attached to the conductor layer and at least some conductor material of the conductor layer is removed from outside the conductor pattern.
Abstract translation: 本公开公开了一种制造电路板结构的方法。 在该方法中,制造导体层,该导体层包括在导体箔的表面上的导体箔和导体图案。 一个部件附着在导体层上,并且导体层被薄化,使得导体层的导体材料从导体图案的外面去除。
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8.A PRINTED CIRCUIT BOARD ARRANGEMENT AND A METHOD FOR FORMING ELECTRICAL CONNECTION AT A PRINTED CIRCUIT BOARD 审中-公开
Title translation: 电路板及其制造方法电气连接到电路板公开(公告)号:EP2883430A4
公开(公告)日:2016-05-11
申请号:EP12882879
申请日:2012-08-10
Applicant: ERICSSON TELEFON AB L M
Inventor: PEREZ-URIA IGOR , FERM PER , GUSTAFSON BENNY
IPC: H05K3/40
CPC classification number: H05K1/144 , H05K1/115 , H05K1/141 , H05K3/10 , H05K3/303 , H05K3/3436 , H05K3/3494 , H05K3/4015 , H05K3/4046 , H05K3/4053 , H05K3/42 , H05K2201/0248 , H05K2201/0305 , H05K2201/09563 , H05K2201/09572 , H05K2201/10234 , H05K2201/10734 , H05K2201/10878 , H05K2201/10916 , H05K2203/0338 , H05K2203/0455 , H05K2203/1105 , Y10T29/49124
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公开(公告)号:EP1741804B1
公开(公告)日:2016-04-27
申请号:EP06253410.2
申请日:2006-06-29
Applicant: Rohm and Haas Electronic Materials, LLC
Inventor: Hayashi, Shinjiro , Tsuchida, HIdeki , Kusaka, Masaru , Yomogida, Koichi
IPC: C25D3/38
CPC classification number: C25D3/38 , H05K3/423 , H05K2201/09563
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公开(公告)号:EP3009533A1
公开(公告)日:2016-04-20
申请号:EP15189090.2
申请日:2015-10-09
Applicant: Rohm and Haas Electronic Materials LLC
Inventor: JAYARAJU, Nagarajan Rohm and Haas Electronic Materials LLC. , BARSTAD, Leon R. , NAJJAR, Elie H.
CPC classification number: H05K3/424 , C25D3/38 , C25D5/18 , C25D7/00 , H05K3/423 , H05K2201/09563 , H05K2203/1492
Abstract: Pulse plating methods which include a forward pulse but no reverse pulse inhibit or reduce dimpling and voids during copper electroplating of through-holes in substrates such as printed circuit boards. The pulse plating methods may be used to fill through-holes with copper where the through-holes are coated with electroless copper or flash copper.
Abstract translation: 包括正向脉冲但没有反向脉冲的脉冲电镀方法抑制或减少在诸如印刷电路板的基板中的通孔的铜电镀期间的凹坑和空隙。 脉冲电镀方法可以用铜填充通孔,其中通孔用无电铜或闪铜覆盖。
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