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    Semiconductor device
    1.
    发明专利
    Semiconductor device 有权
    半导体器件

    公开(公告)号：JP2008103623A

    公开(公告)日：2008-05-01

    申请号：JP2006286445

    申请日：2006-10-20

    Applicant: Denso Corp ,  株式会社デンソー

    Inventor： SANO YUKIHIRO ,  KONDO ICHIJI ,  SAKAMOTO ZENJI ,  TOMISAKA MANABU ,  MAKINO TOMOATSU

    IPC: H01L23/473

    CPC classification number: H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/00014 ,  H01L2924/00

    Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device having a cooling structure whose cooling efficiency is high. SOLUTION: A semiconductor device 100 comprises a power mold 10 and ceramic tubes 21, 22 of the both sides. The power mold 10 has a power element 15, and a pair of lead frames 12, 13 which sandwiches the power element, and exposes the outside surface of the lead frames 12, 13, and is molded by a resin 18. The ceramic tubes 21, 22 have cooling medium passages 23, 24 where cooling medium flows, and are jointed to the outside surface of the lead frames 12, 13 through metals 25, 26 for joint. Two opposite walls of the cooling medium passages 23, 24 of the ceramic tubes 21, 22 are different in thickness, and a wall with thin thickness is jointed to the outer surface of the lead frames 12, 13. COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种具有冷却效率高的冷却结构的半导体器件。 解决方案：半导体器件100包括电源模具10和两侧的陶瓷管21,22。 电动模具10具有功率元件15和一对引线框架12,13，它们夹住功率元件，并且暴露引线框架12,13的外表面，并由树脂18模制。陶瓷管21 22具有冷却介质流动的冷却介质通道23,24，并且通过用于接合的金属25,26连接到引线框架12,13的外表面。 陶瓷管21,22的冷却介质通道23,24的两个相对的壁的厚度不同，并且具有薄的厚度的壁与引线框架12,13的外表面接合。版权所有（C） ）2008，JPO＆INPIT

    Brazing method, composite material for brazing and brazed structure
    3.
    发明专利
    Brazing method, composite material for brazing and brazed structure 有权
    BRAZING方法，复合材料的制作和布置结构

    公开(公告)号：JP2006212638A

    公开(公告)日：2006-08-17

    申请号：JP2005024718

    申请日：2005-02-01

    Applicant: Denso Corp ,  Neomax Material:Kk ,  株式会社Neomaxマテリアル ,  株式会社デンソー

    Inventor： HASEGAWA TAKESHI ,  ISHIO MASAAKI ,  KAJIKAWA SHUNJI ,  SAKAMOTO ZENJI ,  HAYASHI TAKAYUKI

    IPC: B23K1/19 ,  B23K1/00 ,  B23K35/30 ,  C22C9/06 ,  C22C19/05

    Abstract: PROBLEM TO BE SOLVED: To provide a brazing method which gives a brazed zone having excellent corrosion resistance, and to provide a material suitable for its practice, and to provide a brazed structure having excellent corrosion resistance in the brazed zone.
    SOLUTION: The brazing method comprises following steps. A first joining member 1 is formed with a diffusion suppression layer 13 formed of an Ni-Cr alloy comprising 20 to 40% Cr is stacked and formed on a substrate 12 of a steel material. On the side of the first joining member 1 facing the side of the above diffusion suppression layer 13, a second joining member 2 is arranged via a brazing filler metal 14 of a Cu-Ni-Si alloy comprising 10 to 20% Ni and 0.2 to 1.0% Si, so as to assemble a temporarily assembled body. The temporarily assembled body is held at ≥1.170°C, so as to melt the brazing filler metal 14, on the melted brazing filler metal, a brazed zone 6 into which Ni atoms and Cr atoms are diffused from the diffusion suppression layer 13 is formed, and the melting point of the brazing filler metal in the brazed zone 6 is raised by the increase of the Ni and Cr contents, thus the brazed 6 is solidified for itself and is thereafter cooled.
    COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题：提供一种钎焊方法，其提供具有优异耐腐蚀性的钎焊区域，并提供适合于其实践的材料，并提供在钎焊区域中具有优异耐腐蚀性的钎焊结构。 解决方案：钎焊方法包括以下步骤。 第一接合构件1形成有由Ni-Cr合金形成的扩散抑制层13，其包含20至40％的Cr层叠并形成在钢材的基板12上。 在第一接合构件1的面向上述扩散抑制层13一侧的一侧，通过包含10〜20％的Ni和0.2的Cu-Ni-Si合金的钎料14配置第二接合构件2〜 1.0％Si，以便组装临时组装的主体。 将临时组装体保持在≥1.170℃，以便熔化钎焊金属14上的熔融钎料，形成从扩散抑制层13扩散Ni原子和Cr原子的钎焊区6 ，并且钎焊区域6中的钎料的熔点由于Ni和Cr含量的增加而升高，因此钎焊6自身固化，然后冷却。 版权所有（C）2006，JPO＆NCIPI

    Electronic component junction, its manufacturing method and electronic device comprising same
    4.
    发明专利
    Electronic component junction, its manufacturing method and electronic device comprising same 审中-公开
    电子元件接头及其制造方法和包含其的电子器件

    公开(公告)号：JP2005340275A

    公开(公告)日：2005-12-08

    申请号：JP2004153425

    申请日：2004-05-24

    Applicant: Denso Corp ,  株式会社デンソー

    Inventor： TANAHASHI AKIRA ,  SAKAMOTO ZENJI ,  OKA KENGO

    IPC: B23K1/00 ,  B23K31/02 ,  B23K35/22 ,  B23K35/26 ,  B23K101/40 ,  C22C5/06 ,  C22C13/00 ,  C22C19/03 ,  H01L23/36 ,  H01L23/373 ,  H05K3/34

    Abstract: PROBLEM TO BE SOLVED: To solve the problem that a problem of electrode diffusion becomes clear compared to an Sn-Pb system in Sn solder composition increased in an amount of Sn, which is becoming a main stream with Pb-free soldering.
    SOLUTION: In an electronic component junction where an electronic component is soldered/mounted on a substrate through a substrate electrode and a component electrode by Pb-free Sn solder, a main soldering joint includes at least one kind selected from a group formed of Sn-Ag-Cu, Sn-Cu, Sn-Cu-Ni, Sn-Sb-Cu, Sn-In-Cu and Sn-Bi-Cu, and includes 0.3 wt% or above of Cu element. At least the substrate electrode or the component electrode is set to be an Ag electrode.
    COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题为了解决与锡焊料组合物中的Sn-Pb体系相比，电极扩散问题变得清楚的问题，随着无铅焊接而成为主流的Sn的量增加。 解决方案：在通过无铅Sn焊料通过基板电极和部件电极将电子部件焊接/安装在基板上的电子部件接合部中，主焊接点包括从形成的组中选择的至少一种 的Sn-Ag-Cu，Sn-Cu，Sn-Cu-Ni，Sn-Sb-Cu，Sn-In-Cu和Sn-Bi-Cu，并且包含0.3重量％以上的Cu元素。 至少将基板电极或部件电极设定为Ag电极。 版权所有（C）2006，JPO＆NCIPI

    Solder joining method of insertion mounting electronic component, and manufacturing method of power converting apparatus
    5.
    发明专利
    Solder joining method of insertion mounting electronic component, and manufacturing method of power converting apparatus 有权
    插电安装电子元件的焊接方法及电力转换装置的制造方法

    公开(公告)号：JP2005252198A

    公开(公告)日：2005-09-15

    申请号：JP2004064549

    申请日：2004-03-08

    Applicant: Denso Corp ,  株式会社デンソー

    Inventor： INOUE TETSUSHI ,  SAKAMOTO ZENJI ,  SUZUKI ICHIRO ,  OSHIRO MASARU

    IPC: H05K3/34 ,  H01L25/07 ,  H01L25/18

    CPC classification number: H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/01322 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/48

    Abstract: PROBLEM TO BE SOLVED: To provide a solder joining method of an insertion mounting electronic component which can form excellent solder profile, and to provide a manufacturing method of a power converting apparatus high in electric reliability using this solder joining method.
    SOLUTION: The present invention relates to the manufacturing method of the power converting apparatus which has a semiconductor lamination unit 2 formed by alternately laminating a semiconductor module 10 having a control terminal 160 and a cooling tube 20, and a controlling substrate 40 having a through hole portion 400 for solder joining by inserting the control terminal 160. The method performs: a control portion forming process of forming a control portion 52b having a solder control layer excellent in a wettability with solder material in an axial direction of the control terminal 160 as external surface; a unit forming process of forming a semiconductor lamination unit 2; a part arranging process of arranging the semiconductor lamination unit 2; and a joining process of joining the control terminal 160 at the through hole portion 400 by solder.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：提供能形成优异焊料形状的插入安装电子部件的焊料接合方法，并且使用该焊料接合方法提供具有高电气可靠性的电力转换装置的制造方法。 电力转换装置的制造方法技术领域本发明涉及具有通过交替层叠具有控制端子160和冷却管20的半导体模块10形成的半导体层叠单元2的电力转换装置的制造方法以及具有 用于通过插入控制端子160进行焊接的通孔部分400.该方法执行：控制部分形成处理，其形成控制部分52b，该控制部分52b具有在控制端子的轴向方向上与焊料材料的润湿性优异的焊料控制层 160为外表面; 形成半导体层叠单元2的单元形成工序; 布置半导体层叠单元2的部件布置处理; 以及通过焊料将通孔部400的控制端子160接合的接合工序。 版权所有（C）2005，JPO＆NCIPI

    Material for induction heating for soldering on-vehicle power module by induction heating
    6.
    发明专利
    Material for induction heating for soldering on-vehicle power module by induction heating 审中-公开
    用于通过感应加热焊接电动车模块的感应加热材料

    公开(公告)号：JP2009279590A

    公开(公告)日：2009-12-03

    申请号：JP2008131301

    申请日：2008-05-19

    Applicant: Denso Corp ,  Neomax Material:Kk ,  株式会社Neomaxマテリアル ,  株式会社デンソー

    Inventor： SHIBAYAMA HIROHISA ,  SAKAMOTO ZENJI ,  ODA YOSHIMITSU ,  ISHIO MASAAKI

    IPC: B23K1/002 ,  B23K1/00 ,  B23K3/00 ,  B23K101/40

    Abstract: PROBLEM TO BE SOLVED: To provide a material for induction heating, a material that has little thermal deformation, that uses a laminated material having excellent temperature controllability for induction heating, and that is for soldering an on-vehicle power module by induction heating.
    SOLUTION: The material for induction heating has a three-layered structure consisting of a first layer 10a, a second layer 10b, and a third layer 10c, using as a base a temperature-sensitive magnetic material (to be described later) in which magnetic permeability varies by temperature. In the first and third layers 10a, 10c, a temperature-sensitive magnetic material 11 is arranged, in which a Curie point is adjusted to a holding temperature on high temperature side in the temperature profile. In the second layer 10b, a right heat conduction material 12 (Cu) is arranged for the structure. The first and the third layer 10a, 10c which are the same temperature sensitive magnetic material are designed to have the same thickness while the second layer 10b is designed to have the thickness to minimize thermal deformation due to difference in thermal expansion coefficient.
    COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题：为了提供感应加热材料，几乎没有热变形的材料，使用具有优异的用于感应加热的温度可控性的层压材料，并且用于通过感应焊接车载电源模块 加热。 解决方案：用于感应加热的材料具有由第一层10a，第二层10b和第三层10c组成的三层结构，使用温度敏感磁性材料（稍后描述）作为基底， 其中磁导率随温度而变化。 在第一层10a和第三层10c中，设置温度敏感磁性材料11，其中将居里点调节到温度分布中高温侧的保持温度。 在第二层10b中，布置有用于该结构的右导热材料12（Cu）。 相同温度敏感磁性材料的第一层和第三层10a，10c被设计成具有相同的厚度，而第二层10b被设计成具有由于热膨胀系数的差异而使热变形最小化的厚度。 版权所有（C）2010，JPO＆INPIT

    Method of manufacturing semiconductor device
    7.
    发明专利
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：JP2007059763A

    公开(公告)日：2007-03-08

    申请号：JP2005245506

    申请日：2005-08-26

    Applicant: Denso Corp ,  Toyota Motor Corp ,  トヨタ自動車株式会社 ,  株式会社デンソー

    Inventor： TANAHASHI AKIRA ,  SAKAMOTO ZENJI ,  YOSHIDA TOMOMASA

    IPC: H01L21/52

    CPC classification number: H01L24/32 ,  H01L24/83 ,  H01L2224/83 ,  H01L2924/10158

    Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method capable of reducing a void in solder as much as possible, in a semiconductor device for soldering on a base material a semiconductor element in which an electrode for soldering is formed.
    SOLUTION: A method of manufacturing the semiconductor device performing soldering comprises the steps of preparing a semiconductor element 10 having a soldering side 11 at one side; grinding the soldering side 11 of the semiconductor element 10; forming an electrode 12 including the electrode for soldering at this soldering side 11; subsequently loading the semiconductor element 10 on a base material 20, while solder 30 intervenes between the electrode for soldering and the base material 20; and heating the solder 30 at a temperature more than a solidus temperature of the solder 30, in an atmosphere of a reduction nature gas obtained by mixing nitrogen and hydrogen to make the solder 30 reflow. A hydrogen concentration in the reduction nature gas is made 1% or more and 5% or less.
    COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题为了提供尽可能地减少焊料空隙的制造方法，在用于焊接在基材上的半导体器件中形成其中形成焊接电极的半导体元件。 解决方案：制造执行焊接的半导体器件的方法包括以下步骤：制备在一侧具有焊接侧11的半导体元件10; 研磨半导体元件10的焊接面11; 在该焊接侧11形成包括用于焊接的电极的电极12; 随后将半导体元件10装载在基材20上，同时焊料30介于用于焊接的电极和基材20之间; 并且在通过混合氮气和氢气而获得的还原性气体的气氛中，在焊料30的固相线温度以上的温度下加热焊料30，以使焊料30回流。 还原性气体中的氢浓度为1％以上且5％以下。 版权所有（C）2007，JPO＆INPIT

    Method for packaging semiconductor chip
    10.
    发明专利
    Method for packaging semiconductor chip 审中-公开

    公开(公告)号：JP2004200479A

    公开(公告)日：2004-07-15

    申请号：JP2002368328

    申请日：2002-12-19

    Applicant: Denso Corp ,  株式会社デンソー

    Inventor： TANAHASHI AKIRA ,  OTA SHINJI ,  OSHIRO MASARU ,  SAKAMOTO ZENJI

    IPC: B23K1/00 ,  B23K35/26 ,  B23K101/40 ,  C22C13/00 ,  H01L21/60 ,  H05K3/34

    Abstract: PROBLEM TO BE SOLVED: To provide a method for packaging a semiconductor chip and a substrate to be bonded while bringing them surely into tight contact with each other in a soldering process.
    SOLUTION: In the method for packaging a semiconductor chip, soldering is performed using a bump of such a composition as a solid-liquid coexistence region is present when an area array arrangement type semiconductor chip is soldered to a substrate having wiring capable of mounting the semiconductor chip. The semiconductor chip includes a CSP (chip size package), an FC (flip chip) or a BGA (ball grid array) semiconductor chip.
    COPYRIGHT: (C)2004,JPO&NCIPI

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