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公开(公告)号:US11626410B2
公开(公告)日:2023-04-11
申请号:US17861412
申请日:2022-07-11
发明人: Tom Ho Wing Yu , Nobuyuki Sasaki , Jianxin Lei , Wenting Hou , Rongjun Wang , Tza-Jing Gung
IPC分类号: H01L27/108
摘要: Bit line stacks and methods of forming bit line stacks are described herein. A bit line stack comprises: a polysilicon layer; an adhesion layer on the polysilicon layer; a barrier metal layer on the adhesion layer; an interface layer on the barrier metal layer; a resistance reducing layer on the interface layer; and a conductive layer on the resistance reducing layer. A bit line stack having the resistance reducing layer has a resistance at least 5% lower than a comparable bit line stack without the resistance reducing layer. The resistance reducing layer may include silicon oxide or silicon nitride. The resistance reducing layer may be formed using one or more of a physical vapor deposition (PVD), a radio frequency-PVD, a pulsed-PVD, chemical vapor deposition (CVD), atomic layer deposition (ALD) or sputtering process.
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公开(公告)号:US20230088552A1
公开(公告)日:2023-03-23
申请号:US17478047
申请日:2021-09-17
发明人: Borui Xia , Anthony Chih-Tung Chan , Shiyu Yue , Wei Lei , Aravind Miyar Kamath , Mukund Sundararajan , Rongjun Wang , Adolph Miller Allen
摘要: Magnet assemblies comprising a housing with a top plate each comprising aligned openings are described. The housing has a bottom ring and an annular wall with a plurality of openings formed in the bottom ring. The top plate is on the housing and has a plurality of openings aligned with the plurality of openings in the bottom ring of the housing. The magnet assembly may also include a non-conducting base plate and/or a conductive cover plate. Methods for using the magnet assembly and magnetic field tuning are also described.
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公开(公告)号:US11459651B2
公开(公告)日:2022-10-04
申请号:US15426102
申请日:2017-02-07
发明人: Xiaodong Wang , Rongjun Wang , Hanbing Wu
IPC分类号: C23C14/58 , C23C14/34 , C23C14/08 , C23C14/14 , C23C14/18 , C23C14/35 , H01J37/34 , H01L43/12
摘要: Embodiments of a tantalum (Ta) target pasting process for deposition chambers using RF powered processes include pasting at least a portion of the inner surfaces of the process chamber with Ta after using RF sputtering to deposit dielectric material on a wafer. Pressure levels within the process chamber are adjusted to maximize coverage of the Ta pasting layer. The Ta pasting encapsulates the dielectric material that has been inadvertently sputtered on the process chamber inner surfaces such as the shield. Oxygen is then flowed into the process chamber to form a tantalum oxide layer on the Ta pasting layer to further reduce contamination and particle generation.
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公开(公告)号:US11075276B2
公开(公告)日:2021-07-27
申请号:US16594596
申请日:2019-10-07
发明人: Yongjing Lin , Shih Chung Chen , Naomi Yoshida , Lin Dong , Liqi Wu , Rongjun Wang , Steven Hung , Karla Bernal Ramos , Yixiong Yang , Wei Tang , Sang-Ho Yu
IPC分类号: H01L29/49 , H01L29/40 , H01L21/285 , H01L21/02
摘要: Methods and apparatus for forming a semiconductor structure such as an NMOS gate electrode are described. Methods may include depositing a first capping layer having a first surface atop a first surface of a high-k dielectric layer; and depositing at least one metal layer having a first surface atop the first surface of the first capping layer, wherein the at least one metal layer includes titanium aluminum silicide material. Some methods include removing an oxide layer from the first surface of the first capping layer by contacting the first capping layer with metal chloride in an amount sufficient to remove an oxide layer. Some methods for depositing a titanium aluminum silicide material are performed by an atomic layer deposition process performed at a temperature of 350 to 400 degrees Celsius.
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公开(公告)号:US11011676B2
公开(公告)日:2021-05-18
申请号:US15183594
申请日:2016-06-15
发明人: Mingwei Zhu , Rongjun Wang , Nag B. Patibandla , Xianmin Tang , Vivek Agrawal , Cheng-Hsiung Tsai , Muhammad Rasheed , Dinesh Saigal , Praburam Gopal Raja , Omkaram Nalamasu , Anantha Subramani
IPC分类号: H01L33/06 , H01L33/12 , H01L21/02 , H01L29/205 , H01L33/00 , C30B23/02 , C30B29/40 , H01L33/32
摘要: Fabrication of gallium nitride-based light devices with physical vapor deposition (PVD)-formed aluminum nitride buffer layers is described. Process conditions for a PVD AlN buffer layer are also described. Substrate pretreatments for a PVD aluminum nitride buffer layer are also described. In an example, a method of fabricating a buffer layer above a substrate involves pre-treating a surface of a substrate. The method also involves, subsequently, reactive sputtering an aluminum nitride (AlN) layer on the surface of the substrate from an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-based gas or plasma.
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公开(公告)号:US10665426B2
公开(公告)日:2020-05-26
申请号:US14986168
申请日:2015-12-31
发明人: Yana Cheng , Zhefeng Li , Chi Hong Ching , Yong Cao , Rongjun Wang
摘要: Methods are disclosed for depositing a thin film of compound material on a substrate. In some embodiments, a method of depositing a layer of compound material on a substrate include: flowing a reactive gas into a plasma processing chamber having a substrate to be sputter deposited disposed therein in opposition to a sputter target comprising a metal; exciting the reactive gas into a reactive gas plasma to react with the sputter target and to form a first layer of compound material thereon; flowing an inert gas into the plasma processing chamber; and exciting the inert gas into a plasma to sputter a second layer of the compound material onto the substrate directly from the first layer of compound material. The cycles of target poisoning and sputtering may be repeated until a compound material layer of appropriate thickness has been formed on the substrate.
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公开(公告)号:US10546973B2
公开(公告)日:2020-01-28
申请号:US16265895
申请日:2019-02-01
发明人: Mingwei Zhu , Nag B. Patibandla , Rongjun Wang , Daniel Lee Diehl , Vivek Agrawal , Anantha Subramani
摘要: Oxygen controlled PVD AlN buffers for GaN-based optoelectronic and electronic devices is described. Methods of forming a PVD AlN buffer for GaN-based optoelectronic and electronic devices in an oxygen controlled manner are also described. In an example, a method of forming an aluminum nitride (AlN) buffer layer for GaN-based optoelectronic or electronic devices involves reactive sputtering an AlN layer above a substrate, the reactive sputtering involving reacting an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-containing gas or a plasma based on a nitrogen-containing gas. The method further involves incorporating oxygen into the AlN layer.
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公开(公告)号:US20190172973A1
公开(公告)日:2019-06-06
申请号:US16265895
申请日:2019-02-01
发明人: Mingwei Zhu , Nag B. Patibandla , Rongjun Wang , Daniel Lee Diehl , Vivek Agrawal , Anantha Subramani
CPC分类号: H01L33/12 , H01J37/32467 , H01J37/32724 , H01J37/3405 , H01J37/347 , H01L29/2003 , H01L31/1856 , H01L33/007 , H01L33/0075 , Y02E10/544
摘要: Oxygen controlled PVD AlN buffers for GaN-based optoelectronic and electronic devices is described. Methods of forming a PVD AlN buffer for GaN-based optoelectronic and electronic devices in an oxygen controlled manner are also described. In an example, a method of forming an aluminum nitride (AlN) buffer layer for GaN-based optoelectronic or electronic devices involves reactive sputtering an AlN layer above a substrate, the reactive sputtering involving reacting an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-containing gas or a plasma based on a nitrogen-containing gas. The method further involves incorporating oxygen into the AlN layer.
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公开(公告)号:US10255935B2
公开(公告)日:2019-04-09
申请号:US15862301
申请日:2018-01-04
发明人: Lin Xue , Chi Hong Ching , Jaesoo Ahn , Mahendra Pakala , Rongjun Wang
IPC分类号: H01L27/20 , G11B5/39 , G11B5/31 , G11C11/15 , H01L21/768
摘要: Embodiments herein provide film stacks utilized to form a magnetic tunnel junction (MTJ) structure on a substrate, comprising: a buffer layer; a seed layer disposed over the buffer layer; a first pinning layer disposed over the seed layer; a synthetic ferrimagnet (SyF) coupling layer disposed over the first pinning layer; a second pinning layer disposed over the SyF coupling layer; a structure blocking layer disposed over the second pinning layer; a magnetic reference layer disposed over the structure blocking layer; a tunnel barrier layer disposed over the magnetic reference layer; a magnetic storage layer disposed over the tunnel barrier layer; a capping layer disposed over the magnetic storage layer, wherein the capping layer comprises one or more layers; and a hard mask disposed over the capping layer, wherein at least one of the capping layer, the buffer layer, and the SyF coupling layer is not fabricated from Ru.
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公开(公告)号:US20180350572A1
公开(公告)日:2018-12-06
申请号:US15614595
申请日:2017-06-05
发明人: Hanbing Wu , Anantha K. Subramani , Ashish Goel , Deepak Jadhav , Rongjun Wang , Chi Hong Ching
摘要: Embodiments of a process kit for use in a multi-cathode process chamber are disclosed herein. In some embodiments, a process kit includes a rotatable shield having a base, a conical portion extend downward and radially outward from the base, and a collar portion extending radially outward from a bottom of the conical portion; an inner deposition ring having a leg portion, a flat portion extending radially inward from the leg portion, a first recessed portion extending radially inward from the flat portion, and a first lip extending upward from an innermost section of the first recessed portion; and an outer deposition ring having a collar portion, an upper flat portion disposed above and extending radially inward from the collar portion, a second recessed portion extending inward from the upper flat portion, and a second lip extending upward from an innermost section of the second recessed portion.
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