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公开(公告)号：US11644493B2
公开(公告)日：2023-05-09
申请号：US17668445
申请日：2022-02-10
Inventor： Saurabh Singh , Chandra B. Prakash , Eric Kimball , Cory J. Peterson , Ryan Lobo
CPC classification number: G01R27/08 , G01R17/105 , G01R27/02 , G01R19/0084 , G01R19/0092
Abstract: A method for estimating resistances of a circuit having a plurality of resistances comprising a first resistance and a second resistance may include applying a first bias voltage across the circuit and measuring a first voltage at a common node between the first resistance and the second resistance in order to determine a mathematical relationship between the first resistance and the second resistance, applying a second bias voltage across the circuit and a third resistance in parallel with the circuit and measuring a second voltage at the common node between the first resistance and the second resistance in order to determine a mathematical relationship between the third resistance and at least one of the first resistance and the second resistance, and based on at least the measurement of the first voltage and the measurement of the second voltage, determining the first resistance and the second resistance as a function of the third resistance.
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公开(公告)号：US10545561B2
公开(公告)日：2020-01-28
申请号：US15233624
申请日：2016-08-10
Inventor： Edmund Mark Schneider , Daniel J. Allen , Saurabh Singh , Aniruddha Satoskar
IPC: G06F1/32 , G06F1/3234 , H03M1/18 , H03M1/00 , G06F1/26 , H03M1/12 , H04R3/04 , G06F1/3203
Abstract: A system may include a plurality of processing paths and a controller. The processing paths may include a first processing path configured to generate a first digital signal based on an analog input signal and one or more other processing paths each configured to consume a smaller amount of power than the first processing path, and each configured to generate a respective digital signal based on the analog input signal, wherein one of the other processing paths has a noise floor based on fidelity characteristics of the analog input signal or subsequent processing requirements of a digital output signal generated from at least one of the first digital signal and the respective digital signals. The controller may be configured to select one of the first digital signal and the respective digital signals as the digital output signal of the processing system based on a magnitude of the analog input signal.
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公开(公告)号：US10263630B2
公开(公告)日：2019-04-16
申请号：US15234741
申请日：2016-08-11
Inventor： Edmund Mark Schneider , Daniel J. Allen , Saurabh Singh , Aniruddha Satoskar
Abstract: In accordance with embodiments of the present disclosure, a processing system may include a plurality of processing paths and a controller. The plurality of processing paths may include a static processing path configured to generate a first digital signal based on an analog input signal and a dynamic processing path configured to generate a second digital signal based on the analog input signal, wherein a parameter of the dynamic processing path is determined based on a characteristic of the analog input signal. The controller may be configured to select the first digital signal as a digital output signal of the processing system when a change is occurring to the characteristic and select the second digital signal as the digital output signal in the absence of change occurring to the characteristic.
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公开(公告)号：US11115046B2
公开(公告)日：2021-09-07
申请号：US16431276
申请日：2019-06-04
Inventor： Vamsikrishna Parupalli , Mark May , Saurabh Singh , Ramya Balasundaram , Mengde Wang , Eric B. Smith
Abstract: A system may include an output stage for driving a load at an output of the output stage, a pulse-width modulation mode path configured to pre-drive the output stage in a first mode of operation, a linear mode path configured to pre-drive the output stage in a second mode of operation and a loop filter coupled at its input to the output of the output stage and coupled at its output to both of the pulse-width modulation mode path and the linear mode path. The pulse-width modulation mode path and the linear mode path may be configured such that a first transfer function between the output of the loop filter and the output of the output stage is substantially equivalent to a second transfer function between the output of the loop filter and the output of the output stage.
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公开(公告)号：US20210075382A1
公开(公告)日：2021-03-11
申请号：US16562856
申请日：2019-09-06
Inventor： Saurabh Singh , Vamsikrishna Parupalli , Stewart Kenly , Eric B. Smith
Abstract: A system may include an output stage comprising a single-ended driver for driving a load at an output of the output stage, a loop filter coupled at its input to the output of the output stage and configured to minimize an error between a target current signal received by the loop filter and an output current driven on the load, and control circuitry configured to, when the load current is driven in a manner such that the load current changes polarity, reset a state variable of the loop filter.
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Patent Agency Ranking
公开(公告)号：US10715121B2
公开(公告)日：2020-07-14
申请号：US16431320
申请日：2019-06-04
Inventor： Saurabh Singh , Vamsikrishna Parupalli
Abstract: A system may include a ramp generation circuit for generating a ramp waveform and comprising a first passive circuit element having an impedance pertinent to generation of the ramp waveform and a control circuit comprising a second passive circuit element which is impedance-correlated to the first passive circuit element. The control circuit may be configured to use the second passive circuit element to generate a control signal for controlling the ramp generation circuit, such that a correlation between the first passive circuit element and the second passive circuit element substantially cancels physical variations of the first passive circuit element and the second passive circuit element and use a control signal clock for generating the control signal that is related to a ramp generation clock for generating the ramp waveform such that a magnitude of the ramp waveform remains substantially independent of frequency of operation.
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公开(公告)号：US10541701B1
公开(公告)日：2020-01-21
申请号：US16124825
申请日：2018-09-07
Inventor： Saurabh Singh , Edmund Mark Schneider , Eric Kimball , Daniel J. Allen
Abstract: An analog conditioning circuit and a corresponding method for processing an analog input signal provide a conditioned analog signal for input into an analog processing circuit. The analog conditioning circuit comprises a main signal path between an input for receiving the analog input signal and an output for outputting the conditioned analog signal, wherein the transfer function of the main signal path is constrained by a transfer function requirement associated with the analog processing circuit; and a feedforward signal path comprising a first filtering block configured to attenuate desired frequencies of a first signal derived from the analog input signal to provide a filtered analog signal; wherein the feedforward signal path is configured to input the filtered analog signal into the main signal path such that the filtered analog signal is subtracted from a second signal derived from the analog input signal to provide the conditioned analog signal.
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公开(公告)号：US10236827B2
公开(公告)日：2019-03-19
申请号：US15622722
申请日：2017-06-14
Inventor： Lei Zhu , Ku He , Xin Zhao , Miao Song , Saurabh Singh , Vinod Jayakumar
Abstract: A method may include, in an apparatus comprising a closed loop amplifier and a signal processing block configured to generate an amplifier input signal as a function of an upstream signal received at an input of the signal processing block, in a calibration mode of the apparatus: decoupling a second stage input of the amplifier from a first stage output of the amplifier; determining an offset signal that when applied to the input of a signal processing block as the upstream signal generates approximately zero as an intermediate signal generated by the first stage of the amplifier; and controlling one or more parameters of the apparatus based on the offset signal to compensate for an offset of at least one of the first stage and the signal processing block.
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公开(公告)号：US11536767B2
公开(公告)日：2022-12-27
申请号：US17065799
申请日：2020-10-08
Inventor： James Wells , Saurabh Singh , Huy Binh Le , Gavin Wilson , Niall McGurnaghan , Simon R. Foster , Mark McCloy-Stevens
Abstract: The present disclosure relates to self-test circuitry for a system that includes one or more current control subsystems, each current control subsystem having a load terminal for coupling the current control subsystem to a load. The self-test circuitry comprises: a signal path associated with each current control subsystem, each signal path configured to selectively couple a measurement node to the load terminal of the current control subsystem, wherein the measurement node is common to all of the signal paths; voltage detection circuitry; and test voltage source circuitry configured to provide a test voltage to the measurement node. The voltage detection circuitry is operable to output a signal indicative of a fault condition if a voltage detected at the measurement node differs from the test voltage when the measurement node is coupled to the load terminal.
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公开(公告)号：US11477868B2
公开(公告)日：2022-10-18
申请号：US17123429
申请日：2020-12-16
Inventor： Dave Smith , Saurabh Singh , Andrew Buist , Paulius Cerebiejus , Mark J. McCloy-Stevens , Terence A. Orr
IPC: H05B45/10 , H05B45/34 , H05B45/345 , H03F3/04
Abstract: The present disclosure relates to current control circuitry for controlling a current through a load. The current control circuitry comprises amplifier circuitry, reference voltage generator circuitry configured to supply a fixed reference voltage to a first input of the amplifier circuitry and an output stage comprising: a control terminal coupled to an output of the amplifier circuitry; a current input terminal configured to be coupled to the load; and a current output terminal. The current control circuitry further comprises a variable resistance coupled to the current output terminal of the output stage, and a feedback path between the current output terminal of the output stage and a second terminal of the amplifier circuitry for providing a feedback voltage to a second input of the amplifier circuitry.
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