Apparatuses for and methods of displaying three-dimensional images
    3.
    发明申请
    Apparatuses for and methods of displaying three-dimensional images 有权
    显示三维图像的装置和方法

    公开(公告)号:US20110001746A1

    公开(公告)日:2011-01-06

    申请号:US12659156

    申请日:2010-02-26

    Abstract: An apparatus for displaying a three-dimensional (3D) image may include a plurality of display panels and a controller configured to apply image signals to each of the plurality of display panels. At least one of the display panels may include a transparent display panel. The plurality of display panels may be spaced apart from each other in a depth direction. A method of displaying a three-dimensional (3D) image may include displaying plane images on each of a plurality of display panels. At least one of the plurality of display panels may include a transparent display panel. The plurality of display panels may be spaced apart from each other in a depth direction.

    Abstract translation: 用于显示三维(3D)图像的装置可以包括多个显示面板和被配置为将图像信号应用于多个显示面板中的每一个的控制器。 至少一个显示面板可以包括透明显示面板。 多个显示面板可以在深度方向上彼此间隔开。 显示三维(3D)图像的方法可以包括在多个显示面板的每一个上显示平面图像。 多个显示面板中的至少一个可以包括透明显示面板。 多个显示面板可以在深度方向上彼此间隔开。

    Ferroelectric emitter
    5.
    发明授权
    Ferroelectric emitter 有权
    铁电发射器

    公开(公告)号:US06885138B1

    公开(公告)日:2005-04-26

    申请号:US09665122

    申请日:2000-09-20

    Applicant: In-Kyeong Yoo

    Inventor: In-Kyeong Yoo

    Abstract: A ferroelectric multi-layered emitter used in a semiconductor lithography process includes a lower electrode, a ferroelectric layer, having a top surface with two end portions, which overlies the lower electrode, an insertion electrode formed on a region excluding the two end portions of the top surface of the ferroelectric layer, a dielectric layer, having sides and a top surface with two end portions, which has a predetermined pattern and is formed along the top surface of the ferroelectric layer and the insertion electrode, and a dummy upper electrode formed on a side of the dielectric layer opposite the ferroelectric layer. The ferroelectric emitter of the present invention guarantees uniform electron emission from wide and narrow gaps of a mask layer and in an isolated pattern such as a doughnut shape for ferroelectric switching emission lithography.

    Abstract translation: 在半导体光刻工艺中使用的铁电多层发射体包括:下电极,铁电层,具有两个端部的顶表面,覆盖在下电极上;插入电极,形成在除 铁电层的上表面,介电层,具有侧面和具有两个端部的顶表面,其具有预定图案并沿着铁电层和插入电极的顶表面形成,并且虚设上电极形成在 电介质层的与铁电层相对的一侧。 本发明的铁电发射体保证了掩模层的宽和窄间隙的均匀的电子发射以及诸如用于铁电开关发射光刻的环形形状的隔离图案。

    Ferroelectric emitter
    6.
    发明授权
    Ferroelectric emitter 失效
    铁电发射器

    公开(公告)号:US06479924B1

    公开(公告)日:2002-11-12

    申请号:US09636634

    申请日:2000-08-11

    Applicant: In-Kyeong Yoo

    Inventor: In-Kyeong Yoo

    CPC classification number: H01J1/30 H01J2201/306

    Abstract: A ferroelectric emitter is described. The ferroelectric emitter of the present invention includes a ferroelectric layer having a first side, an opposing second side, and a top surface, a first and a second electrode formed along the top surface of the ferroelectric layer, and a mask layer which has a predetermined pattern and is formed along the top surface of the ferroelectric layer between the first and second electrodes. When used in ferroelectric switching emission lithography, the ferroelectric emitter of the present invention allows electron emission from a wide or narrow gap of a mask layer and from an isolated pattern such as a doughnut shape while facilitating re-poling in pyroelectric electron emission.

    Abstract translation: 描述了铁电发射器。 本发明的铁电体发射体包括具有第一面,相对的第二面以及顶面的强电介质层,沿铁电体层的上表面形成的第一电极和第二电极,以及具有规定的 并且沿着铁电层的顶表面在第一和第二电极之间形成。 当用于铁电开关发射光刻时,本发明的铁电发射体允许从掩模层的宽或窄间隙以及诸如环形形状的隔离图案发射电子,同时促进热电子发射中的再极化。

    Method of manufacturing transistor that utilizes current direction limiting units between phase change layer and bit lines and between phase change layer and word lines
    8.
    发明授权
    Method of manufacturing transistor that utilizes current direction limiting units between phase change layer and bit lines and between phase change layer and word lines 失效
    制造晶体管的方法,其利用相变层和位线之间以及相变层和字线之间的电流方向限制单元

    公开(公告)号:US07638361B2

    公开(公告)日:2009-12-29

    申请号:US12216742

    申请日:2008-07-10

    CPC classification number: H01L29/685

    Abstract: A transistor in which a physical property of its channel is changed according to an applied voltage, and methods of manufacturing and operating the same are provided. The transistor may include a first conductive layer on a substrate, a phase change layer and a second conductive layer which are sequentially stacked on the first conductive layer, a first current direction limiting unit and a second current direction limiting unit formed on the second conductive layer by being separated within a space, a third conductive layer and a fourth conductive layer formed on the first current direction limiting unit and the second current direction limiting unit, respectively, a word line connected to the third conductive layer, a bit line connected to the fourth conductive layer, and a voltage lowering unit connected to the word line.

    Abstract translation: 提供其通道的物理特性根据施加的电压而改变的晶体管,并且提供其制造和操作方法。 晶体管可以包括基板上的第一导电层,相继层叠在第一导电层上的相变层和第二导电层,形成在第二导电层上的第一电流方向限制单元和第二电流方向限制单元 通过在空间内分离,分别形成在第一电流方向限制单元和第二电流方向限制单元上的第三导电层和第四导电层,连接到第三导电层的字线,连接到第三导电层的位线 第四导电层和连接到字线的降压单元。

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