公开(公告)号：US11894445B2

公开(公告)日：2024-02-06

申请号：US17393779

申请日：2021-08-04

Applicant: Infineon Technologies Austria AG

Inventor： Daniel Tutuc ,  Matthias Kuenle ,  Ingo Muri ,  Hans Weber

IPC: H01L29/66 ,  H01L21/265 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234

CPC classification number: H01L29/66712 ,  H01L21/26586 ,  H01L21/823487 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/7802

Abstract: Disclosed is a method for producing a semiconductor device, the method including forming a plurality of semiconductor arrangements one above the other, wherein forming each of the plurality of semiconductor arrangements includes forming a semiconductor layer, forming a plurality of trenches in a first surface of the semiconductor layer, and implanting dopant atoms of at least one of a first type and a second type into at least one of a first sidewall and a second sidewall of each of the plurality of trenches. Forming of at least one of the plurality of semiconductor arrangements further includes forming a protective layer covering mesa regions between the plurality of trenches of the respective semiconductor layer, and covering a bottom, the first sidewall and the second sidewall of each of the plurality of trenches that are formed in the respective semiconductor layer.

公开(公告)号：US09768273B2

公开(公告)日：2017-09-19

申请号：US15187232

申请日：2016-06-20

Applicant: Infineon Technologies Austria AG

Inventor： Ravi Joshi ,  Johannes Baumgartl ,  Martin Poelzl ,  Matthias Kuenle ,  Juergen Steinbrenner ,  Andreas Haghofer ,  Christoph Gruber ,  Georg Ehrentraut

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/306 ,  H01L21/311 ,  H01L29/423 ,  H01L29/78 ,  H01L21/308

CPC classification number: H01L29/66613 ,  H01L21/02233 ,  H01L21/02647 ,  H01L21/30604 ,  H01L21/3086 ,  H01L21/31111 ,  H01L21/31144 ,  H01L29/0649 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/78 ,  H01L29/7813 ,  H01L29/7827

Abstract: In one aspect, a method of forming a trench in a semiconductor material includes forming a first dielectric layer on a semiconductor substrate. The first dielectric layer includes first openings. An epitaxial layer is grown on the semiconductor substrate by an epitaxial lateral overgrowth process. The first openings are filled by the epitaxial layer and the epitaxial layer is grown onto adjacent portions of the first dielectric layer so that part of the first dielectric layer is uncovered by the epitaxial layer and a gap forms between opposing sidewalls of the epitaxial layer over the part of the first dielectric layer that is uncovered by the epitaxial layer. The gap defines a first trench in the epitaxial layer that extends to the first dielectric layer.

公开(公告)号：US20240128356A1

公开(公告)日：2024-04-18

申请号：US18392923

申请日：2023-12-21

Applicant: Infineon Technologies Austria AG

Inventor： Daniel Tutuc ,  Matthias Kuenle ,  Ingo Muri ,  Hans Weber

IPC: H01L29/66 ,  H01L21/265 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78

CPC classification number: H01L29/66712 ,  H01L21/26586 ,  H01L21/823487 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/7802

Abstract: Disclosed is a method for producing a semiconductor device, the method including forming a plurality of semiconductor arrangements one above the other, wherein forming each of the plurality of semiconductor arrangements includes forming a semiconductor layer, forming a plurality of trenches in a first surface of the semiconductor layer, and implanting dopant atoms of at least one of a first type and a second type into at least one of a first sidewall and a second sidewall of each of the plurality of trenches. Forming of at least one of the plurality of semiconductor arrangements further includes forming a protective layer covering mesa regions between the plurality of trenches of the respective semiconductor layer, and covering a bottom, the first sidewall and the second sidewall of each of the plurality of trenches that are formed in the respective semiconductor layer.

公开(公告)号：US10243066B2

公开(公告)日：2019-03-26

申请号：US15589352

申请日：2017-05-08

Applicant: Infineon Technologies Austria AG

Inventor： Daniel Schloegl ,  Johannes Baumgartl ,  Matthias Kuenle ,  Erwin Lercher ,  Hans-Joachim Schulze ,  Christoph Weiss

IPC: H01L29/74 ,  H01L31/111 ,  H01L29/739 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L21/283 ,  H01L21/265 ,  H01L29/36 ,  H01L21/02 ,  H01L29/78 ,  H01L29/861 ,  H01L29/868 ,  H01L21/266 ,  H01L29/16 ,  H01L29/167 ,  H01L29/20

Abstract: A method of producing a semiconductor device is presented. The method comprises: providing a semiconductor substrate having a surface; epitaxially growing, along a vertical direction (Z) perpendicular to the surface, a back side emitter layer on top of the surface, wherein the back side emitter layer has dopants of a first conductivity type or dopants of a second conductivity type complementary to the first conductivity type; epitaxially growing, along the vertical direction (Z), a drift layer having dopants of the first conductivity type above the back side emitter layer, wherein a dopant concentration of the back side emitter layer is higher than a dopant concentration of the drift layer; and creating, either within or on top of the drift layer, a body region having dopants of the second conductivity type, a transition between the body region and the drift layer forming a pn-junction (Zpn). Epitaxially growing the drift layer includes creating, within the drift layer, a dopant concentration profile (P) of dopants of the first conductivity type along the vertical direction (Z), the dopant concentration profile (P) in the drift layer exhibiting a variation of a concentration of dopants of the first conductivity type along the vertical direction (Z).

公开(公告)号：US20170221988A1

公开(公告)日：2017-08-03

申请号：US15417939

申请日：2017-01-27

Applicant: Infineon Technologies Austria AG

Inventor： Johannes Baumgartl ,  Matthias Kuenle

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/3065

CPC classification number: H01L29/0634 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/0257 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/3065 ,  H01L29/66333 ,  H01L29/7395

Abstract: Trenches are formed in a semiconductor layer of a semiconductor substrate. A mixture that contains trichlorosilane and hydrogen gas is fed into a process chamber containing the semiconductor substrate. A barometric pressure in the process chamber is at least 50% of standard atmosphere. The trenches are filled with epitaxially deposited crystalline silicon.

公开(公告)号：US09793387B2

公开(公告)日：2017-10-17

申请号：US15239093

申请日：2016-08-17

Applicant: Infineon Technologies Austria AG

Inventor： Michael Hutzler ,  Georg Ehrentraut ,  Matthias Kuenle ,  Ralf Siemieniec

IPC: H01L29/66 ,  H01L29/739 ,  H01L29/40 ,  H01L29/36 ,  H01L29/423 ,  H01L29/10

CPC classification number: H01L29/7397 ,  H01L21/02639 ,  H01L23/367 ,  H01L23/3677 ,  H01L27/0248 ,  H01L29/0623 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/407 ,  H01L29/417 ,  H01L29/423 ,  H01L29/4236 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/7396

Abstract: A semiconductor device includes a drift region extending from a first surface into a semiconductor portion. A body region between two portions of the drift region forms a first pn junction with the drift region. A source region forms a second pn junction with the body region. The pn junctions include sections perpendicular to the first surface. Gate structures extend into the body regions and include a gate electrode. Field plate structures extend into the drift region and include a field electrode separated from the gate electrode. A gate shielding structure is configured to reduce a capacitive coupling between the gate structures and a backplate electrode directly adjoining a second surface.

公开(公告)号：US20170054012A1

公开(公告)日：2017-02-23

申请号：US15239093

申请日：2016-08-17

Applicant: Infineon Technologies Austria AG

Inventor： Michael Hutzler ,  Georg Ehrentraut ,  Matthias Kuenle ,  Ralf Siemieniec

IPC: H01L29/739 ,  H01L29/66 ,  H01L29/423 ,  H01L29/10 ,  H01L29/40 ,  H01L29/36

CPC classification number: H01L29/7397 ,  H01L21/02639 ,  H01L23/367 ,  H01L23/3677 ,  H01L27/0248 ,  H01L29/0623 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/407 ,  H01L29/417 ,  H01L29/423 ,  H01L29/4236 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/7396

Abstract: A semiconductor device includes a drift region extending from a first surface into a semiconductor portion. A body region between two portions of the drift region forms a first pn junction with the drift region. A source region forms a second pn junction with the body region. The pn junctions include sections perpendicular to the first surface. Gate structures extend into the body regions and include a gate electrode. Field plate structures extend into the drift region and include a field electrode separated from the gate electrode. A gate shielding structure is configured to reduce a capacitive coupling between the gate structures and a backplate electrode directly adjoining a second surface.

Abstract translation: 半导体器件包括从第一表面延伸到半导体部分的漂移区域。 漂移区的两部分之间的体区与漂移区形成第一pn结。 源区域与身体区域形成第二pn结。 pn结包括垂直于第一表面的部分。 栅极结构延伸到体区，并包括栅电极。 场板结构延伸到漂移区域并且包括与栅电极分离的场电极。 栅极屏蔽结构被配置为减小栅极结构与直接邻接第二表面的背板电极之间的电容耦合。

公开(公告)号：US20160308028A1

公开(公告)日：2016-10-20

申请号：US15187232

申请日：2016-06-20

Applicant: Infineon Technologies Austria AG

Inventor： Ravi Joshi ,  Johannes Baumgartl ,  Martin Poelzl ,  Matthias Kuenle ,  Juergen Steinbrenner ,  Andreas Haghofer ,  Christoph Gruber ,  Georg Ehrentraut

IPC: H01L29/66 ,  H01L29/423 ,  H01L21/311 ,  H01L21/02 ,  H01L21/306

CPC classification number: H01L29/66613 ,  H01L21/02233 ,  H01L21/02647 ,  H01L21/30604 ,  H01L21/3086 ,  H01L21/31111 ,  H01L21/31144 ,  H01L29/0649 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/78 ,  H01L29/7813 ,  H01L29/7827

Abstract: In one aspect, a method of forming a trench in a semiconductor material includes forming a first dielectric layer on a semiconductor substrate. The first dielectric layer includes first openings. An epitaxial layer is grown on the semiconductor substrate by an epitaxial lateral overgrowth process. The first openings are filled by the epitaxial layer and the epitaxial layer is grown onto adjacent portions of the first dielectric layer so that part of the first dielectric layer is uncovered by the epitaxial layer and a gap forms between opposing sidewalls of the epitaxial layer over the part of the first dielectric layer that is uncovered by the epitaxial layer. The gap defines a first trench in the epitaxial layer that extends to the first dielectric layer.

Abstract translation: 一方面，在半导体材料中形成沟槽的方法包括在半导体衬底上形成第一电介质层。 第一介电层包括第一开口。 通过外延横向过度生长工艺在半导体衬底上生长外延层。 第一开口由外延层填充，并且外延层生长到第一介电层的相邻部分上，使得第一介电层的一部分未被外延层覆盖，并且在外延层的相对侧壁之间形成间隙 由外延层未覆盖的第一电介质层的一部分。 该间隙限定外延层中延伸到第一介电层的第一沟槽。

公开(公告)号：US09379196B2

公开(公告)日：2016-06-28

申请号：US14174185

申请日：2014-02-06

Applicant: Infineon Technologies Austria AG

Inventor： Ravi Joshi ,  Johannes Baumgartl ,  Martin Poelzl ,  Matthias Kuenle ,  Juergen Steinbrenner ,  Andreas Haghofer ,  Christoph Gruber ,  Georg Ehrentraut

IPC: H01L27/01 ,  H01L29/423 ,  H01L21/02 ,  H01L21/306 ,  H01L21/311 ,  H01L29/66 ,  H01L29/78 ,  H01L21/308

CPC classification number: H01L29/66613 ,  H01L21/02233 ,  H01L21/02647 ,  H01L21/30604 ,  H01L21/3086 ,  H01L21/31111 ,  H01L21/31144 ,  H01L29/0649 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/78 ,  H01L29/7813 ,  H01L29/7827

Abstract: In one aspect, a method of forming a trench in a semiconductor material includes forming a first dielectric layer on a semiconductor substrate. The first dielectric layer includes first openings. An epitaxial layer is grown on the semiconductor substrate by an epitaxial lateral overgrowth process. The first openings are filled by the epitaxial layer and the epitaxial layer is grown onto adjacent portions of the first dielectric layer so that part of the first dielectric layer is uncovered by the epitaxial layer and a gap forms between opposing sidewalls of the epitaxial layer over the part of the first dielectric layer that is uncovered by the epitaxial layer. The gap defines a first trench in the epitaxial layer that extends to the first dielectric layer.

Abstract translation: 一方面，在半导体材料中形成沟槽的方法包括在半导体衬底上形成第一电介质层。 第一介电层包括第一开口。 通过外延横向过度生长工艺在半导体衬底上生长外延层。 第一开口由外延层填充，并且外延层生长到第一介电层的相邻部分上，使得第一介电层的一部分未被外延层覆盖，并且在外延层的相对侧壁之间形成间隙 由外延层未覆盖的第一电介质层的一部分。 该间隙限定外延层中延伸到第一介电层的第一沟槽。

公开(公告)号：US20150221735A1

公开(公告)日：2015-08-06

申请号：US14174185

申请日：2014-02-06

Applicant: Infineon Technologies Austria AG

Inventor： Ravi Joshi ,  Johannes Baumgartl ,  Martin Poelzl ,  Matthias Kuenle ,  Juergen Steinbrenner ,  Andreas Haghofer ,  Christoph Gruber ,  Georg Ehrentraut

IPC: H01L29/423 ,  H01L29/78 ,  H01L21/311 ,  H01L29/66 ,  H01L21/02 ,  H01L21/306

CPC classification number: H01L29/66613 ,  H01L21/02233 ,  H01L21/02647 ,  H01L21/30604 ,  H01L21/3086 ,  H01L21/31111 ,  H01L21/31144 ,  H01L29/0649 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/78 ,  H01L29/7813 ,  H01L29/7827

Abstract: In one aspect, a method of forming a trench in a semiconductor material includes forming a first dielectric layer on a semiconductor substrate. The first dielectric layer includes first openings. An epitaxial layer is grown on the semiconductor substrate by an epitaxial lateral overgrowth process. The first openings are filled by the epitaxial layer and the epitaxial layer is grown onto adjacent portions of the first dielectric layer so that part of the first dielectric layer is uncovered by the epitaxial layer and a gap forms between opposing sidewalls of the epitaxial layer over the part of the first dielectric layer that is uncovered by the epitaxial layer. The gap defines a first trench in the epitaxial layer that extends to the first dielectric layer.

Abstract translation: 一方面，在半导体材料中形成沟槽的方法包括在半导体衬底上形成第一电介质层。 第一介电层包括第一开口。 通过外延横向过度生长工艺在半导体衬底上生长外延层。 第一开口由外延层填充，并且外延层生长到第一介电层的相邻部分上，使得第一介电层的一部分未被外延层覆盖，并且在外延层的相对侧壁之间形成间隙 由外延层未覆盖的第一电介质层的一部分。 该间隙限定外延层中延伸到第一介电层的第一沟槽。