COMPLIANT ELECTROSTATIC TRANSFER HEAD WITH DEFINED CAVITY
    3.
    发明申请
    COMPLIANT ELECTROSTATIC TRANSFER HEAD WITH DEFINED CAVITY 有权
    具有定义孔的合适静电转印头

    公开(公告)号:US20160094160A1

    公开(公告)日:2016-03-31

    申请号:US14502994

    申请日:2014-09-30

    CPC classification number: B81C99/002 H01H59/0009 H01L41/113

    Abstract: A compliant electrostatic transfer head and method of forming a compliant electrostatic transfer head are described. In an embodiment, a compliant electrostatic transfer head includes a base substrate, a cavity template layer on the base substrate, a first confinement layer between the base substrate and the cavity template layer, and a patterned device layer on the cavity template layer. The patterned device layer includes an electrode that is deflectable toward a cavity in the cavity template layer. In an embodiment, a second confinement layer is between the cavity template layer and the patterned device layer.

    Abstract translation: 描述了柔性静电转印头和形成顺应性静电转印头的方法。 在一个实施例中,顺应性静电转印头包括基底衬底,在基底衬底上的空腔模板层,在基底衬底和腔模板层之间的第一限制层,以及腔模板层上的图案化器件层。 图案化器件层包括能够朝向空腔模板层中的空腔偏转的电极。 在一个实施例中,第二限制层位于空腔模板层和图案化器件层之间。

    Compliant micro device transfer head
    9.
    发明授权
    Compliant micro device transfer head 有权
    符合微器件传输头

    公开(公告)号:US09000566B2

    公开(公告)日:2015-04-07

    申请号:US14173693

    申请日:2014-02-05

    Abstract: A compliant monopolar micro device transfer head array and method of forming a compliant monopolar micro device transfer array from an SOI substrate are described. In an embodiment, the micro device transfer head array including a base substrate and a patterned silicon layer over the base substrate. The patterned silicon layer may include a silicon interconnect and an array of silicon electrodes electrically connected with the silicon interconnect. Each silicon electrode includes a mesa structure protruding above the silicon interconnect, and each silicon electrode is deflectable into a cavity between the base substrate and the silicon electrode. A dielectric layer covers a top surface of each mesa structure.

    Abstract translation: 描述了一种兼容的单极微器件传输头阵列和从SOI衬底形成兼容单极微器件传输阵列的方法。 在一个实施例中,微器件转移头阵列包括基底衬底和在基底衬底上的图案化硅层。 图案化硅层可以包括硅互连和与硅互连电连接的硅电极阵列。 每个硅电极包括在硅互连上方突出的台面结构,并且每个硅电极可偏转到基底基板和硅电极之间的空腔中。 介电层覆盖每个台面结构的顶面。

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