Chip scale package structure and method of forming the same

    公开(公告)号:US11450606B2

    公开(公告)日:2022-09-20

    申请号:US16430076

    申请日:2019-06-03

    申请人: MediaTek Inc.

    摘要: A semiconductor package structure including a semiconductor die having a first surface, a second surface opposite the first surface, and a third surface adjoined between the first surface and the second surface. A first protective insulating layer covers the first and third surfaces of the semiconductor die. A redistribution layer (RDL) structure is electrically coupled to the semiconductor die and surrounded by the first protective insulating layer on the first surface of the semiconductor die. A first passivation layer covers the first protective insulating layer and the RDL structure. At least one conductive structure passes through the first passivation layer and is electrically coupled to the RDL structure. A method of forming the semiconductor package is also provided.

    Semiconductor package structure
    6.
    发明授权

    公开(公告)号:US11387176B2

    公开(公告)日:2022-07-12

    申请号:US16813898

    申请日:2020-03-10

    申请人: MEDIATEK INC.

    摘要: A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a first semiconductor die, and a second semiconductor die. The substrate includes a first substrate partition and a second substrate partition. The first substrate partition has a first wiring structure. The second substrate partition is adjacent to the first substrate partition and has a second wiring structure. The first substrate partition and the second substrate partition are surrounded by a first molding material. The first semiconductor die is disposed over the substrate and electrically coupled to the first wiring structure. The second semiconductor die is disposed over the substrate and electrically coupled to the second wiring structure.

    Package structure
    7.
    发明授权

    公开(公告)号:US11348900B2

    公开(公告)日:2022-05-31

    申请号:US16899335

    申请日:2020-06-11

    申请人: MediaTek Inc.

    摘要: A package structure comprising: a substrate, having at least one conductive units provided at a first surface of the substrate; at least one first die, provided on a second surface of the substrate; a connecting layer, provided on the first die; a second die, provided on the connecting layer, wherein the connecting layer comprises at least one bump for connecting the first die; and at least one bonding wire. The connecting layer has a first touch side and a second touch side, the first touch side contacts a first surface of the first die and the second touch side contacts a second surface of the second die, an area of the first touch side is smaller than which for the first surface of the first die, and a size of the first die equals to which of the second die.

    Semiconductor package structure
    8.
    发明授权

    公开(公告)号:US10784211B2

    公开(公告)日:2020-09-22

    申请号:US15906098

    申请日:2018-02-27

    申请人: MEDIATEK INC.

    摘要: A semiconductor package structure is provided. The semiconductor package structure includes a substrate having a first surface and a second surface opposite thereto. The substrate includes a wiring structure. The semiconductor package structure also includes a first semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The semiconductor package structure further includes a second semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The first semiconductor die and the second semiconductor die are separated by a molding material. In addition, the semiconductor package structure includes a first hole and a second hole formed on the second surface of the substrate.

    Package structure
    9.
    发明授权

    公开(公告)号:US10727202B2

    公开(公告)日:2020-07-28

    申请号:US15347803

    申请日:2016-11-10

    申请人: MEDIATEK INC.

    摘要: A package structure comprising: a substrate, having at least one conductive units provided at a first surface of the substrate; at least one first die, provided on a second surface of the substrate; a connecting layer, provided on the first die; a second die, provided on the connecting layer, wherein the connecting layer comprises at least one bump for connecting the first die; and at least one bonding wire. The connecting layer has a first touch side and a second touch side, the first touch side contacts a first surface of the first die and the second touch side contacts a second surface of the second die, an area of the first touch side is smaller than which for the first surface of the first die, and a size of the first die equals to which of the second die.