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    Integrated circuitry comprising a memory array comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells
    3.
    发明授权
    Integrated circuitry comprising a memory array comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells 有权

    公开(公告)号：US11792983B2

    公开(公告)日：2023-10-17

    申请号：US17068430

    申请日：2020-10-12

    Applicant: Micron Technology, Inc.

    Inventor： Daniel Billingsley ,  Jordan D. Greenlee ,  John D. Hopkins ,  Yongjun Jeff Hu ,  Swapnil Lengade

    IPC: H01L21/31 ,  H10B43/27 ,  H01L21/311 ,  H10B41/27

    CPC classification number: H10B43/27 ,  H01L21/31111 ,  H10B41/27

    Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming an upper stack directly above a lower stack. The lower stack comprises vertically-alternating lower-first-tiers and lower-second-tiers. The upper stack comprises vertically-alternating upper-first-tiers and upper-second-tiers. Lower channel openings extend through the lower-first-tiers and the lowers-second-tiers. The lower channel openings have sacrificial material therein. An upper of the lower-first-tiers or a lower of the upper-first-tiers comprises non-stoichiometric silicon nitride comprising (a) or (b), where (a): a nitrogen-to-silicon atomic ratio greater than 1.33 and less than 1.5; and (b): a nitrogen-to-silicon atomic ratio greater than or equal to 1.0 and less than 1.33. A higher of the upper-first-tiers that is above said lower upper-first-tier comprises silicon nitride not having either the (a) or the (b). Upper channel openings are etched through the upper-first-tiers and the upper-second-tiers to stop on said upper lower-first-tier or said lower upper-first-tier. After the stop, the sacrificial material is removed from the lower channel openings and form channel-material strings in the upper and lower channel openings. Other embodiments, including structure independent of method, are disclosed.

    Memory Arrays And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells
    7.
    发明申请
    Memory Arrays And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells 有权

    公开(公告)号：US20210111064A1

    公开(公告)日：2021-04-15

    申请号：US16599856

    申请日：2019-10-11

    Applicant: Micron Technology, Inc.

    Inventor： Daniel Billingsley ,  Jordan D. Greenlee ,  Yongjun Jeff Hu

    IPC: H01L21/762 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/1157

    Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. Horizontally-elongated trenches are formed into the stack to form laterally-spaced memory-block regions. Bridge material is formed across the trenches laterally-between and longitudinally-along immediately-laterally-adjacent of the memory-block regions. The bridge material comprises longitudinally-alternating first and second regions. The first regions of the bridge material are ion implanted differently than the second regions of the bridge material to change relative etch rate of one of the first or second regions relative to the other in an etching process. The first and second regions are subjected to the etching process to selectively etch away one of the first and second regions relative to the other to form bridges that extend across the trenches laterally-between and longitudinally-spaced-along the immediately-laterally-adjacent memory-block regions. Other embodiments and structure independent of method are disclosed.

    OHMIC CONTACTS FOR SEMICONDUCTOR STRUCTURES
    8.
    发明申请
    OHMIC CONTACTS FOR SEMICONDUCTOR STRUCTURES 审中-公开

    公开(公告)号：US20200035891A1

    公开(公告)日：2020-01-30

    申请号：US16592425

    申请日：2019-10-03

    Applicant: Micron Technology, Inc.

    Inventor： Yongjun Jeff Hu ,  John Mark Meldrim ,  Shanming Mou ,  Everett Allen McTeer

    IPC: H01L33/62 ,  H01L33/40 ,  H01L33/00

    Abstract: A composition and method for formation of ohmic contacts on a semiconductor structure are provided. The composition includes a TiAlxNy material at least partially contiguous with the semiconductor structure. The TiAlxNy material can be TiAl3. The composition can include an aluminum material, the aluminum material being contiguous to at least part of the TiAlxNy material, such that the TiAlxNy material is between the aluminum material and the semiconductor structure. The method includes annealing the composition to form an ohmic contact on the semiconductor structure.

    Phase change memory stack with treated sidewalls
    9.
    发明授权
    Phase change memory stack with treated sidewalls 有权

    公开(公告)号：US10224479B2

    公开(公告)日：2019-03-05

    申请号：US15882666

    申请日：2018-01-29

    Applicant: Micron Technology, Inc.

    Inventor： Tsz W. Chan ,  Yongjun Jeff Hu ,  Swapnil Lengade ,  Shu Qin ,  Everett Allen McTeer

    IPC: H01L45/00 ,  G11C13/00 ,  H01L27/24

    Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall. A dielectric material is implanted into the film of the adhesion species to form a sidewall liner.

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