公开(公告)号：US08980739B2

公开(公告)日：2015-03-17

申请号：US13473728

申请日：2012-05-17

Applicant: Moon-gi Cho ,  Sang-hee Lee ,  Jeong-woo Park

Inventor： Moon-gi Cho ,  Sang-hee Lee ,  Jeong-woo Park

IPC: H01L21/44 ,  H01L23/00

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L2224/03 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/11902 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/01083 ,  H01L2924/01051 ,  H01L2924/01029 ,  H01L2924/01046

Abstract: A method of forming bumps of a semiconductor device with reduced solder bump collapse. The method includes preparing a semiconductor substrate in which pads are exposed externally from a passivation layer; forming a seed layer on the semiconductor substrate; forming a photoresist pattern to expose the seed layer on the pads; forming pillars by performing a primary electroplating on a region exposed by the photoresist pattern; forming a solder layer by performing a secondary electroplating on the pillars; removing the photoresist pattern; forming solder bumps, in which solders partially cover surfaces of the pillars, by performing a reflow process on the semiconductor substrate; and removing portions of the seed layer formed in regions other than the solder bumps.

Abstract translation: 一种形成具有减少的焊料凹陷的半导体器件的凸块的方法。 该方法包括制备其中焊盘从钝化层向外暴露的半导体衬底; 在半导体衬底上形成晶种层; 形成光致抗蚀剂图案以暴露焊盘上的种子层; 通过在由光致抗蚀剂图案曝光的区域上执行初级电镀形成柱; 通过在柱上进行二次电镀形成焊料层; 去除光致抗蚀剂图案; 通过对半导体衬底进行回流处理，形成焊料凸点，其中焊料部分地覆盖柱的表面; 以及除去形成在除了焊锡凸块之外的区域中的种子层的部分。

公开(公告)号：US08710657B2

公开(公告)日：2014-04-29

申请号：US13242864

申请日：2011-09-23

Applicant: Jeong-woo Park ,  Moon-gi Cho ,  Ui-hyoung Lee ,  Sun-hee Park

Inventor： Jeong-woo Park ,  Moon-gi Cho ,  Ui-hyoung Lee ,  Sun-hee Park

IPC: H01L21/44

CPC classification number: H01L23/49833 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/06155 ,  H01L2224/06156 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13005 ,  H01L2224/13012 ,  H01L2224/13016 ,  H01L2224/13082 ,  H01L2224/13109 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/13171 ,  H01L2224/13193 ,  H01L2224/14051 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01052 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Semiconductor packages connecting a semiconductor chip to an external device by bumps are provided. The semiconductor packages may include a connection pad on a semiconductor chip, a connecting bump on and configured to be electrically connected to the connection pad and a supporting bump on the semiconductor chip and configured to be electrically isolated from the connection pad. The connection bump may include a first pillar and a first solder ball and the supporting bump may include a second pillar and a second solder ball. The semiconductor packages may further include a solder channel in the second pillar configured to allow a portion of the second solder ball to extend into the solder channel along a predetermined direction.

Abstract translation: 提供了通过凸块将半导体芯片连接到外部设备的半导体封装。 半导体封装可以包括半导体芯片上的连接焊盘，连接焊盘，并且构造成电连接到连接焊盘，并且在半导体芯片上具有支撑突起，并且被配置为与连接焊盘电隔离。 连接凸起可以包括第一柱和第一焊球，并且支撑凸起可以包括第二柱和第二焊球。 半导体封装还可以包括在第二柱中的焊料通道，其被配置为允许第二焊球的一部分沿着预定方向延伸到焊料通道中。

公开(公告)号：US20190138473A1

公开(公告)日：2019-05-09

申请号：US16005063

申请日：2018-06-11

Applicant: Dong-Min Kim ,  Jeong-woo Park ,  Wook Han Jeong ,  Jin Hwan Choi

Inventor： Dong-Min Kim ,  Jeong-woo Park ,  Wook Han Jeong ,  Jin Hwan Choi

IPC: G06F13/26 ,  G06F13/10

CPC classification number: G06F13/26 ,  G06F13/102

Abstract: Provided is a semiconductor device and a semiconductor system. A semiconductor device can include a command priority policy manager circuit which generates command priority policy information including a command priority compliance policy for a command directed to a device. A host interface circuit, can be coupled to the command priority policy manager circuit to receive the command priority policy information from the command priority policy manager circuit, where the host interface circuit operable to transmit the command priority policy information via an electrical interface to the device.

公开(公告)号：US07970806B2

公开(公告)日：2011-06-28

申请号：US12015878

申请日：2008-01-17

Applicant: Jeong-woo Park ,  Gwang-ok Go ,  Jun-young Cho

Inventor： Jeong-woo Park ,  Gwang-ok Go ,  Jun-young Cho

IPC: G06F17/30

CPC classification number: G06F17/30218 ,  G06F3/0608 ,  G06F3/0643 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/1044 ,  G06F2212/7207

Abstract: Management of files in a memory, such as a flash memory, includes storing in the memory a first node including a first type of metadata of the file, a second node including data of the file and a third node including a second type of metadata of the file including file status and memory location information for the first and second nodes. The third node may include a node including memory location information for the second node and a node including an index table that cross-references a memory location for the memory location information for the second node to a memory location of the first node. Methods and devices may be provided.

Abstract translation: 管理诸如闪速存储器的存储器中的文件包括在存储器中存储包括文件的第一类型的元数据的第一节点，包括文件的数据的第二节点和包括文件的第二类型的第二类型的元数据 该文件包括用于第一和第二节点的文件状态和存储位置信息。 第三节点可以包括包括用于第二节点的存储器位置信息的节点和包括索引表的节点，所述索引表将用于第二节点的存储器位置信息的存储器位置交叉引用到第一节点的存储器位置。 可以提供方法和装置。

公开(公告)号：US20090100115A1

公开(公告)日：2009-04-16

申请号：US12015878

申请日：2008-01-17

Applicant: Jeong-woo Park ,  Gwang-ok Go ,  Jun-young Cho

Inventor： Jeong-woo Park ,  Gwang-ok Go ,  Jun-young Cho

IPC: G06F12/02

CPC classification number: G06F17/30218 ,  G06F3/0608 ,  G06F3/0643 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/1044 ,  G06F2212/7207

Abstract: Management of files in a memory, such as a flash memory, includes storing in the memory a first node including a first type of metadata of the file, a second node including data of the file and a third node including a second type of metadata of the file including file status and memory location information for the first and second nodes. The third node may include a node including memory location information for the second node and a node including an index table that cross-references a memory location for the memory location information for the second node to a memory location of the first node. Methods and devices may be provided.

Abstract translation: 管理诸如闪速存储器的存储器中的文件包括在存储器中存储包括文件的第一类型的元数据的第一节点，包括文件的数据的第二节点和包括文件的第二类型的第二类型的元数据 该文件包括用于第一和第二节点的文件状态和存储位置信息。 第三节点可以包括包括用于第二节点的存储器位置信息的节点和包括索引表的节点，所述索引表将用于第二节点的存储器位置信息的存储器位置交叉引用到第一节点的存储器位置。 可以提供方法和装置。