CHIP PACKAGING STRUCTURE
    1.
    发明申请

    公开(公告)号:US20220208628A1

    公开(公告)日:2022-06-30

    申请号:US17565402

    申请日:2021-12-29

    Abstract: A chip packaging structure includes: at least one semiconductor chip, having a signal processing function; a base material, wherein the semiconductor chip is disposed on the base material; at least one thermal conduction plate, disposed on the base material; and a package material, encapsulating the base material, the thermal conduction plate, and the semiconductor chip. The thermal conduction plate forms at least one thermal conduction channel in the package material.

    LEAD FRAME AND PACKAGE METHOD
    4.
    发明公开

    公开(公告)号:US20240203840A1

    公开(公告)日:2024-06-20

    申请号:US18520789

    申请日:2023-11-28

    CPC classification number: H01L23/49544

    Abstract: A lead frame includes: a die pad having a die disposing area; a plurality of lead pads located around the die pad; an outer frame, located at a periphery of the die pad and the lead pads; and at least two tie bars, respectively connected between the outer frame and two opposite sides of the die pad. At least one of the die pad and the tie bars includes a thermal deformation mitigation structure.

    Micro-electro-mechanical system device

    公开(公告)号:US10012671B2

    公开(公告)日:2018-07-03

    申请号:US14931696

    申请日:2015-11-03

    Inventor: Shih-Chieh Lin

    Abstract: A MEMS device includes: a substrate; a proof mass suspended over the substrate, the proof mass including at least one proof mass body and a proof mass frame connected to and accommodating the proof mass body, the proof mass frame including at least one self-test frame; and at least one self-test electrode inside the self-test frame, and connected to the substrate; wherein when a voltage difference is applied between the self-test electrode and the self-test frame, the proof mass is driven to have an in-plane movement, and wherein the self-test electrode and the self-test frame do not form a sensing capacitor in between.

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