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    Memory device including charge pump circuit
    1.
    发明授权
    Memory device including charge pump circuit 有权

    公开(公告)号：US11069415B2

    公开(公告)日：2021-07-20

    申请号：US16983006

    申请日：2020-08-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Se-heon Baek ,  Dae-seok Byeon ,  Ki-chang Jang ,  Young-sun Min

    IPC: G11C16/30 ,  H02M3/07 ,  G11C16/32 ,  G11C11/56 ,  G11C16/04

    Abstract: The non-volatile memory device includes a memory cell array including a plurality of memory cells and a voltage generator configured to supply a voltage to the memory cell array. The voltage generator includes a charge pump circuit, a switching circuit, and a stage controller. The charge pump circuit includes a plurality of pump units and is configured to output a pump voltage and a pump current in accordance with a number of pump units that have received an input voltage among the plurality of pump units. The switching circuit is configured to output the pump voltage. The stage controller is configured to receive an input signal corresponding to the pump current and perform a stage control operation of generating a stage control signal for controlling the number of pump units to be driven.

    MEMORY DEVICE HAVING CROSS POINT ARRAY STRUCTURE, MEMORY SYSTEM, AND METHOD OF OPERATING MEMORY DEVICE
    2.
    发明申请
    MEMORY DEVICE HAVING CROSS POINT ARRAY STRUCTURE, MEMORY SYSTEM, AND METHOD OF OPERATING MEMORY DEVICE 有权
    具有跨点阵列结构的存储器件，存储器系统和操作存储器件的方法

    公开(公告)号：US20160055904A1

    公开(公告)日：2016-02-25

    申请号：US14716166

    申请日：2015-05-19

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyun-kook Park ,  Chi-weon Yoon ,  Yeong-taek Lee ,  Dae-seok Byeon

    IPC: G11C13/00

    CPC classification number: G11C13/003 ,  G11C8/06 ,  G11C8/10 ,  G11C8/12 ,  G11C8/14 ,  G11C11/56 ,  G11C13/0002 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/71

    Abstract: In a method of operating a memory device having a cross point array structure, the memory device includes multiple tiles, and each of the tiles includes memory cells of multiple layers. The method includes accessing, in a first tile, multiple memory cells of a first layer disposed in a region where at least one first line and at least one second line cross each other, accessing, in the first tile, multiple memory cells of a second layer disposed in a region where at least one first line and at least one second line cross each other, and accessing, after the memory cells of the multiple layers of the first tile are accessed, multiple memory cells included in a second tile. Related memory devices and memory systems are also discussed.

    Abstract translation: 在操作具有交叉点阵列结构的存储器件的方法中，存储器件包括多个瓦片，并且每个瓦片包括多个层的存储器单元。 该方法包括：在第一瓦片中，访问第一层的多个存储单元，该第一层设置在至少一条第一线和至少一条第二条线交叉的区域中，在第一瓦片中，在第一瓦片中访问第二层的多个存储器单元 层，其设置在至少一条第一线和至少一条第二条线彼此交叉的区域中，并且在第一瓦片的多个层的存储单元被访问之后，访问包括在第二瓦片中的多个存储器单元。 还讨论了相关的存储器件和存储器系统。

    VOLTAGE GENERATOR AND METHOD OF OPERATING THE SAME
    4.
    发明申请
    VOLTAGE GENERATOR AND METHOD OF OPERATING THE SAME 审中-公开

    公开(公告)号：US20200185041A1

    公开(公告)日：2020-06-11

    申请号：US16507205

    申请日：2019-07-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Se-heon Baek ,  Ki-chang Jang ,  Dae-seok Byeon

    IPC: G11C16/30 ,  G11C16/08 ,  G05F1/575 ,  H02M1/08

    Abstract: There are provided a method of operating a voltage generator. The method includes providing a reference voltage, sensing a magnitude of a charge current for increasing voltages of a plurality of word lines based on the reference voltage, determining whether the sensed magnitude of the charge current is greater than a peak current value, increasing the reference voltage in accordance with a first slope when the sensed magnitude of the charge current is less than or equal to the peak current value, and increasing the reference voltage in accordance with a second slope less than the first slope when the detected magnitude of the charge current is greater than the peak current value.

    Non-volatile memory device and a method of operating the same
    7.
    发明授权
    Non-volatile memory device and a method of operating the same 有权

    公开(公告)号：US10803958B2

    公开(公告)日：2020-10-13

    申请号：US16149327

    申请日：2018-10-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jin-bae Bang ,  Dae-seok Byeon ,  Ji-su Kim

    IPC: G11C16/26 ,  G11C11/56 ,  G11C16/04 ,  H01L27/11582

    Abstract: A non-volatile memory device includes a memory cell array including a plurality of memory cells; a page buffer for performing a plurality of read operations and storing results of the read operations, wherein each of the read operations includes at least one sensing operation for selected memory cells from the plurality of memory cells; a multi-sensing manager for determining a number of sensing operations for each of the plurality of read operations and controlling the page buffer to perform the read operations; and a data identifier for identifying a data state of a bit for the selected memory cells based on the results of the read operations, wherein the multi-sensing manager determines the number of sensing operations for at least one read operation from among the read operations to be different from the number of sensing operations for other read operations from among the read operations.

    Memory device having cross point array structure, memory system, and method of operating memory device
    10.
    发明授权
    Memory device having cross point array structure, memory system, and method of operating memory device 有权
    具有交叉点阵列结构的存储器件，存储器系统和操作存储器件的方法

    公开(公告)号：US09269430B1

    公开(公告)日：2016-02-23

    申请号：US14716166

    申请日：2015-05-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyun-kook Park ,  Chi-weon Yoon ,  Yeong-taek Lee ,  Dae-seok Byeon

    IPC: G11C11/00 ,  G11C13/00

    CPC classification number: G11C13/003 ,  G11C8/06 ,  G11C8/10 ,  G11C8/12 ,  G11C8/14 ,  G11C11/56 ,  G11C13/0002 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/71

    Abstract: In a method of operating a memory device having a cross point array structure, the memory device includes multiple tiles, and each of the tiles includes memory cells of multiple layers. The method includes accessing, in a first tile, multiple memory cells of a first layer disposed in a region where at least one first line and at least one second line cross each other, accessing, in the first tile, multiple memory cells of a second layer disposed in a region where at least one first line and at least one second line cross each other, and accessing, after the memory cells of the multiple layers of the first tile are accessed, multiple memory cells included in a second tile. Related memory devices and memory systems are also discussed.

    Abstract translation: 在操作具有交叉点阵列结构的存储器件的方法中，存储器件包括多个瓦片，并且每个瓦片包括多个层的存储器单元。 该方法包括：在第一瓦片中，访问第一层的多个存储单元，该第一层设置在至少一条第一线和至少一条第二条线交叉的区域中，在第一瓦片中，在第一瓦片中访问第二层的多个存储器单元 层，其设置在至少一条第一线和至少一条第二条线彼此交叉的区域中，并且在第一瓦片的多个层的存储单元被访问之后，访问包括在第二瓦片中的多个存储器单元。 还讨论了相关的存储器件和存储器系统。

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