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    Refresh control circuit, memory device including the same and method of operating the same for hammer refresh operation
    1.
    发明授权
    Refresh control circuit, memory device including the same and method of operating the same for hammer refresh operation 有权

    公开(公告)号：US10811077B2

    公开(公告)日：2020-10-20

    申请号：US16235638

    申请日：2018-12-28

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hoon Shin ,  Do-Yeon Kim ,  Ho-Young Song ,  Dong-Su Lee

    IPC: G11C11/406

    Abstract: A memory device a plurality of memory banks, a hammer address manager, and a refresh controller. The hammer address manager manages access addresses with respect to the plurality of memory banks and provides a hammer address for a hammer refresh operation among the access addresses, the hammer address being the access address that is accessed more than other access addresses. The refresh controller generates a hammer refresh address signal based on the hammer address, the hammer refresh address signal corresponding to a row that is physically adjacent to a row corresponding to the hammer address such that the row physically adjacent to the row corresponding to the hammer address is refreshed by the hammer refresh operation.

    Embedded refresh controllers and memory devices including the same
    3.
    发明授权
    Embedded refresh controllers and memory devices including the same 有权

    公开(公告)号：US10446216B2

    公开(公告)日：2019-10-15

    申请号：US15134637

    申请日：2016-04-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jong-Min Oh ,  Ho-Young Song ,  Do-Yeon Kim

    IPC: G11C11/406 ,  G11C11/4072 ,  G11C11/408 ,  G11C11/4076

    Abstract: Embedded refresh controllers included in memory devices and memory devices including the embedded refresh controllers are provided. The embedded refresh controllers may include a refresh counter and an address generator. The refresh counter may generate a counter refresh address signal in response to a counter refresh signal such that the counter refresh address signal may represent a sequentially changing address. The address generator may store information with respect to a hammer address that is accessed intensively and may generates a hammer refresh address signal in response to a hammer refresh signal such that the hammer refresh address signal may represent an address of a row that is physically adjacent to a row of the hammer address. Loss of cell data may be reduced and performance of the memory device may be enhanced by detecting the intensively-accessed hammer address and performing the refresh operation based on the detected hammer address efficiently.

    Memory devices performing refresh operations with row hammer handling and memory systems including such memory devices
    6.
    发明授权
    Memory devices performing refresh operations with row hammer handling and memory systems including such memory devices 有权

    公开(公告)号：US10860222B2

    公开(公告)日：2020-12-08

    申请号：US16354473

    申请日：2019-03-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hoon Shin ,  Do-Yeon Kim ,  Ho-Young Song

    IPC: G06F3/06 ,  G11C11/406 ,  G06F12/02

    Abstract: Provided are memory devices configured to perform row hammer handling operations, and memory systems including such memory devices. An example memory device may include a memory cell array including a plurality of memory cell rows; a row hammer handler that is configured to determine whether to perform a row hammer handling operation to refresh adjacent memory cell rows adjacent to a first row that is being intensively accessed from among the memory cell rows, resulting in a determination result; and a refresh manager configured to perform either a normal refresh operation for sequentially refreshing the memory cell rows or the row hammer handling operation, based on the determination result of the row hammer handler.

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